Abstract: An embedded multiprocessor system is provided that includes a multiprocessor system on a chip (SOC), a memory coupled to the multiprocessor SOC, the memory storing application software partitioned into an initial boot stage and at least one additional boot stage, and a secondary boot loader configured to boot load the initial boot stage on at least one processor of the multiprocessor SOC, wherein the initial boot stage begins executing and flow of data from the initial boot stage to the at least one additional boot stage is disabled, wherein the application software is configured to boot load a second boot stage of the at least one additional boot stage on at least one other processor of the multiprocessor SOC and to enable flow of data between the initial boot stage and the second boot stage.

Abstract: In a digital still camera, pixel values representing an image frame in a first format are stored in a memory. The pixel values of the image frame in the first format are converted to a second format. The pixel values in the second format are stored in the memory by overwriting at least a portion of the pixel values in the first format. Memory space is thus conserved by the overwriting, thereby requiring reduced memory for storage of pixel values in the digital still camera. The minimum delay (shot to shot interval) required between user-indicated image capture instances is also reduced.

Abstract: In a digital still camera, pixel values representing an image frame in a first format are stored in a memory. The pixel values of the image frame in the first format are converted to a second format. The pixel values in the second format are stored in the memory by overwriting at least a portion of the pixel values in the first format. Memory space is thus conserved by the overwriting, thereby requiring reduced memory for storage of pixel values in the digital still camera. The minimum delay (shot to shot interval) required between user-indicated image capture instances is also reduced.