Patents by Inventor Kee Joon Choi

Kee Joon Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7273502
    Abstract: A capacitor and a method for manufacturing the same provide a branched capacitor with a large capacitance and a super-slim structure. The method includes sintering a ceramic substrate; forming a plurality of troughs in the sintered ceramic substrate, the plurality of troughs including first and second sets of troughs corresponding to opposing electrodes; and filling the troughs with metal to form a plurality of metal lines arranged alternately in the plurality of troughs.
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: September 25, 2007
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Kee Joon Choi
  • Publication number: 20070164266
    Abstract: There is provided a semiconductor device. The semiconductor device includes a lower electrode, a contact connected to the lower electrode to have a double trench structure, a phase change material layer accommodated in the double trench to cause a phase change between a crystalline state and an amorphous state in accordance with a change in heat transmitted by the contact, and an upper electrode connected to the phase change material layer.
    Type: Application
    Filed: December 27, 2006
    Publication date: July 19, 2007
    Inventor: Kee Joon Choi
  • Publication number: 20070155128
    Abstract: Provided is a method for forming a trench, capable of rounding a top corner without adding a separate mask or process. In the method, first and second insulating layers are stacked on a substrate having an isolation region and an active region. Subsequently, a photoresist pattern is formed on the second insulating layer, and the first and second insulating layers are patterned using the photoresist pattern as a mask to expose a portion of a substrate in the isolation region. After that, the substrate is etched using the first and second pad insulating layers as a mask to form an STI region such that an upper width of the STI region is greater than a lower width of the STI region.
    Type: Application
    Filed: December 26, 2006
    Publication date: July 5, 2007
    Inventor: Kee Joon Choi