Abstract: Circuit responses to a stimulus may be compacted, decreasing the number of pin outs, without increasing the circuit element length, using a compactor. In accordance with one embodiment of the present invention, errors may be detected in scan chains used for integrated circuit testing. The number of outputs applied to output pins or other connectors may be substantially decreased, resulting in cost savings.

Abstract: A tractable architecture level coverage measure uses information about the coverage measures obtained by the data path blocks, control logic blocks and cache to obtain an overall measure of coverage. This technique is applicable to a variety of different designs using different fabrication processes. Moreover, it allows the use of extended length test vectors, for example, such as those using commercial software applications. Since the coverage measure does not rely on the traditional stuck at model, it is applicable to extended length test vectors that may be used with high performance systems.