Abstract: A power-on reset circuit and method for the same may provide reset signals during power-up and/or power-down cycles, to reduce the chances of error. An error may occur, for example, due to voltage fluctuations and/or the ambient temperature of circuit components. Reducing the chances of error during a power-up cycle may include setting an output node of a circuit to a reset state when a power supply voltage reaches a first voltage level and outputting a power-on reset signal to the output node when the power supply voltage equals a second voltage level higher than the first. Reducing the chances of error during a power-down cycle may include setting the output node to a reset state when the output node reaches a third voltage level between the first and second voltage levels.

Abstract: An output driver is responsive to an input signal and a swing width control signal (TE). The output driver is configured to generate an output signal having a first swing width (e.g., less than rail-to-rail) when the swing width control signal designates a normal mode of operation and a second swing width (e.g., rail-to-rail) when the swing width control signal designates a test mode of operation.

Abstract: A power-on reset circuit which outputs a power-on reset signal through an output node includes a first signal generator that generates a first signal voltage. The first signal voltage increases from a ground voltage when a power supply voltage reaches a first threshold voltage. A second signal generator generates a second signal voltage, and the second signal voltage decreases from the power supply voltage when the power supply voltage reaches a second threshold voltage. A comparator activates the power-on reset signal responsive to a comparison of the first and second signals.

Abstract: A semiconductor memory device includes a sense line, a data line, a memory connected between the sense line and the data line having an active restoration function, and a sense amplifier connected between the sense line and the data line. The sense amplifier senses and inverts the data in the sense line, and outputs the inverted data to the data line. The polarity of the data on the sense line is opposite the polarity of the data on the data line, and the data in the data line are written to the memory. The semiconductor memory device is capable of performing an active restoration function which makes it possible to rewrite the result of sensing operations from the sense amplifier without the need for an additional circuit or operations.

Abstract: A semiconductor memory device includes a plurality of memory array blocks including predetermined numbers of memory cells, the memory array blocks being arranged in the row direction; a RAS chain being aligned at a side of the plurality of memory array blocks in the row direction, the RAS chain for selecting and activating a particular word line; a CAS chain being aligned at the other side of the plurality of memory array blocks in the column direction, the CAS chain for amplifying N bits of data from the plurality of memory array blocks and outputting the result to an input/output (IO) line, wherein N is a natural number more than 2; and a data converter for continuously outputting the N bits of data input via the IO line from a memory array block nearest to the RAS chain to a memory array block farthest from the RAS chain.

Abstract: A semiconductor memory device includes a sense line, a data line, a memory connected between the sense line and the data line having an active restoration function, and a sense amplifier connected between the sense line and the data line. The sense amplifier senses and inverts the data in the sense line, and outputs the inverted data to the data line. The polarity of the data on the sense line is opposite the polarity of the data on the data line, and the data in the data line are written to the memory. The semiconductor memory device is capable of performing an active restoration function which makes it possible to rewrite the result of sensing operations from the sense amplifier without the need for an additional circuit or operations.

Abstract: A power-on reset circuit which outputs a power-on reset signal through an output node includes a first signal generator that generates a first signal voltage. The first signal voltage increases from a ground voltage when a power supply voltage reaches a first threshold voltage. A second signal generator generates a second signal voltage, and the second signal voltage decreases from the power supply voltage when the power supply voltage reaches a second threshold voltage. A comparator activates the power-on reset signal responsive to a comparison of the first and second signals.

Abstract: A semiconductor memory device includes a plurality of memory array blocks including predetermined numbers of memory cells, the memory array blocks being arranged in the row direction; a RAS chain being aligned at a side of the plurality of memory array blocks in the row direction, the RAS chain for selecting and activating a particular word line; a CAS chain being aligned at the other side of the plurality of memory array blocks in the column direction, the CAS chain for amplifying N bits of data from the plurality of memory array blocks and outputting the result to an input/output (IO) line, wherein N is a natural number more than 2; and a data converter for continuously outputting the N bits of data input via the IO line from a memory array block nearest to the RAS chain to a memory array block farthest from the RAS chain.

Abstract: A voltage generating circuit capable of generating a stable output voltage irrespective a variation in external voltage. The voltage generating circuit includes a voltage comparing circuit that operates in response to an activation signal and outputs output voltage to a control node in response to a difference between reference voltage and an internal voltage; an internal voltage control circuit that is connected to the control node, and receives external voltage and controls the level of the internal voltage, which is applied to a load, in response to voltage value of the control node; an adjusting means for adjusting an amount of driving current flowing through the internal voltage control circuit by controlling the voltage level at the control node. The adjusting means may include any combination of a clamp circuit, a voltage compensating circuit, and a voltage drop circuit.

Abstract: In a semiconductor device having a ferroelectric capacitor and manufacturing method thereof, a spacer comprising a low dielectric constant material is formed on the side surfaces of a plurality of lower electrodes separated into each cell unit, and a ferroelectric film is formed on the lower electrodes whereon the low dielectric constant material spacer is formed, and an upper electrode is formed on the ferroelectric film, to thereby prevent an error which may be caused between the adjacent lower electrodes.

Abstract: In a semiconductor device having a ferroelectric capacitor and manufacturing method thereof, a spacer comprising a low dielectric material is formed on the side surfaces of a plurality of lower electrodes separated into each cell unit, and a ferroelectric film is formed on the lower electrodes whereon the low dielectric material spacer is formed, and an upper electrode is formed on the ferroelectric film, to thereby prevent an error which may be caused between the adjacent lower electrodes.

Abstract: A capacitor for a semiconductor memory device employs a tantalum pentoxide film as a dielectric film. The dielectric film is made from tantalum pentoxide film doped with silicon over a first electrode. A second electrode is then formed over the dielectric film. Accordingly, in the method for manufacturing the device, although the dielectric constant of the dielectric film is somewhat lower than the conventional pure tantalum pentoxide film due to the silicon doped within the tantalum pentoxide film, leakage current is reduced and breakdown voltage is increased. Therefore, the dielectric film according to the present invention exhibits excellent electrical characteristics and high reliability.