Patents by Inventor Kei Fujii

Kei Fujii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9171978
    Abstract: A method for producing an epitaxial wafer includes a step of growing an epitaxial layer structure on a III-V semiconductor substrate, the epitaxial layer structure including a III-V semiconductor multiple-quantum well and a III-V semiconductor surface layer, wherein the step of growing the epitaxial layer structure on the substrate is performed such that a lattice mismatch ?? of the multiple-quantum well with respect to the substrate satisfies a range of ?0.13%???<0% or 0%<???+0.13%, the range having a center displaced from zero, and an X-ray rocking curve in a zero-order diffraction peak derived from the multiple-quantum well has a full width at half maximum (FWHM) of 30 seconds or less.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: October 27, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Kei Fujii, Kaoru Shibata, Katsushi Akita
  • Patent number: 9159853
    Abstract: An object of the present invention is to provide a group III-V compound semiconductor photo detector comprising an absorption layer having a group III-V compound semiconductor layer containing Sb as a group V constituent element, and an n-type InP window layer, resulting in reduced dark current. The InP layer 23 grown on the absorption layer 23 contains antimony as impurity, due to the memory effect with antimony which is supplied during the growth of a GaAsSb layer of the absorption layer 21. In the group III-V compound semiconductor photo detector 11, the InP layer 23 contains antimony as impurity and is doped with silicon as n-type dopant. Although antimony impurities in the InP layer 23 generate holes, the silicon contained in the InP layer 23 compensates for the generated carriers. As a result, the second portion 23d of the InP layer 23 has sufficient n-type conductivity.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: October 13, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Katsushi Akita, Takashi Ishizuka, Kei Fujii, Youichi Nagai
  • Patent number: 9129808
    Abstract: Provided are an epitaxial wafer, a photodiode, and the like that include an antimony-containing layer and can be efficiently produced such that protruding surface defects causing a decrease in the yield can be reduced and impurity contamination causing degradation of the performance can be suppressed. The production method includes a step of growing an antimony (Sb)-containing layer on a substrate 1 by metal-organic vapor phase epitaxy using only metal-organic sources; and a step of growing, on the antimony-containing layer, an antimony-free layer including a window layer 5, wherein, from the growth of the antimony-containing layer to completion of the growth of the window layer, the growth is performed at a growth temperature of 425° C. or more and 525° C. or less.
    Type: Grant
    Filed: October 3, 2011
    Date of Patent: September 8, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Kei Fujii, Katsushi Akita, Takashi Ishizuka
  • Patent number: 9123843
    Abstract: A semiconductor device includes a semiconductor layer laminate in which a plurality of semiconductor layers are laminated, the semiconductor layer laminate including a light receiving layer, the light receiving layer being grown by a metal-organic vapor phase epitaxy method, the light receiving layer having a cutoff wavelength of more than or equal to 3 ?m and less than or equal to 8 ?m, the semiconductor device having a dark current density of less than or equal to 1×10?1 A/cm2 when a reverse bias voltage of 60 mV is applied at a temperature of ?140° C. Thereby, a semiconductor device which can receive light in a mid-infrared range and has a low dark current is provided.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: September 1, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takashi Kyono, Katsushi Akita, Kaoru Shibata, Koji Nishizuka, Kei Fujii
  • Publication number: 20150228825
    Abstract: Provided are a semiconductor device and an optical sensor device, each having reduced dark current, and detectivity extended toward longer wavelengths in the near-infrared. Further, a method for manufacturing the semiconductor device is provided. The semiconductor device 50 includes an absorption layer 3 of a type II (GaAsSb/InGaAs) MQW structure located on an InP substrate 1, and an InP contact layer 5 located on the MQW structure. In the MQW structure, a composition x (%) of GaAsSb is not smaller than 44%, a thickness z (nm) thereof is not smaller than 3 nm, and z??0.4x+24.6 is satisfied.
    Type: Application
    Filed: April 23, 2015
    Publication date: August 13, 2015
    Inventors: Kei Fujii, Katsushi Akita, Takashi Ishizuka, Hideaki Nakahata, Yasuhiro Iguchi, Hiroshi Inada, Youichi Nagai
  • Publication number: 20150144876
    Abstract: A method for producing a semiconductor element includes a step of forming a multiple quantum well in which a GaSb layer and an InAs layer are alternately stacked on a GaSb substrate by MOVPE, wherein, in the step of forming a multiple quantum well, an InSb film is formed on at least one of a lower-surface side and an upper-surface side of the InAs layer so as to be in contact with the InAs layer.
    Type: Application
    Filed: February 5, 2015
    Publication date: May 28, 2015
    Inventors: Takashi Kyono, Kei Fujii, Katsushi Akita
  • Patent number: 9040955
    Abstract: Provided are a semiconductor device and an optical sensor device, each having reduced dark current, and detectivity extended toward longer wavelengths in the near-infrared. Further, a method for manufacturing the semiconductor device is provided. The semiconductor device 50 includes an absorption layer 3 of a type II (GaAsSb/InGaAs) MQW structure located on an InP substrate 1, and an InP contact layer 5 located on the MQW structure. In the MQW structure, a composition x (%) of GaAsSb is not smaller than 44%, a thickness z (nm) thereof is not smaller than 3 nm, and z??0.4x+24.6 is satisfied.
    Type: Grant
    Filed: May 19, 2011
    Date of Patent: May 26, 2015
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Kei Fujii, Katsushi Akita, Takashi Ishizuka, Hideaki Nakahata, Yasuhiro Iguchi, Hiroshi Inada, Youichi Nagai
  • Publication number: 20150115222
    Abstract: A semiconductor device includes a semiconductor layer laminate in which a plurality of semiconductor layers are laminated, the semiconductor layer laminate including a light receiving layer, the light receiving layer being grown by a metal-organic vapor phase epitaxy method, the light receiving layer having a cutoff wavelength of more than or equal to 3 ?m and less than or equal to 8 ?m, the semiconductor device having a dark current density of less than or equal to 1×10?1 A/cm2 when a reverse bias voltage of 60 mV is applied at a temperature of ?140° C. Thereby, a semiconductor device which can receive light in a mid-infrared range and has a low dark current is provided.
    Type: Application
    Filed: September 22, 2014
    Publication date: April 30, 2015
    Inventors: Takashi KYONO, Katsushi AKITA, Kaoru SHIBATA, Koji NISHIZUKA, Kei FUJII
  • Publication number: 20150001466
    Abstract: An object of the present invention is to provide a group III-V compound semiconductor photo detector comprising an absorption layer having a group III-V compound semiconductor layer containing Sb as a group V constituent element, and an n-type InP window layer, resulting in reduced dark current. The InP layer 23 grown on the absorption layer 23 contains antimony as impurity, due to the memory effect with antimony which is supplied during the growth of a GaAsSb layer of the absorption layer 21. In the group III-V compound semiconductor photo detector 11, the InP layer 23 contains antimony as impurity and is doped with silicon as n-type dopant. Although antimony impurities in the InP layer 23 generate holes, the silicon contained in the InP layer 23 compensates for the generated carriers. As a result, the second portion 23d of the InP layer 23 has sufficient n-type conductivity.
    Type: Application
    Filed: September 18, 2014
    Publication date: January 1, 2015
    Inventors: Katsushi Akita, Takashi Ishizuka, Kei Fujii, Youichi Nagai
  • Patent number: 8921829
    Abstract: The present invention provides a light receiving element array etc., having a high light-reception sensitivity in the near-infrared region, an optical sensor device, and a method for producing the light receiving element array. A light receiving element array 55 includes an n-type buffer layer 2 disposed on an InP substrate 1, an absorption layer 3 having a type-II MQW, a contact layer 5 disposed on the absorption layer, and a p-type region extending to the n-type buffer layer 2 through the absorption layer 3, wherein the p-type region formed by selective diffusion is separated from the p-type region of an adjacent light receiving element by a region that is not subjected to selective diffusion, and, in the n-type buffer layer, a p-n junction 15 is formed on a crossed face of a p-type carrier concentration of the p-type region and an n-type carrier concentration of the buffer layer.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: December 30, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yasuhiro Iguchi, Hiroshi Inada, Youichi Nagai, Hideaki Nakahata, Katsushi Akita, Takashi Ishizuka, Kei Fujii
  • Publication number: 20140367640
    Abstract: Provided are an epitaxial wafer and a light-emitting element having a type-II MQW formed of III-V compound semiconductors and configured to emit light with a sufficiently high intensity. The method includes a step of growing an active layer having a type-II multi-quantum well structure (MQW) on a III-V compound semiconductor substrate, wherein, in the step of forming the type-II multi-quantum well structure, the type-II multi-quantum well structure is formed by metal-organic vapor phase epitaxy using only metal-organic sources such that a number of pairs of the type-II multi-quantum well structure is 25 or more.
    Type: Application
    Filed: January 30, 2013
    Publication date: December 18, 2014
    Inventors: Kei Fujii, Takashi Ishizuka, Katsushi Akita
  • Publication number: 20140353586
    Abstract: A method for producing a semiconductor element includes a step of forming a multiple quantum well in which a GaSb layer and an InAs layer are alternately stacked on a GaSb substrate by MOVPE, wherein, in the step of forming a multiple quantum well, an InSb film is formed on at least one of a lower-surface side and an upper-surface side of the InAs layer so as to be in contact with the InAs layer.
    Type: Application
    Filed: May 22, 2014
    Publication date: December 4, 2014
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Takashi KYONO, Kei FUJII, Katsushi AKITA
  • Publication number: 20140353584
    Abstract: A method for producing an epitaxial wafer includes a step of growing an epitaxial layer structure on a III-V semiconductor substrate, the epitaxial layer structure including a III-V semiconductor multiple-quantum well and a III-V semiconductor surface layer, wherein the step of growing the epitaxial layer structure on the substrate is performed such that a lattice mismatch ?? of the multiple-quantum well with respect to the substrate satisfies a range of ?0.13%???<0% or 0%<???+0.13%, the range having a center displaced from zero, and an X-ray rocking curve in a zero-order diffraction peak derived from the multiple-quantum well has a full width at half maximum (FWHM) of 30 seconds or less.
    Type: Application
    Filed: May 22, 2014
    Publication date: December 4, 2014
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Kei FUJII, Kaoru SHIBATA, Katsushi AKITA
  • Publication number: 20140319463
    Abstract: An epitaxial wafer of the present invention includes a substrate composed of a III-V compound semiconductor, a multiple quantum well structure composed of a III-V compound semiconductor and located on the substrate, and a top layer composed of a III-V compound semiconductor and located on the multiple quantum well structure. The substrate has a plane orientation of (100) and an off angle of ?0.030° or more and +0.030° or less, and a surface of the top layer has a root-mean-square roughness of less than 10 nm.
    Type: Application
    Filed: April 23, 2014
    Publication date: October 30, 2014
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Kei FUJII, Kaoru SHIBATA, Katsushi AKITA
  • Patent number: 8866199
    Abstract: An object of the present invention is to provide a group III-V compound semiconductor photo detector comprising an absorption layer having a group III-V compound semiconductor layer containing Sb as a group V constituent element, and an n-type InP window layer, resulting in reduced dark current. The InP layer 23 grown on the absorption layer 23 contains antimony as impurity, due to the memory effect with antimony which is supplied during the growth of a GaAsSb layer of the absorption layer 21. In the group III-V compound semiconductor photo detector 11, the InP layer 23 contains antimony as impurity and is doped with silicon as n-type dopant. Although antimony impurities in the InP layer 23 generate holes, the silicon contained in the InP layer 23 compensates for the generated carriers. As a result, the second portion 23d of the InP layer 23 has sufficient n-type conductivity.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: October 21, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Katsushi Akita, Takashi Ishizuka, Kei Fujii, Youichi Nagai
  • Patent number: 8822977
    Abstract: A photodetector and a method of manufacturing the photodetector are provided, in which variation in sensitivity is suppressed over the near-infrared region from the short wavelength side including 1.3 ?m to the long wavelength side. The photodetector includes, on an InP substrate, an absorption layer of a type II multiple quantum well structure comprising a repeated structure of a GaAsSb layer and an InGaAs layer, and has sensitivity in the near-infrared region including wavelengths of 1.3 ?m and 2.0 ?m. The ratio of the sensitivity at the wavelength of 1.3 ?m to the sensitivity at the wavelength of 2.0 ?m is not smaller than 0.5 but not larger than 1.6.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: September 2, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Katsushi Akita, Takashi Ishizuka, Kei Fujii, Hideaki Nakahata, Youichi Nagai, Hiroshi Inada, Yasuhiro Iguchi
  • Publication number: 20140061588
    Abstract: An object of the present invention is to provide a group III-V compound semiconductor photo detector comprising an absorption layer having a group III-V compound semiconductor layer containing Sb as a group V constituent element, and an n-type InP window layer, resulting in reduced dark current. The InP layer 23 grown on the absorption layer 23 contains antimony as impurity, due to the memory effect with antimony which is supplied during the growth of a GaAsSb layer of the absorption layer 21. In the group III-V compound semiconductor photo detector 11, the InP layer 23 contains antimony as impurity and is doped with silicon as n-type dopant. Although antimony impurities in the InP layer 23 generate holes, the silicon contained in the InP layer 23 compensates for the generated carriers. As a result, the second portion 23d of the InP layer 23 has sufficient n-type conductivity.
    Type: Application
    Filed: November 5, 2013
    Publication date: March 6, 2014
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Katsushi Akita, Takashi Ishizuka, Kei Fujii, Youichi Nagai
  • Publication number: 20140054545
    Abstract: Provided are a photodetector in which, in a III-V semiconductor having sensitivity in the near-infrared region to the far-infrared region, the carrier concentration can be controlled with high accuracy; an epitaxial wafer serving as a material of the photodetector; and a method for producing the epitaxial wafer. Included are a substrate formed of a III-V compound semiconductor; an absorption layer configured to absorb light; a window layer having a larger bandgap energy than the absorption layer; and a p-n junction positioned at least in the absorption layer, wherein the window layer has a surface having a root-mean-square surface roughness of 10 nm or more and 40 nm or less.
    Type: Application
    Filed: October 29, 2012
    Publication date: February 27, 2014
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Katsushi Akita, Kei Fujii, Takashi Ishizuka, Youichi Nagai
  • Patent number: 8642943
    Abstract: A light-receiving element includes an InP substrate 1, a light-receiving layer 3 having an MQW and located on the InP substrate 1, a contact layer 5 located on the light-receiving layer 3, a p-type region 6 extending from a surface of the contact layer 5 to the light-receiving layer, and a p-side electrode 11 that forms an ohmic contact with the p-type region. The light-receiving element is characterized in that the MQW has a laminated structure including pairs of an InxGa1-xAs (0.38?x?0.68) layer and a GaAs1-ySby (0.25?y?0.73) layer, and in the GaAs1-ySby layer, the Sb content y in a portion on the InP substrate side is larger than the Sb content y in a portion on the opposite side.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: February 4, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroki Mori, Yasuhiro Iguchi, Hiroshi Inada, Youichi Nagai, Kouhei Miura, Hideaki Nakahata, Katsushi Akita, Takashi Ishizuka, Kei Fujii
  • Publication number: 20140008614
    Abstract: Provided is, for example, a photodiode in which extension of the sensitivity range to a longer wavelength in the near-infrared region can be achieved without increasing the dark current. A photodiode according to the present invention includes an absorption layer 3 that is positioned on an InP substrate 1 and has a type-II multiple-quantum well structure in which an InGaAs layer 3a and a GaAsSb layer 3b are alternately layered, wherein the InGaAs layer or the GaAsSb layer has a composition gradient in the thickness direction in which the bandgap energy of the InGaAs or the GaAsSb decreases toward the top surface or the bottom surface of the layer.
    Type: Application
    Filed: April 4, 2012
    Publication date: January 9, 2014
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Kei Fujii, Takashi Ishizuka, Katsushi Akita