Patents by Inventor Kei Kawase

Kei Kawase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6559855
    Abstract: The present invention enables image information of high resolution to be transferred via a transmission line with limited band width using a simple configuration. In transferring image information between a main body of a computer and a display, a dither matrix is used to update images stored in the display. That is, a plurality of blocks whose size is of a predetermined dither matrix are defined in an image, and information of each pixel in each block is transferred to the display in order of a value of a corresponding element in the dither matrix. Transfer of unchanged pixel data can be omitted. In addition, in transferring image information between the main body of the computer and the display, image information stored in the computer is divided into a plurality of blocks, for each of which the number of changed pixels or the number of writings to pixels in the block is calculated so that image information in blocks which exceed a predetermined number is transferred to the display block by block.
    Type: Grant
    Filed: April 28, 1999
    Date of Patent: May 6, 2003
    Assignee: International Business Machines Corporation
    Inventors: Kei Kawase, Takao Moriyama, Fusashi Nakamura
  • Patent number: 5802570
    Abstract: Data sets of sequential data strings at a particular point in time are assigned to processing elements of a multiprocessor system at high speed and processing is executed efficiently in parallel. A mechanism for preventing allocation due to all-read to a cache block which has not yet been referred from another cache is added by providing a reference bit with respect to cache blocks. The reference bit becomes 0 when new data is read to the cache block and becomes 1 when the cache block is referenced by a CPU. In the case of reading data from another cache, if a block corresponding thereto can be replaced without the need to be written back to the other cache and the reference bit is 1, data is fetched to the shared cache memory.
    Type: Grant
    Filed: August 14, 1996
    Date of Patent: September 1, 1998
    Assignee: International Business Machines Corp.
    Inventors: Kei Kawase, Takao Moriyama
  • Patent number: 5767858
    Abstract: Provided are a plurality of texture memory clusters for storing interleaved texture image data composed of a plurality of texels in each memory so as to avoid duplication, each having a collecting circuit for computing, from the coordinates of a texture image for one pixel, texels for calculating a texture value corresponding to the coordinates, and for collecting the texel values from the plurality of texture memory clusters, and circuitry for calculating the texture value for the above one pixel from the collected texel values, a bus for interconnecting the plurality of memory clusters, and a plurality of texture generators each connected to one of the plurality of memory clusters for calculating the coordinates of the texture image for the above one pixel. Texel values can efficiently exchanged between each memory cluster without redundantly holding texels in memories.
    Type: Grant
    Filed: December 1, 1995
    Date of Patent: June 16, 1998
    Assignee: International Business Machines Corporation
    Inventors: Kei Kawase, Nobuyoshi Tanaka
  • Patent number: 5757374
    Abstract: A computer graphics apparatus connects a texture coordinate generator with fragment generators via a command bus. The generator is connected to a texture data bus through a texture memory cluster which comprises an address generator connected to a texture coordinate bus, a filter, and eight memories. In addition, the generator is connected to the texture data bus through a plurality of texture memory clusters. The texture data bus is connected to a plurality of drawing processors to which a plurality of frame memories are connected in correspondence. This configuration performs texture mapping through effective utilization of the texture memory clusters.
    Type: Grant
    Filed: August 25, 1995
    Date of Patent: May 26, 1998
    Assignee: International Business Machines Corporation
    Inventors: Fusashi Nakamura, Kei Kawase, Takao Moriyama
  • Patent number: 5757375
    Abstract: A computer graphics system is disclosed for generating pixel data corresponding to a plurality of pixels to be displayed. The computer graphics system includes a frame buffer having entries associated with each of the pixels. Each of the entries includes a subpixel data field, a plurality of display data fields, and a control field. For each entry the sub-pixel data field stores data corresponding to a set of sub-pixels, at least one of the plurality of display data fields stores data determined by filtering of the data of the sub-pixel data field of the entry, and the control field stores data representing a relationship between the sub-pixel data field of the entry and each of the plurality of display data fields of the entry.
    Type: Grant
    Filed: July 25, 1995
    Date of Patent: May 26, 1998
    Assignee: International Business Machines Corporation
    Inventor: Kei Kawase
  • Patent number: 5745667
    Abstract: A texture memory for storing color information of a surface of an object and displacement information of the object, wherein the information is prepared in advance; reading means for reading out the color information of the surface of the object and the displacement information of the object necessary for drawing the object from the texture memory in response to receiving a command instructing to draw the object stored in the texture memory according to a size and a position, if necessary, color information and displacement information specified by the command; size modifying means for expanding or reducing and/or modifying the read color information of the surface of the object and the read displacement information of the object by using the color information and the displacement information, and if specified, using the specified displacement information if specified so as to correspond to the size and the displacement specified in the command; color modifying means for modifying the color information proces
    Type: Grant
    Filed: February 13, 1996
    Date of Patent: April 28, 1998
    Assignee: International Business Machines Corporation
    Inventors: Kei Kawase, Fusashi Nakamura, Yoshihisa Takatsu
  • Patent number: 5584011
    Abstract: Data sets of sequential data strings at a particular point in time are assigned to processing elements of a multiprocessor system at high speed and processing is executed efficiently in parallel. A mechanism for preventing allocation due to all-read to a cache block which has not yet been referred from another cache is added by providing a reference bit with respect to cache blocks. The reference bit becomes 0 when new data is read to the cache block and becomes 1 when the cache block is referenced by a CPU. In the case of reading data from another cache, if a block corresponding thereto can be replaced without the need to be written back to the other cache and the reference bit is 1, data is fetched to the shared cache memory.
    Type: Grant
    Filed: January 13, 1995
    Date of Patent: December 10, 1996
    Assignee: International Business Machines Corporation
    Inventors: Kei Kawase, Takao Moriyama
  • Patent number: 5522060
    Abstract: A multiprocessor memory managing system and method make it possible for a series of instructions corresponding to a data set, which is sequentially renewed by a series of data, to be sequentially executed by a multiprocessor with small overhead. More specifically, the system and method provide a procedure dealing with a data set which is sequentially renewed by a series of data having a sequence, in which snap shots of the data set at arbitrary points of time are assigned to element processors of a multiprocessor at a high speed to execute instructions corresponding to the snap shots in an efficient and parallel fashion. The apparatus includes a master memory and first and second slave memories for storing renewable data. The first and second slave memories are alternately locked and read for snapshots of the renewable data.
    Type: Grant
    Filed: October 28, 1994
    Date of Patent: May 28, 1996
    Assignee: International Business Machines Corporation
    Inventors: Kei Kawase, Takashi Matsumoto, Takao Moriyama
  • Patent number: 5315517
    Abstract: A mobile machine having active sensors for allowing similar energy waves to coexist close to each other. A mobile machine enters an exclusive transmission mode with respect to energy wave transmission when interference can occur between its own active sensor and the sensors of mother mobile machines. Prior to the transmission of energy waves, the mobile machine determines whether or not any competing mobile machine has acquired the energy wave transmission right. If not, it broadcasts a declaration of its acquisition of the right to transmit energy waves and transmits energy waves. If the transmission right has already been acquired by a competing mobile machine, it adds its own identification to a transmission queue, and increments the transmission queue each time it receives a declaration of renunciation of the right to transmit energy waves from a competing mobile machine.
    Type: Grant
    Filed: October 29, 1992
    Date of Patent: May 24, 1994
    Assignee: International Business Machines Corporation
    Inventors: Kei Kawase, Shigeki Ishikawa, Shunichi Asaka
  • Patent number: 5023533
    Abstract: Stable compliance control at a high speed is achieved by cooperation between a manipulator and a wrist body which is located at the end of the manipulator arm.
    Type: Grant
    Filed: February 9, 1990
    Date of Patent: June 11, 1991
    Assignee: International Business Machines Corporation
    Inventors: Hiroshi Ishikawa, Kei Kawase