Abstract: A wire-wound coil has a characteristic impedance that can be flexibly adjusted and can be prevented from varying undesirably. In the coil of the present invention, a primary wire part 18A and a secondary wire part 18B are wound around the surface of a core portion 14 so as to be separated from each other by a fixed distance. At the same time, at least one portion the secondary wire part 18B in a prior turn section 19X and at least one portion of the primary wire part 18A in a subsequent turn section 19Y are in close contact with each other, wherein the wire parts 18A and 18B are wound in different turns and are adjacent to each other on the same surface of the core portion 14. A method for manufacturing the wire-wound coil is also disclosed.

Abstract: A ring oscillator includes an odd number of unit circuits connected in series each of which includes an inverter. Each of the unit circuits includes the inverter and a MOSFET. The MOSFET is an FET which is a temperature sensor, and uses a drain-source leakage current in a state that the FET is normally turned off.

Abstract: A wire-wound coil has a characteristic impedance that can be flexibly adjusted and can be prevented from varying undesirably. In the coil of the present invention, a primary wire part 18A and a secondary wire part 18B are wound around the surface of a core portion 14 so as to be separated from each other by a fixed distance. At the same time, at least one portion the secondary wire part 18B in a prior turn section 19X and at least one portion of the primary wire part 18A in a subsequent turn section 19Y are in close contact with each other, wherein the wire parts 18A and 18B are wound in different turns and are adjacent to each other on the same surface of the core portion 14. A method for manufacturing the wire-wound coil is also disclosed.

Abstract: According to an aspect of the embodiment, a skew detecting unit includes at least one over delay path or racing path for detecting skew. A clock adjusting unit sets a set value of delay based on the skew detected by the skew detecting unit. A clock cell adjusts delay in a first clock according to the set value of the delay, and outputs the result as a second clock.

Abstract: A memory test circuit includes a counter circuit that outputs a set signal that is set to the first set value or the second set value alternately in a cycle of the clock signal, an OR circuit that calculates a logical sum of the set signal and the input signal each time when the set signal is output from the counter circuit and outputs a control signal indicating the logical sum of the set signal and the input signal, and a test pattern generation circuit that generates the test pattern for causing the memory to operate in each first cycle if a set value of the control signal is the first set value, or generates the test pattern for causing the memory to operate in each second cycle if the set value of the control signal is the second set value.