Patents by Inventor Keiichi Fujii
Keiichi Fujii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20060082409Abstract: A step-down voltage output circuit preventing: latch-up phenomenon in a load circuit for a period between a power-supply activation and complete start of a charge pump circuit; and rapid change of a substrate potential when a step-down voltage output is changed from ON to OFF. The step-down voltage output circuit has a timer circuit that operates depending on control signals and a timer period; a first N-channel MOS transistor in which a source is connected to a step-down voltage output terminal, a drain is connected to ground, a gate is connected to a power-supply voltage input terminal through a resistance; and a second N-channel MOS transistor in which a source is connected to the step-down voltage output terminal, a drain is connected to the gate of the first N-channel MOS transistor, and a gate is connected to an output terminal of the timer circuit.Type: ApplicationFiled: October 18, 2005Publication date: April 20, 2006Inventors: Taku Kobayashi, Keiichi Fujii, Yasunobu Kakumoto, Toshinobu Nagasawa
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Publication number: 20060072696Abstract: A semiconductor integrated circuit includes a charge pump circuit that repeats charge and discharge of a capacitor based on a clock signal when an ON/OFF control voltage is ON; a first delay circuit that delays the ON/OFF control voltage; a switch that shorts an output of the charge pump circuit and a GND input terminal when the delayed ON/OFF control voltage is OFF and opens when the delayed ON/OFF control voltage is ON; a first circuit block that is driven by a power voltage which is supplied from a power source input terminal and the charge pump circuit; and a second circuit block that is driven by a power voltage which is supplied from the power source input terminal and the GND input terminal. The first and second circuit blocks are mounted on the same semiconductor integrated circuit chip.Type: ApplicationFiled: September 22, 2005Publication date: April 6, 2006Inventors: Taku Kobayashi, Keiichi Fujii
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Patent number: 7015759Abstract: An AGC circuit of the present invention includes a first up/down counter for converting the amount of change in an output voltage higher than a threshold voltage into a count value and controlling a gain of a variable gain amplifier circuit and a second up/down counter to which a reference clock having a lower frequency than that of a reference clock supplied to the first up/down counter is supplied. Count values of the first and second up/down counters are D/A-converted and then compared with each other by a voltage comparator. An up/down count of the first up/down counter is controlled based on a comparison result and the gain of the variable gain amplifier circuit is controlled using only a signal based on the count value of the first up/down counter, thereby suppressing distortion of an output waveform and the generation of a frequency signal which is not originally input.Type: GrantFiled: July 27, 2004Date of Patent: March 21, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takuma Ishida, Keiichi Fujii
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Patent number: 6977550Abstract: An AGC circuit, which does not require any signal integration circuit comprised of a capacitor and a resistor, is provided. To achieve the above object, when amplifying or attenuating input signal by a variable gain control circuit controlled by the gain control voltage, output signal of the variable gain amplifier circuit is rectified by a rectification circuit, the output signal of the rectification circuit is compared to an arbitrary set voltage by a voltage comparator. The up-count operation and the down-count operation of the up/down counter is controlled to changeover by the output signal of the voltage comparator, and a voltage corresponding to the count value of the up/down counter is output from the D/A conversion circuit. Thus, gain control voltage corresponding to the voltage output from the D/A conversion circuit is supplied to the variable gain amplifier circuit.Type: GrantFiled: November 17, 2003Date of Patent: December 20, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takuma Ishida, Taku Kobayashi, Keiichi Fujii
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Publication number: 20050220268Abstract: In the radiographic apparatus according to this invention, when a radiographic mode designator 16 designates a non-standard radiographic mode, a signal corrector 15 uses defect information stored in one of non-standard image defect information memories 18B-18E for correcting X-ray detection signals outputted from an FPD 2. Since the pixel defect information for non-standard X-ray images is acquired by a pixel defect information converter 19 through a conversion from defect information for standard X-ray images stored in a standard image defect information memory 18A, it is unnecessary to collect output signals for pixel defect information acquisition from the FPD 2 all over again. As a result, abnormal X-ray detection signals due to defects of radiation detecting elements may be corrected promptly, regardless of how the radiation detecting elements are assigned to the pixels in the X-ray images.Type: ApplicationFiled: March 24, 2005Publication date: October 6, 2005Inventors: Keiichi Fujii, Shoichi Okamura, Susumu Adachi, Shinya Hirasawa, Toshinori Yoshimuta, Koichi Tanabe, Shigeya Asai, Akihiro Nishimura
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Patent number: 6891407Abstract: A rectified analog input signal is compared with a threshold voltage by a voltage comparator, and counting direction of an up/down counter is switched based on the comparison result, and a latch circuit retains an output of the up/down counter, and then an analog-digital converting circuit converts an output of the latch signal into a direct-current voltage. In addition, two input terminals, to which a clock for up-count operation and a clock for down-count operation are independently provided, is provided in the up/down counter, and a timing pulse generating circuit for determining reset timing of the up/down counting circuit and latch timing of the latch circuit is provided.Type: GrantFiled: March 15, 2004Date of Patent: May 10, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Taku Kobayashi, Keiichi Fujii, Takuma Ishida
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Publication number: 20050047615Abstract: To provide an audio signal amplifier and an audio apparatus having the same that automatically set the output level to an optimum level depending on power supply voltage and so on.Type: ApplicationFiled: August 23, 2004Publication date: March 3, 2005Inventors: Akihiro Kawamura, Keiichi Fujii, Junko Hirose
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Publication number: 20050046464Abstract: To provide a step-down voltage output circuit which causes no latch-up phenomenon for the period between activation of a power supply and complete start of operation of a charge pump circuit. The step-down voltage output circuit of the present invention has the charge pump circuit with a first oscillator; a timer circuit in which a timer period is set according to an oscillating frequency of the above-mentioned first oscillator; and an N-channel MOS transistor in which one N-type diffusion layer is connected to an output terminal of the above-mentioned charge pump circuit, the other N-type diffusion layer is connected to ground potential, and a gate electrode is connected to an output terminal of the above-mentioned timer circuit to become conductive for the above-mentioned timer period.Type: ApplicationFiled: August 24, 2004Publication date: March 3, 2005Inventors: Taku Kobayashi, Keiichi Fujii
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Publication number: 20050031079Abstract: A radiographic apparatus removes lag-behind parts from radiation detection signals taken from an FPD as X rays are emitted from an X-ray tube, on an assumption that the lag-behind part included in each X-ray detection signal is due to an impulse response formed of a plurality of exponential functions with different attenuation time constants. The lag-behind parts are removed by using impulse responses of the FPD corresponding, for example, to an X-ray dose used in a fluoroscopic image pickup and an X-ray dose used in a radiographic image pickup. X-ray images are created from corrected radiation detection signals with the lag-behind parts removed therefrom.Type: ApplicationFiled: July 8, 2004Publication date: February 10, 2005Inventors: Shoichi Okamura, Keiichi Fujii, Susumu Adachi, Shinya Hirasawa, Toshinori Yoshimuta, Koichi Tanabe, Shigeya Asai, Akihiro Nishimura
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Publication number: 20050031088Abstract: A subtraction image is obtained, by a subtraction process (DSA process), from a live image and a mask image. A lag-behind part included in each X-ray detection signal is considered due to an impulse response formed of exponential functions. The lag-behind part is removed from each X-ray detection signal by a recursive computation to obtain a corrected X-ray detection signal. The live image and mask image are obtained from such corrected detection signals.Type: ApplicationFiled: July 12, 2004Publication date: February 10, 2005Inventors: Shoichi Okamura, Keiichi Fujii, Susumu Adachi, Shinya Hirasawa, Toshinori Yoshimuta, Koichi Tanabe, Shigeya Asai, Akihiro Nishimura
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Publication number: 20050031070Abstract: A radiographic apparatus removes lag-behind parts from radiation detection signals taken from an FPD as X rays are emitted from an X-ray tube, on an assumption that the lag-behind part included in each X-ray detection signal is due to an impulse response formed of a plurality of exponential functions with different attenuation time constants. When a single attenuation time constant and intensity are provisionally set, checking is made whether an attenuation to a noise level of X-ray detection signals occurs in an X-ray non-emission state following an X-ray emission state. When the set attenuation time constant and intensity are found appropriate (OK), the impulse response having the single exponential function is determined valid. Corrected radiation detection signals are obtained by removing the lag-behind parts using the impulse response determined.Type: ApplicationFiled: July 29, 2004Publication date: February 10, 2005Inventors: Shoichi Okamura, Keiichi Fujii, Susumu Adachi, Shinya Hirasawa, Toshinori Yoshimuta, Koichi Tanabe, Shigeya Asai, Akihiro Nishimura
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Publication number: 20050030099Abstract: An AGC circuit of the present invention includes a first up/down counter for converting the amount of change in an output voltage higher than a threshold voltage into a count value and controlling a gain of a variable gain amplifier circuit and a second up/down counter to which a reference clock having a lower frequency than that of a reference clock supplied to the first up/down counter is supplied. Count values of the first and second up/down counters are D/A-converted and then compared with each other by a voltage comparator. An up/down count of the first up/down counter is controlled based on a comparison result and the gain of the variable gain amplifier circuit is controlled using only a signal based on the count value of the first up/down counter, thereby suppressing distortion of an output waveform and the generation of a frequency signal which is not originally input.Type: ApplicationFiled: July 27, 2004Publication date: February 10, 2005Inventors: Takuma Ishida, Keiichi Fujii
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Publication number: 20050017830Abstract: A tuner module comprising a tuner and a tuner enclosure. The tuner includes a substrate containing filter coils and the tuner enclosure includes at least one partition plate placed between filter coils of the tuner to improve the isolation between the filter coils. The substrate may also contain plated through holes placed beneath a partition plate which further improves isolation between the filter coils. In some embodiments, the substrate is comprised of a coil layer having a planar coil, a shield layer, and a dielectric layer. The dielectric layer is placed between the coil and shield layers and provides a distance between the two layers to achieve a particular quality factor level of the planar coil. In some embodiments, the tuner enclosure further includes a shielding case that extends to the base of the substrate, is comprised of a metal material, and is mechanically connected with the substrate.Type: ApplicationFiled: May 23, 2004Publication date: January 27, 2005Inventors: Kazunori Okui, Hiroshi Ogasawara, Takatsugu Kamata, Keiichi Fujii, Christopher Li
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Publication number: 20040183709Abstract: A rectified analog input signal is compared with a threshold voltage by a voltage comparator, and counting direction of an up/down counter is switched based on the comparison result, and a latch circuit retains an output of the up/down counter, and then an analog-digital converting circuit converts an output of the latch signal into a direct-current voltage. In addition, two input terminals, to which a clock for up-count operation and a clock for down-count operation are independently provided, is provided in the up/down counter, and a timing pulse generating circuit for determining reset timing of the up/down counting circuit and latch timing of the latch circuit is provided.Type: ApplicationFiled: March 15, 2004Publication date: September 23, 2004Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Taku Kobayashi, Keiichi Fujii, Takuma Ishida
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Publication number: 20040178851Abstract: An AGC circuit, which does not require any signal integration circuit comprised of a capacitor and a resistor, is provided. To achieve the above object, when amplifying or attenuating input signal by a variable gain control circuit controlled by the gain control voltage, output signal of the variable gain amplifier circuit is rectified by a rectification circuit, the output signal of the rectification circuit is compared to an arbitrary set voltage by a voltage comparator. The up-count operation and the down-count operation of the up/down counter is controlled to changeover by the output signal of the voltage comparator, and a voltage corresponding to the count value of the up/down counter is output from the D/A conversion circuit. Thus, gain control voltage corresponding to the voltage output from the D/A conversion circuit is supplied to the variable gain amplifier circuit.Type: ApplicationFiled: November 17, 2003Publication date: September 16, 2004Inventors: Takuma Ishida, Taku Kobayashi, Keiichi Fujii
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Publication number: 20040156481Abstract: A radiographic apparatus obtains lag-free radiation detection signals with lag-behind parts removed from radiation detection signals taken from a flat panel X-ray detector as X rays are emitted from an X-ray tube. The lag-behind parts are removed by a recursive computation on an assumption that the lag-behind part included in each X-ray detection signal is due to an impulse response formed of exponential functions, N in number, with different attenuation time constants. X-ray images are created from the lag-free radiation detection signals.Type: ApplicationFiled: January 16, 2004Publication date: August 12, 2004Inventors: Shoichi Okamura, Keiichi Fujii, Susumu Adachi, Shinya Hirasawa, Toshinori Yoshimuta, Koichi Tanabe, Masatomo Kaino, Hiroshi Koyama
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Patent number: 6562536Abstract: A charge-controlling agent comprising a polyamine having a repeating structure represented by the following general formula (I): The symbols in the formula are defined in the specification. Also disclosed is a toner using the charge-controlling agent.Type: GrantFiled: October 24, 2001Date of Patent: May 13, 2003Assignee: Dainippon Ink and Chemicals, Inc.Inventors: Keiichi Fujii, Hideki Ganbayashi
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Publication number: 20020081512Abstract: A charge-controlling agent comprising a polyamine having a repeating structure represented by the following general formula (I): 1Type: ApplicationFiled: October 24, 2001Publication date: June 27, 2002Applicant: DAINIPPON INK AND CHEMICALS, INC.Inventors: Keiichi Fujii, Hideki Ganbayashi