Abstract: A storage controlling apparatus includes a command decoder and command processing section. The command decoder decides whether or not a plurality of access object addresses of different commands included in a command string correspond to words different from each other in a same one of blocks of a memory cell array which have a common plate. The command processing section collectively and successively executes, when it is decided that the access object addresses of the commands correspond to the words different from each other in the same block of the memory cell array, those of operations in processing of the commands in which an equal voltage is applied as a drive voltage between the plate and a bit line.

Abstract: A storage control device includes a first rewriting section, a second rewriting section, and a first retry control section. The first rewriting section performs first rewrite to rewrite other of two binary values into a memory cell in which one of the two binary values is written. The second rewriting section performs second rewrite to rewrite the one of the two binary values into the memory cell in which the other of the two binary values is written. The first retry control section causes the memory cell that has undergone the first rewrite to be subjected to the second rewrite followed by the first rewrite again if an error occurs during the first rewrite.

Abstract: Disclosed herein is a storage controlling apparatus including: a decision portion configured to decide whether or not a bit number of a specific value from between binary values is greater than a reference value in at least part of input data to a memory cell, which executes rewriting to one of the binary values and rewriting to the other one of the binary values in order in a writing process, to generate decision data indicative of a result of the decision; and a write side outputting portion configured to output, when it is decided that the bit number is greater than the reference value, the input data at least part of which is inverted as write data to the memory cell together with the decision data.

Abstract: Disclosed herein is a storage controlling apparatus, including: a status acquisition section configured to acquire status including a number of times of execution of verification after writing into a memory from the memory; a history information retention section configured to retain a history of the status as history information in an associated relationship with each of predetermined regions of the memory; and a region selection section configured to select a region which satisfies a condition in accordance with the history information when a new region is to be used in the memory.

Abstract: Disclosed herein is a storage control apparatus including: a command processing section configured to receive a command requesting accesses to a plurality of access units by specifying an address in a memory space including a plurality of banks; and an address generating section configured to generate an address of an access unit serving as an object of the accesses in a bank selected from the banks as a bank determined in advance for the specified address.

Abstract: A storage control apparatus includes: a pre-processing-execution determining block for determining whether or not either one of an erase operation and a program operation is to be executed as pre-processing in a write operation to be carried out on a predetermined data area to serve as a write-operation object; and a pre-read processing block for reading out pre-read data from the data area prior to the write operation if a result of the determination indicates that the pre-processing is to be executed. The apparatus further includes a bit operating block for carrying out: the pre-processing and one of the erase and program operations which is not the pre-processing as post-processing if a result of the determination indicates that the pre-processing is to be executed; and the post-processing without carrying out the pre-processing if a determination result indicates that the pre-processing is not to be executed.

Abstract: A memory apparatus includes a memory having a main memory area and a replacement area, and a memory controller having a function of issuing instructions corresponding to commands to carry out transmission and reception of data and reading of status information of the memory.

Abstract: Disclosed herein is a nonvolatile memory apparatus including, a nonvolatile memory section, a standard error correction code processing section, an extended error correction code processing section, and a control section.

Abstract: A nonvolatile random access memory includes: a nonvolatile storage area that is randomly accessible and includes a data area to store data and an error-correcting-code area to store an error correcting code, the data area including at least one data area to which a data area unit size is assigned, the error-correcting-code area including at least one error-correcting-code area to which an error-correcting-code-area unit size is assigned; and a nonvolatile storage area controller to set a data size used when the at least one data area is accessed, as the data area unit size. The nonvolatile storage area controller manages the data area and the error-correcting-code area based on the set data area unit size and assigns the at least one error-correcting-code area with the error-correcting-code-area unit size to the at least one data area with the data area unit size based on the data area unit size.

Abstract: Disclosed herein is a nonvolatile memory including: a nonvolatile memory cell device including at least a nonvolatile memory cell array accessible in units of a word and further accessible at least with a fixed latency in a first access mode and with a variable latency in a second access mode; a first access path used in the first access mode; a second access path used in the second access mode; a first ECC processing part configured to be connected to the first access path and to perform error detection and correction using an ECC on the data output from the nonvolatile memory cell array in the first access mode; and a second ECC processing part configured to be connected to the second access path and to perform error detection and correction using the ECC on the data output from the nonvolatile memory cell array in the second access mode.

Abstract: A card-type peripheral device includes an electronic component including a memory disposed in a case, a terminal part including connection terminals connectable with a to-be-connected device, and a switch for disabling writing to the memory. The card-type peripheral device further includes a signal terminal capable of transmitting a signal indicating the status of the switch to the to-be-connected device.

Abstract: Disclosed herein is a nonvolatile memory, including: a memory area including a data area configured to retain data and an error correction code area configured to retain an error correction code known as ECC; and a control unit configured to control access to the memory area. The control unit includes an error detection and correction function configured to detect an error in the data read from the data area and to correct the detected error, at least one save area configured such that if data at a designated address and ECC corresponding thereto are read from the memory area and if an error is detected, then the save area retaining the address and correct data corresponding thereto, and a validity presentation block configured to indicate whether or not the address and the correct data retained in the save area are valid.

Abstract: A storage unit includes: a random access memory device and a storage device to be accessed using an address in units of word and sector, respectively; and a storage controller controlling accesses to the random access memory device and the storage device according to the addresses designated via a bus. The storage controller includes first and second interface functions for access to data stored on the storage device and the random access memory designated using the sector address and the word address provided via the bus, respectively, a function of using the random access memory device as a first disk cache and determining data to be saved in the random access memory device in response to the access by the first interface function, and functions of transferring the data designated using the sector address by repeating register access and by a bus master function as continuous word-sized data through the bus.

Abstract: A card-type peripheral device having a plurality of specifications of external interfaces includes a connector configured to connect the card-type peripheral device to a connectable device connectable to the card-type peripheral device, the connector including a dedicated terminal in which an interface to be used is set; an electronic component configured to be accessed via the set interface; a plurality of interface function units each configured to control an interface compliant with one of the plurality of specifications; and a communication function unit configured to perform communication with the electronic component using one of the interface function units having a specification corresponding to a setting of the dedicated terminal.

Abstract: Disclosed herein is a nonvolatile memory apparatus including, a nonvolatile memory section, a standard error correction code processing section, an extended error correction code processing section, and a control section.

Abstract: A nonvolatile random access memory includes: a nonvolatile storage area that is randomly accessible and includes a data area to store data and an error-correcting-code area to store an error correcting code, the data area including at least one data area to which a data area unit size is assigned, the error-correcting-code area including at least one error-correcting-code area to which an error-correcting-code-area unit size is assigned; and a nonvolatile storage area controller to set a data size used when the at least one data area is accessed, as the data area unit size. The nonvolatile storage area controller manages the data area and the error-correcting-code area based on the set data area unit size and assigns the at least one error-correcting-code area with the error-correcting-code-area unit size to the at least one data area with the data area unit size based on the data area unit size.

Abstract: A memory apparatus includes a memory having a main memory area and a replacement area, and a memory controller having a function of issuing instructions corresponding to commands to carry out transmission and reception of data and reading of status information of the memory.

Abstract: A data storing system including: a non-volatile memory configured to have a plurality of memory blocks each capable of independently operating and allow random access to each of addresses; a controller configured to control writing of data to the non-volatile memory; and an executing unit configured to execute a predetermined application, wherein the executing unit decides the number of interleaves indicating the number of memory blocks operated in parallel among the plurality of memory blocks, and the executing unit notifies the controller of the decided number of interleaves.

Abstract: A card-type peripheral device includes an electronic component disposed in a case, and a terminal part including connection terminals connectable with a to-be-connected device, wherein a function of the electronic component and the number of terminals of the terminal part are maintained to be compatible with those of the to-be-connected device, and the outside dimensions of the case are set to be smaller than the outside dimensions of the to-be-connected device and greater than the outside dimensions of a predetermined small-size card.

Abstract: A nonvolatile storage device includes a nonvolatile memory configured to store user data and management information used to manage the user data on a file system, and a medium controller configured to determine whether a command input from a host device is used for the user data or the management information, the command describing content of processing performed for the user data or the management information, and switch between control methods used for the nonvolatile memory on the basis of the determination result.