Patents by Inventor Keiichi Yamaguchi

Keiichi Yamaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7352900
    Abstract: A method for processing particle images are described that include: receiving image information obtained by capturing an image of a particle; determining the circumferential length and number of inflection points in the contour of a particle image based on the received image information; and calculating the degree of irregularity of the particle based on the determined circumferential length and number of inflection points.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: April 1, 2008
    Assignee: Sysmex Corporation
    Inventors: Keiichi Yamaguchi, Hideo Kusuzawa, Kouhei Shiba
  • Publication number: 20080025435
    Abstract: A communicating apparatus includes: a local signal generator, an orthogonal modulator, an orthogonal demodulator, and two orthogonal error compensators. The local signal generator generates a first local signal and a second local signal. The orthogonal modulator modulates an input signal into a modulation signal by using the first local signal. The orthogonal demodulator demodulates the modulation signal into a demodulation signal by using the second local signal. Each of the two orthogonal error compensators corrects orthogonal modulation error generated in the orthogonal modulator and an orthogonal demodulation error generated in the orthogonal demodulator respectively. Set values to be set to the orthogonal error compensators are calculated based on (1) a phase difference between the first local signal and the second local signal, (2) the input signal and (3) the demodulation signal.
    Type: Application
    Filed: March 21, 2007
    Publication date: January 31, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Keiichi Yamaguchi, Atsushi Yamaoka
  • Patent number: 7312107
    Abstract: A manufacturing method of a semiconductor device formed in a chip size package is improved to enhance a yield and reliability. A window to expose first wirings is formed only in a region of a semiconductor substrate where the first wirings exist. As a result, area of the semiconductor substrate bonded to a supporting body through an insulation film and a resin is increased to prevent cracks in the supporting body and separation of the semiconductor substrate from the supporting body. A slit is formed along a dicing line after forming the window, the slit is covered with a protection film and then the semiconductor substrate is diced into individual semiconductor dice. Thus, separation on a cut surface or at an edge of the semiconductor dice, which otherwise would be caused by contact of the blade in the dicing can be prevented.
    Type: Grant
    Filed: August 4, 2004
    Date of Patent: December 25, 2007
    Assignees: Sanyo Electric Co., Ltd., Kanto Sanyo Semiconductors Co., Ltd.
    Inventors: Takashi Noma, Katsuhiko Kitagawa, Hisao Otsuka, Akira Suzuki, Yoshinori Seki, Yukihiro Takao, Keiichi Yamaguchi, Motoaki Wakui, Masanori Iida
  • Publication number: 20070288550
    Abstract: There is provided with a remote control method using a terminal device connected to a first network and an information processing server connected to a second network, including: setting a tunnel between the terminal device and the information processing server; transmitting a broadcast or multicast packet output from service providing servers on the first network to the information processing server via the tunnel to cause the server to find the service providing servers and services provided by the service providing servers; notifying the terminal device of the services found, from the information processing server via the tunnel or the second network; and if execution request of the service is received by the information processing server from the terminal device via the tunnel or the second network, conducting data communication concerning the service between a service providing server providing the service and the information processing server, via the second network.
    Type: Application
    Filed: March 28, 2006
    Publication date: December 13, 2007
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kotaro Ise, Shinya Murai, Takuya Kawamura, Masataka Goto, Keiichi Yamaguchi
  • Patent number: 7221920
    Abstract: A voltage controlled oscillator includes a resonator configured to resonate with an initial oscillation frequency during starting period of oscillation and a steady oscillation frequency during a steady state oscillation. The resonator includes a film bulk acoustic resonator having a series resonance frequency higher than the steady oscillation frequency. A negative resistance circuit configured to drive the resonator, has a positive increment for reactance in the steady state oscillation compared with reactance in the starting period.
    Type: Grant
    Filed: July 15, 2004
    Date of Patent: May 22, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhide Abe, Mayumi Morizuka, Ryoichi Ohara, Kenya Sano, Naoko Yanase, Takaaki Yasumoto, Tadahiro Sasaki, Kazuhiko Itaya, Takashi Kawakubo, Hiroshi Yoshida, Ryuichi Fujimoto, Keiichi Yamaguchi, Nobuyuki Itoh, Tooru Kozu, Takeshi Ookubo
  • Patent number: 7207221
    Abstract: A piezo-electric vibration reed 1 including connection arms extended in opposing directions from a base 12, drive arms extended in a direction perpendicular to the connection arms at the respective tips of the connection arms 13 and 14, and detection arms extended from the base 12 in a direction perpendicular to the connection arms. In the respective tips of the drive arms, and the detection arms, there are formed a first deadweight portion and a second deadweight portion, which are adjustment portions used for mass adjustment. The adjustment portions are formed of deadweight layers and an electrode film.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: April 24, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Osamu Kawauchi, Shigeki Miyazawa, Katsumi Takayama, Keiichi Yamaguchi
  • Publication number: 20070075382
    Abstract: An integrated circuit is provided, and in the integrated circuit, a microlens array is formed with a silicon nitride film which provides an interlayer insulation film for Al wiring, so that any stress migration in the Al wiring and any deformation of lens shape can be prevented. A silicon nitride film is formed on a semiconductor substrate as an interlayer insulation film between a first-layer wiring and a second-layer wiring. The silicon nitride film includes, in an image pickup section, a lens array having a plurality of convex lenses which are formed with a surface of the silicon nitride film. A silicon dioxide film is grown on the silicon nitride film. Then, a second Al film is formed on the silicon dioxide film. The Al film is etched in an unnecessary portion such as the surfaces of the lens array, to form wiring.
    Type: Application
    Filed: September 27, 2006
    Publication date: April 5, 2007
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Keiichi Yamaguchi, Seiji Kai
  • Publication number: 20070063972
    Abstract: Image control involves receiving source images defined with respect to respective source coordinate systems from source image generators also respectively associated with source IDs. The source images are composed to generate a composite image defined with respect to a composed coordinate system, and the composed image is sent to a viewer which displays the composed image and outputs an HID signal which indicates information defined with respect to the composed coordinate system. A layout manager stores source IDs respectively associated with layout information including position and size of at least one of the source images. An image composer composes the source images according to the layout information. An analyzer analyzes the HID signal for editing layout information stored in the layout manager, and determines a source ID associated with a source image according to the edited layout information.
    Type: Application
    Filed: September 20, 2006
    Publication date: March 22, 2007
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takuya Kawamura, Shinya Murai, Kotaro Ise, Masataka Goto, Keiichi Yamaguchi
  • Patent number: 7138862
    Abstract: A power amplifier includes amplifier elements to amplify input signals of different frequencies. The amplifier also includes a power supply circuit that includes a common power supply path including an end connected to a power supply input terminal connected to a DC power supply. The amplifier further includes individual power supply paths each including an end connected to the other end of the common power supply path, and the other end connected to the main electrode of a corresponding one of the amplifier elements. The individual power supply paths have different impedances.
    Type: Grant
    Filed: October 26, 2005
    Date of Patent: November 21, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuta Araki, Hiroyuki Kayano, Keiichi Yamaguchi
  • Publication number: 20060246855
    Abstract: There is provided with an amplifier comprising: first and second power amplifiers; a first path configured to output first and second input signals to the first and second power amplifiers; a second path configured to divide a first input signal, output one of divided signals to the first power amplifier and output the other divided signal to the second power amplifier; a first path changeover unit configured to change over the first and second paths; a third path configured to output first and second power amplified signals from the first and second power amplifiers; a fourth path configured to combines a first power amplified signal through an impedance conversion unit from the first power amplifier and a second power amplified signal from the second power amplifier at a combining point and output a combined signal; and a second path changeover unit configured to changeover the third and fourth paths.
    Type: Application
    Filed: March 23, 2006
    Publication date: November 2, 2006
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takayuki Kato, Hiroshi Yoshida, Ichiro Seto, Keiichi Yamaguchi
  • Publication number: 20060240176
    Abstract: A method for freeze drying confectionary is provided, whereby a confectionary is provided that can be stored for long periods of time without deformation. Further, a confectionery is provided using cream comprising 28 to 33 parts by weight of cream having a milk fat content of 42% to 48%, 28 to 33 parts by weight of cream having a milk fat content of 32% to 38%, 28 to 33 parts by weight of vegetable-based cream, and 5 to 10 parts by weight of sugar. The confectionery is freeze dried by: freezing the confectionery; subsequently setting the drying pressure to 0.60 to 0.65 Torr; performing primary sublimation by drying at a temperature of 25° C. to 40° C., for 3 to 4 hours; subsequently performing secondary sublimation by drying at a temperature of 60° C. to 70° C. for 18 to 20 hours; and further performing tertiary sublimation by drying at a temperature of 35° C. to 45° C. for 1.5 to 4.5 hours.
    Type: Application
    Filed: March 28, 2006
    Publication date: October 26, 2006
    Inventors: Keiichi Yamaguchi, Hironobu Tsujiguchi, Hiroyuki Kamijo, Shunzo Oike
  • Patent number: 7095276
    Abstract: A power amplifier includes amplifier elements to amplify input signals of different frequencies. The amplifier also includes a power supply circuit that includes a common power supply path including an end connected to a power supply input terminal connected to a DC power supply. The amplifier further includes individual power supply paths each including an end connected to the other end of the common power supply path, and the other end connected to the main electrode of a corresponding one of the amplifier elements. The individual power supply paths have different impedances.
    Type: Grant
    Filed: October 26, 2005
    Date of Patent: August 22, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuta Araki, Hiroyuki Kayano, Keiichi Yamaguchi
  • Patent number: 7091776
    Abstract: A power amplifier includes amplifier elements to amplify input signals of different frequencies. The amplifier also includes a power supply circuit that includes a common power supply path including an end connected to a power supply input terminal connected to a DC power supply. The amplifier further includes individual power supply paths each including an end connected to the other end of the common power supply path, and the other end connected to the main electrode of a corresponding one of the amplifier elements. The individual power supply paths have different impedances.
    Type: Grant
    Filed: October 26, 2005
    Date of Patent: August 15, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuta Araki, Hiroyuki Kayano, Keiichi Yamaguchi
  • Publication number: 20060141750
    Abstract: A method for manufacturing a semiconductor integrated device includes steps of forming an integrated circuit element on a semiconductor substrate, forming internal wiring, forming a groove along a scribe line on a back surface of the semiconductor substrate to expose a portion of the internal wiring, forming a metal film covering at least the groove, patterning the metal film to form external wiring and removing the metal film at a bottom portion of the groove, forming a protection film covering the external wiring and the bottom portion of the groove, and separating the semiconductor substrate along the scribe line.
    Type: Application
    Filed: November 12, 2003
    Publication date: June 29, 2006
    Inventors: Nobuhiro Suzuki, Kenji Imai, Isaya Kitamura, Keiichi Yamaguchi
  • Publication number: 20060103941
    Abstract: In order to efficiently form microlenses wide in light receiving surfaces, microlenses are manufactured according to the following process. A first light transmitting film on which columnar projections are formed with a predetermined interval is formed on a semiconductor substrate. A second light transmitting film made of a material same as that of the first light transmitting film is laminated on a surface of the first light transmitting film, and a planar shape of the projection is enlarged to make a separation between the projections narrower. Argon ions are irradiated onto the second light transmitting film to round off a corner of the second light transmitting film, and thereby a lens is formed.
    Type: Application
    Filed: November 15, 2005
    Publication date: May 18, 2006
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Keiichi Yamaguchi, Seiji Kai
  • Patent number: 7046085
    Abstract: A power amplifier includes amplifier elements to amplify input signals of different frequencies. The amplifier also includes a power supply circuit that includes a common power supply path including an end connected to a power supply input terminal connected to a DC power supply. The amplifier further includes individual power supply paths each including an end connected to the other end of the common power supply path, and the other end connected to the main electrode of a corresponding one of the amplifier elements. The individual power supply paths have different impedances.
    Type: Grant
    Filed: October 26, 2005
    Date of Patent: May 16, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuta Araki, Hiroyuki Kayano, Keiichi Yamaguchi
  • Patent number: 7046974
    Abstract: A radio frequency circuit includes a radio frequency signal source which produces a radio frequency signal, a power amplifier which power amplifies the radio frequency signal from the radio frequency signal source, and a control unit which controls an output power of the power amplifier. Particularly, the control unit is configured to hold control data defining a relationship among an output power, a gain, and an operation bias point of the power amplifier and adjust the operation bias point of the power amplifier based on the control data such that the output power of the power amplifier is set into a level designated by an external power designating instruction.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: May 16, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Keiichi Yamaguchi
  • Patent number: 7046084
    Abstract: A power amplifier includes amplifier elements to amplify input signals of different frequencies. The amplifier also includes a power supply circuit that includes a common power supply path including an end connected to a power supply input terminal connected to a DC power supply. The amplifier further includes individual power supply paths each including an end connected to the other end of the common power supply path, and the other end connected to the main electrode of a corresponding one of the amplifier elements. The individual power supply paths have different impedances.
    Type: Grant
    Filed: October 26, 2005
    Date of Patent: May 16, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuta Araki, Hiroyuki Kayano, Keiichi Yamaguchi
  • Patent number: 7034631
    Abstract: A microwave filter is disposed on a substrate. The microwave filter is adapted for connecting a first microwave transmission line to a second microwave transmission line, configured such that a signal propagates from the first to second microwave transmission lines. The microwave filter encompasses a highpass component of filter disposed in a symmetrical configuration with respect to a median plane placed perpendicular to the surface of the substrate, including the central axis of the first and second microwave transmission lines; and a lowpass component of filter connected parallel with the highpass component of filter, the lowpass component of filter being disposed in a symmetrical configuration with respect to the median plane.
    Type: Grant
    Filed: February 24, 2005
    Date of Patent: April 25, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoko Ono, Keiichi Yamaguchi
  • Publication number: 20060070442
    Abstract: A piezo-electric vibration reed 1 including connection arms extended in opposing directions from a base 12, drive arms extended in a direction perpendicular to the connection arms at the respective tips of the connection arms 13 and 14, and detection arms extended from the base 12 in a direction perpendicular to the connection arms. In the respective tips of the drive arms, and the detection arms, there are formed a first deadweight portion and a second deadweight portion, which are adjustment portions used for mass adjustment. The adjustment portions are formed of deadweight layers and an electrode film.
    Type: Application
    Filed: September 29, 2005
    Publication date: April 6, 2006
    Inventors: Osamu Kawauchi, Shigeki Miyazawa, Katsumi Takayama, Keiichi Yamaguchi