Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region; a second semiconductor region having a side face and a lower face, and the faces surrounded by the first semiconductor region; a third semiconductor region provided between the second semiconductor region and the first semiconductor region; a fourth semiconductor region being in contact with an outer side face of the first semiconductor region; a plurality of first electrodes being in contact with the second semiconductor region, the third semiconductor region, and the first semiconductor region via an insulating film; a plurality of pillar areas extending from the third semiconductor region toward the fourth semiconductor region, each of the plurality of pillar areas being provided between adjacent ones of the plurality of first electrodes. An impurity density of each of the pillar areas and an impurity density of the third semiconductor region is substantially the same.

Abstract: According to one embodiment, a semiconductor device includes a drift region of a first conductivity type, a base region of a second conductivity type, a source region of the first conductivity type, a gate electrode in a trench shape, a contact region of the second conductivity type, a drain electrode, and a source electrode. The drift region is selectively provided in a drain layer of the first conductivity type from a surface of the drain layer to an inside of the drain layer. The base region is selectively provided in the drift region from a surface of the drift region to an inside of the drift region. The source region is selectively provided in the base region from a surface of the base region to an inside of the base region. The gate electrode penetrates from a part of the source region through the base region adjacent to the part of the source region to reach a part of the drift region in a direction substantially parallel to a major surface of the drain layer.

Abstract: According to one embodiment, a semiconductor device includes: a drain layer; a drift layer formed on the drain layer, an effective impurity concentration of the drift layer being lower than an effective impurity concentration of the drain layer; a base layer formed on the drift layer; a source layer selectively formed on the base layer; a gate insulating film formed on inner surfaces of trenches, the trenches piercing the base layer from an upper surface of the source layer; a gate electrode filled into an interior of the trench; an inter-layer insulating film formed on the trench to cover an upper surface of the gate electrode, at least an upper surface of the inter-layer insulating film being positioned higher than the upper surface of the source layer; and a contact mask. The contact mask is formed on the inter-layer insulating film, and is conductive or insulative.

Abstract: A semiconductor device comprises an insulated gate field effect transistor and a protection diode. The insulated gate field effect transistor has a gate electrode formed on a gate insulating film, a source and a drain. The source and the drain are formed in a first area of a semiconductor substrate. A first silicon oxide film is formed on a second area of the semiconductor substrate adjacent to the first area. The first silicon oxide film is thicker than the gate insulating film and contains larger amount of impurities than the gate insulating film. A poly-silicon layer is formed on the first silicon oxide film. The protection diode has a plurality of PN-junctions formed in the poly-silicon layer. The protection diode is connected between the gate electrode and the source so as to prevent breakdown of the gate insulating film.

Abstract: According to one embodiment, a semiconductor device includes a drift region of a first conductivity type, a base region of a second conductivity type, a source region of the first conductivity type, a gate electrode in a trench shape, a contact region of the second conductivity type, a drain electrode, and a source electrode. The drift region is selectively provided in a drain layer of the first conductivity type from a surface of the drain layer to an inside of the drain layer. The base region is selectively provided in the drift region from a surface of the drift region to an inside of the drift region. The source region is selectively provided in the base region from a surface of the base region to an inside of the base region. The gate electrode penetrates from a part of the source region through the base region adjacent to the part of the source region to reach a part of the drift region in a direction substantially parallel to a major surface of the drain layer.

Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, a gate region, a gate insulating film, and an electric field relaxation region. The first semiconductor region includes a first portion and a second portion. The second semiconductor region includes a third portion and a fourth portion. The third semiconductor region includes a fifth portion and a sixth portion. The fourth semiconductor region is adjacent to the sixth portion. The gate region is provided inside a trench made in a second direction orthogonal to the first direction. The gate insulating film is provided between the gate region and an inner wall of the trench. The electric field relaxation region is provided between the third portion and the fifth portion and has an impurity concentration lower than an impurity concentration of the third semiconductor region.

Abstract: A semiconductor device comprises an insulated gate field effect transistor and a protection diode. The insulated gate field effect transistor has a gate electrode formed on a gate insulating film, a source and a drain. The source and the drain are formed in a first area of a semiconductor substrate. A first silicon oxide film is formed on a second area of the semiconductor substrate adjacent to the first area. The first silicon oxide film is thicker than the gate insulating film and contains larger amount of impurities than the gate insulating film. A poly-silicon layer is formed on the first silicon oxide film. The protection diode has a plurality of PN-junctions formed in the poly-silicon layer. The protection diode is connected between the gate electrode and the source so as to prevent breakdown of the gate insulating film.

Abstract: A semiconductor device includes: a semiconductor layer, a first semiconductor region provided on a major surface of the semiconductor layer, a second semiconductor region provided in a surface portion of the first semiconductor region, a trench extending through the second semiconductor region and the first semiconductor region to the semiconductor layer, a first insulating film provided on an inner wall of the trench, a third semiconductor region filling the trench below an interface between the semiconductor layer and the first semiconductor region, a second insulating film provided on the third semiconductor region, a gate electrode filling the trench above the second insulating film. A portion of the first insulating film in contact with the semiconductor layer is opened. The semiconductor layer is in contact with the third semiconductor region through the opened portion.

Abstract: A semiconductor device comprises a semiconductor substrate having a gate trench formed therein. A gate electrode is formed on a gate insulator in the gate trench. The gate electrode has ends close to the bottom of the gate trench, which are separated in a direction perpendicular to both sides of the gate trench, and portions except the separated ends, at least part of which is made higher in conductivity than other parts.

Abstract: A semiconductor device includes: a semiconductor layer, a first semiconductor region provided on a major surface of the semiconductor layer, a second semiconductor region provided in a surface portion of the first semiconductor region, a trench extending through the second semiconductor region and the first semiconductor region to the semiconductor layer, a first insulating film provided on an inner wall of the trench, a third semiconductor region filling the trench below an interface between the semiconductor layer and the first semiconductor region, a second insulating film provided on the third semiconductor region, a gate electrode filling the trench above the second insulating film. A portion of the first insulating film in contact with the semiconductor layer is opened. The semiconductor layer is in contact with the third semiconductor region through the opened portion.

Abstract: A method of fabricating a semiconductor device includes: forming an insulating film on a semiconductor body to cover a termination area surrounding a cell area; forming a mask material film to cover the cell area and the insulating film; forming a resist film to cover the mask material film; patterning the resist film to have an opening serving as a gate-use resist pattern above the cell area and another opening serving as a dummy resist pattern above the insulating film; selectively etching the mask material film by use of the patterned resist film as a mask so that the insulating film is remained under the dummy resist pattern; selectively etching the semiconductor body by use of the patterned mask material film as another mask to form a trench in the cell area as corresponding to the gate-use resist pattern; and burying gate material in the trench to form the trench gate.

Abstract: A semiconductor device includes: a semiconductor layer, a first semiconductor region provided on a major surface of the semiconductor layer, a second semiconductor region provided in a surface portion of the first semiconductor region, a trench extending through the second semiconductor region and the first semiconductor region to the semiconductor layer, a first insulating film provided on an inner wall of the trench, a third semiconductor region filling the trench below an interface between the semiconductor layer and the first semiconductor region, a second insulating film provided on the third semiconductor region, a gate electrode filling the trench above the second insulating film. A portion of the first insulating film in contact with the semiconductor layer is opened. The semiconductor layer is in contact with the third semiconductor region through the opened portion.

Abstract: The present invention is a semiconductor device which includes: a semiconductor substrate; a BOX film disposed on top of the semiconductor substrate; an active layer disposed on top of the BOX film; a base region disposed proximate to a surface of the active layer; a first main electrode region disposed within the base region; a second main electrode region formed from the surface of the active layer to a surface of the BOX film or protruding through the BOX film, and the second main electrode region being spaced from the base region; a gate insulator film disposed on the surface of the base region; a gate electrode disposed on top of the gate insulator film; a first main electrode connected to the first main electrode region; a second main electrode connected to the second main electrode region; and a ground electrode connected to the semiconductor substrate on an opposite side surface from a surface having the BOX film on the semiconductor substrate.

Abstract: A power semiconductor device comprises a semiconductor layer; a polysilicon-containing gate; a first semiconductor region formed in said semiconductor layer at one surface of said semiconductor layer and operative to serve as at least one of a source region and an emitter region; a second semiconductor region formed in said semiconductor layer at the other surface of said semiconductor layer and operative to serve as at least one of a drain region and a collector region; a gate routing wire commonly connected to a plurality of said gates and including a polysilicon portion and a metal portion formed adjacent to it in the direction of plane of said semiconductor layer; an interlayer insulator film formed to cover said first semiconductor region, said gate routing wire and a plurality of said gates; an electrode portion formed in said interlayer insulator film and connected to said first semiconductor region; and a strap electrode plate located to cover said interlayer insulator on said gate routing wire and co

Abstract: A semiconductor device comprises a semiconductor substrate having a gate trench formed therein. A gate electrode is formed on a gate insulator in the gate trench. The gate electrode has ends close to the bottom of the gate trench, which are separated in a direction perpendicular to both sides of the gate trench, and portions except the separated ends, at least part of which is made higher in conductivity than other parts.

Abstract: A semiconductor device is provided, which includes a first main electrode region having an upper main surface and a lower main surface; a drift layer of a first conductivity type formed on the upper main surface of the first main electrode region; a base layer of a second conductivity type formed on the drift layer; a second main electrode region of the first conductivity type formed on the base layer; a trench formed through the second main electrode region to the drift layer; a gate insulation film formed on an inner wall of the trench; and a gate electrode buried in the trench with the gate insulation film interposed therebetween, wherein the drift layer includes a graded region close to the first main electrode region, the graded region having band gap decreasing from the base layer toward the first main electrode region.

Abstract: A power semiconductor device according to the present invention comprises: a first conductive type base layer; a second conductive type base layer selectively formed on the first conductive type base layer; an insulation layer formed in the region on the first conductive type base layer on which the second conductive type base layer is not formed; a gate insulation film formed on the inner surface of a trench formed between the second conductive type base layer and the insulation layer so as to separate them from each other and to reach the first conductive type base layer from the surface of the second conductive type base layer; a first conductive type source layer selectively formed on the surface of the second conductive type base layer in contact with the gate insulation film; a gate electrode formed in the trench and insulated from the first conductive type base layer, the second conductive type base layer, and the first conductive type source layer by the gate insulation film; a main electrode electric

Abstract: A method of fabricating a semiconductor device includes: forming an insulating film on a semiconductor body to cover a termination area surrounding a cell area; forming a mask material film to cover the cell area and the insulating film; forming a resist film to cover the mask material film; patterning the resist film to have an opening serving as a gate-use resist pattern above the cell area and another opening serving as a dummy resist pattern above the insulating film; selectively etching the mask material film by use of the patterned resist film as a mask so that the insulating film is remained under the dummy resist pattern; selectively etching the semiconductor body by use of the patterned mask material film as another mask to form a trench in the cell area as corresponding to the gate-use resist pattern; and burying gate material in the trench to form the trench gate.

Abstract: A trench MIS device includes a drain region, a base region disposed on the drain region, the base region having a channel face, a source region disposed on the base region, the source region having a source end face, the source end face being continuous with the channel face, a gate insulator disposed along the channel face and the source end face, a gate electrode disposed opposite to the channel face through the gate insulator, and a cavity portion provided in the drain region, the cavity portion being opposite to the gate electrode.

Abstract: The present invention is a semiconductor device which includes: a semiconductor substrate; a BOX film disposed on top of the semiconductor substrate; an active layer disposed on top of the BOX film; a base region disposed proximate to a surface of the active layer; a first main electrode region disposed within the base region; a second main electrode region formed from the surface of the active layer to a surface of the BOX film or protruding through the BOX film, and the second main electrode region being spaced from the base region; a gate insulator film disposed on the surface of the base region; a gate electrode disposed on top of the gate insulator film; a first main electrode connected to the first main electrode region; a second main electrode connected to the second main electrode region; and a ground electrode connected to the semiconductor substrate on an opposite side surface from a surface having the BOX film on the semiconductor substrate.