Patents by Inventor Keith Edward Fogel
Keith Edward Fogel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20080112147Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: May 15, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
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Publication number: 20080112146Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: May 15, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
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Publication number: 20080112145Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: May 15, 2008Applicant: International Business Machines CorporationInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
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Publication number: 20080111569Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: May 15, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
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Publication number: 20080111570Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: May 15, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
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Publication number: 20080112144Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: May 15, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
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Patent number: 7368924Abstract: The present invention is directed to structures having a plurality of discrete insulated elongated electrical conductors projecting from a support surface which are useful as probes for testing of electrical interconnections to electronic devices, such as integrated circuit devices and other electronic components and particularly for testing of integrated circuit devices with rigid interconnection pads and multi-chip module packages with high density interconnection pads and the apparatus for use thereof and to methods of fabrication thereof. Coaxial probe structures are fabricated by the methods described providing a high density coaxial probe.Type: GrantFiled: July 23, 2002Date of Patent: May 6, 2008Assignee: International Business Machines CorporationInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Yun-Hsin Liao, Daniel Peter Morris, Da-Yuan Shih
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Patent number: 7332922Abstract: Probes for electronic devices are described. The probe is formed by ball bonding a plurality of wires to contact locations on a fan out substrate surface. The wires are cut off leaving stubs. A patterned polymer sheet having electrical conductor patterns therein is disposed over the stubs which extend through holes in the sheet. The ends of the wires are flattened to remit the polymer sheet in place. The wire is connected to an electrical conductor on the polymer sheet which is converted to a contact pad on the polymer sheet. A second wire is ball bonded to the pad on the polymer sheet and cut to leave a second stub. The polymer sheet is laser cut so that each second stub is free to move independently of the other second studs. The ends of the second stubs are disposed against contact locations of an electronic device, such as an FC chip, to test the electronic device.Type: GrantFiled: April 7, 2005Date of Patent: February 19, 2008Assignee: International Business Machines CorporationInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih
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Patent number: 7291539Abstract: The present invention provides an improved amorphization/templated recrystallization (ATR) method for fabricating low-defect-density hybrid orientation substrates. ATR methods for hybrid orientation substrate fabrication generally start with a Si layer having a first orientation bonded to a second Si layer or substrate having a second orientation. Selected regions of the first Si layer are amorphized and then recrystallized into the orientation of the second Si layer by using the second Si layer as a template. The process flow of the present invention solves two major difficulties not disclosed by prior art ATR methods: the creation of “corner defects” at the edges of amorphized Si regions bounded by trenches, and undesired orientation changes during a high temperature post-recrystallization defect-removal annealing of non-ATR'd regions not bounded by trenches.Type: GrantFiled: June 1, 2005Date of Patent: November 6, 2007Assignee: International Business Machines CorporationInventors: Keith Edward Fogel, Katherine L. Saenger, Chun-Yung Sung, Haizhou Yin
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Patent number: 7285473Abstract: The present invention provides a method for forming low-defect density changed-orientation Si by amorphization/templated recrystallization (ATR) processes in which regions of Si having a first crystal orientation are amorphized by ion implantation and then recrystallized into the orientation of a template layer having a different orientation. More generally, the invention relates to the high temperature annealing conditions needed to eliminate the defects remaining in Si-containing single crystal semiconductor materials formed by ion-implant-induced amorphization and templated recrystallization from a layer whose orientation may be the same or different from the amorphous layer's original orientation. The key component of the inventive method is a thermal treatment for minutes to hours in the the temperature range 1250-1330° C. to remove the defects remaining after the initial recrystallization anneal.Type: GrantFiled: January 7, 2005Date of Patent: October 23, 2007Assignee: International Business Machines CorporationInventors: Joel Pereira de Souza, Keith Edward Fogel, John Albrecht Ott, Devendra Kumar Sadana, Katherine Lynn Saenger
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Patent number: 7282945Abstract: A structure useful as a probe for testing electrical interconnections to integrated circuit devices and other electronic components having a substrate with a bond wire elongated electrical conductor extending away from the surface of the substrate. Each of the bond wire elongated electrical conductors has a first end affixed to the surface at an electrical contact location and a multitude of second ends projecting away from the surface. The first end and said second end of bond wire elongated electrical connector has a ball-shaped protuberance positioned thereon and there existsa in the system means for permitting each of the second ends to move about reference positions. The element which contains means for permitting each of the second ends to move about reference positions is a sheet of material having a plurality of through-holes therein through which the second ends project. There is a perforation in each said sheet in the vicinity of said openings.Type: GrantFiled: September 12, 1997Date of Patent: October 16, 2007Assignee: International Business Machines CorporationInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Da-Yuan Shih
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Patent number: 7276919Abstract: A high density integrated test probe and method of fabrication is described. A group of wires are ball bonded to contact locations on the surface of a fan out substrate. The wires are sheared off leaving a stub, the end of which is flattened by an anvil. Before flattening a sheet of material having a group of holes is arranged for alignment with the group of stubs is disposed over the stubs. The sheet of material supports the enlarged tip. The substrate with stubs form a probe which is moved into engagement with contact locations on a work piece such as a drip or packaging substrate.Type: GrantFiled: November 20, 1996Date of Patent: October 2, 2007Assignee: International Business Machines CorporationInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice H. Norcott, Da-Yuan Shih, George Frederick Walker
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Patent number: 6891360Abstract: A plated test probe structure for testing electrical connections to integrated circuits (IC) devices with solder bumped interconnection pads that are an integral part of the fan-out wiring on the test substrate, or other printed wiring device.Type: GrantFiled: October 2, 1998Date of Patent: May 10, 2005Assignee: International Business Machines CorporationInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Eugene John O'Sullivan, Da-Yuan Shih, Ho-Ming Tong
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Patent number: 6880245Abstract: Probes for electronic devices are described. The probe is formed by ball bonding a plurality of wires to contact locations on a fan out substrate surface. The wires are cut off leaving stubs. A patterned polymer sheet having electrical conductor patterns therein is disposed over the stubs which extend through holes in the sheet. The ends of the wires are flattened to remit the polymer sheet in place. The wire is connected to an electrical conductor on the polymer sheet which is converted to a contact pad on the polymer sheet. A second wire is ball bonded to the pad on the polymer sheet and cut to leave a second stub. The polymer sheet is laser cut so that each second stub is free to move independently of the other second studs. The ends of the second stubs are disposed against contact locations of an electronic device, such as an FC chip, to test the electronic device.Type: GrantFiled: December 19, 2003Date of Patent: April 19, 2005Assignee: International Business Machines CorporationInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih
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Publication number: 20040148773Abstract: A method is described having the steps of providing a surface having a plurality of wire bondable locations, wire bonding a wire to each of the wire bondable locations using a wire capillary tool; controlling the position of the capillary tool with respect to the substrate; after forming a wire bond of the wire to the wire bondable location moving the capillary tool relative to the surface as the capillary tool is moved away from the surface to form a wire having a predetermined shape.Type: ApplicationFiled: December 16, 2003Publication date: August 5, 2004Inventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Da-Yuan Shih
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Publication number: 20040135594Abstract: In the invention a compliant interposer is provided that accommodates variations in contact height, contact location, and contact materials. The interposer is in direct contact in the interface between the contact surface of the IC under test and the fan out wiring surface of the test equipment and which carries interconnection ability that is compliant with respect to the interfaces. The interposer has structurally parallel contacting layers that are compressively held apart at a separation distance by a fame member that in turn has areas in which interconnect members can move in accommodating spatial variations in the IC and fan out contacts in the interface. Each layer of the interposer, that is to be in contact with the IC contacts and with the fan out contacts has comparable a pattern of holes for each end region of each interconnect conductor members.Type: ApplicationFiled: January 14, 2003Publication date: July 15, 2004Inventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Da-Yuan Shih
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Publication number: 20040130343Abstract: Probes for electronic devices are described. The probe is formed by ball bonding a plurality of wires to contact locations on a fan out substrate surface. The wires are cut off leaving stubs. A patterned polymer sheet having electrical conductor patterns therein is disposed over the stubs which extend through holes in the sheet. The ends of the wires are flattened to remit the polymer sheet in place. The wire is connected to an electrical conductor on the polymer sheet which is converted to a contact pad on the polymer sheet. A second wire is ball bonded to the pad on the polymer sheet and cut to leave a second stub. The polymer sheet is laser cut so that each second stub is free to move independently of the other second studs. The ends of the second stubs are disposed against contact locations of an electronic device, such as an FC chip, to test the electronic device.Type: ApplicationFiled: December 19, 2003Publication date: July 8, 2004Inventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih
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Patent number: 6722032Abstract: Probes for electronic devices are described. The probe is formed by ball bonding a plurality of wires to contact locations on a fan out substrate surface. The wires are cut off leaving stubs. A patterned polymer sheet having electrical conductor patterns therein is disposed over the stubs which extend through holes in the sheet. The ends of the wires are flattened to remit the polymer sheet in place. The wire is connected to an electrical conductor on the polymer sheet which is converted to a contact pad on the polymer sheet. A second wire is ball bonded to the pad on the polymer sheet and cut to leave a second stub. The polymer sheet is laser cut so that each second stub is free to move independently of the other second studs. The ends of the second stubs are disposed against contact locations of an electronic device, such as an FC chip, to test the electronic device.Type: GrantFiled: August 10, 2001Date of Patent: April 20, 2004Assignee: International Business Machines CorporationInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih
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Patent number: 6708403Abstract: A method is described having the steps of providing a surface having a plurality of wire bondable locations; wire bonding a wire to each of the wire bondable locations using a wire capillary tool; controlling the position of the capillary tool with respect to the substrate; after forming a wire bond of the wire to the wire bondable location moving the capillary tool relative to the surface as the capillary tool is moved away from the surface to form a wire having a predetermined shape.Type: GrantFiled: January 14, 2003Date of Patent: March 23, 2004Assignee: International Business Machines CorporationInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Da-Yuan Shih
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Publication number: 20030106213Abstract: A method is described having the steps of providing a surface having a plurality of wire bondable locations; wire bonding a wire to each of the wire bondable locations using a wire capillary tool; controlling the position of the capillary tool with respect to the substrate; after forming a wire bond of the wire to the wire bondable location moving the capillary tool relative to the surface as the capillary tool is moved away from the surface to form a wire having a predetermined shape.Type: ApplicationFiled: January 14, 2003Publication date: June 12, 2003Inventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Da-Yuan Shih