Patents by Inventor Keith Gaff

Keith Gaff has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967517
    Abstract: An electrostatic chuck for a substrate processing system includes a monolithic body made of ceramic. A plurality of first electrodes are arranged in the monolithic body adjacent to a top surface of the monolithic body and that are configured to selectively receive a chucking signal. A gas channel is formed in the monolithic body and is configured to supply back side gas to the top surface. Coolant channels are formed in the monolithic body and are configured to receive fluid to control a temperature of the monolithic body.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: April 23, 2024
    Assignee: Lam Research Corporation
    Inventors: Feng Wang, Keith Gaff, Christopher Kimball, Darrell Ehrlich
  • Publication number: 20240112893
    Abstract: An electrostatic chuck for a substrate processing system is provided. The electrostatic chuck includes: a top plate configured to electrostatically clamp to a substrate and formed of ceramic; an intermediate layer disposed below the top plate; and a baseplate disposed below the intermediate layer and formed of ceramic. The intermediate layer bonds the top plate to the baseplate.
    Type: Application
    Filed: December 8, 2023
    Publication date: April 4, 2024
    Inventors: Feng WANG, Keith GAFF, Christopher KIMBALL
  • Patent number: 11935776
    Abstract: A method for electrostatically clamping an edge ring in a plasma processing chamber with an electrostatic ring clamp with at least one ring backside temperature channel for providing a flow of gas to the edge ring is provided. A vacuum is provided to the at least one ring backside temperature channel Pressure in the backside temperature channel is measured. An electrostatic ring clamping voltage is provided when the pressure in the backside temperature channel reaches a threshold maximum pressure. The vacuum to the backside temperature channel is discontinued. Pressure in the backside temperature channel is measured. If pressure in the backside temperature channel rises faster than a threshold rate, then sealing failure is indicated. If pressure in the backside temperature channel does not rise faster than the threshold rate, a plasma process is continued, using the backside temperature channel to regulate a temperature of the edge ring.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: March 19, 2024
    Assignee: Lam Research Corporation
    Inventors: Christopher Kimball, Keith Gaff, Feng Wang
  • Patent number: 11848177
    Abstract: An electrostatic chuck for a substrate processing system is provided. The electrostatic chuck includes: a top plate configured to electrostatically clamp to a substrate and formed of ceramic; an intermediate layer disposed below the top plate; and a baseplate disposed below the intermediate layer and formed of ceramic. The intermediate layer bonds the top plate to the baseplate.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: December 19, 2023
    Assignee: Lam Research Corporation
    Inventors: Feng Wang, Keith Gaff, Christopher Kimball
  • Patent number: 11651991
    Abstract: A wafer support structure in a chamber of a semiconductor manufacturing apparatus is provided. The wafer support structure includes a dielectric block having a bottom surface and a top surface supports a wafer when present. The wafer support structure includes a baseplate for supporting the dielectric block. The wafer support structure includes a first electrode embedded in an upper part of the dielectric block. The first electrode is proximate and below the top surface of the dielectric block. A top surface of the first electrode is substantially parallel to the top surface of the dielectric block. The first electrode is configured for connection to a direct current (DC) power source. The wafer support structure includes a second electrode embedded in the dielectric block. The wafer support structure includes a second electrode disposed below the first electrode and a separation distance is defined between the first electrode and the second electrode within the dielectric block.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: May 16, 2023
    Assignee: Lam Research Corporation
    Inventors: Alexander Matyushkin, Alexei Marakhtanov, John Patrick Holland, Keith Gaff, Felix Kozakevich
  • Publication number: 20230127806
    Abstract: A substrate processing system includes: a substrate support within a processing chamber to vertically support a substrate; a temperature probe including: a first temperature sensor to measure a first temperature of the substrate support; a second temperature sensor to measure a second temperature of the substrate support; a third temperature sensor to measure a third temperature of the substrate support; and a fourth temperature sensor to measure a fourth temperature of the substrate support; a temperature module to: in a first state, determine a substrate support temperature of the substrate support based on the first, second, third, and fourth temperatures; in a second state, determine the substrate support temperature based on only three of the first, second, third, and fourth temperatures; and a temperature control module configured to control at least one of heating and cooling of the substrate support based on the substrate support temperature.
    Type: Application
    Filed: March 27, 2020
    Publication date: April 27, 2023
    Inventors: Anthony John RICCI, Keith GAFF
  • Publication number: 20220380894
    Abstract: A method is provided and includes: determining a temperature distribution pattern across a substrate or a support plate of a substrate support; determining, based on the temperature distribution pattern, a number of masks to apply to a top surface of the support plate, where the number of masks is greater than or equal to two; and determining patterns of the masks based on the temperature distribution pattern; and applying the masks over the top surface. The method further includes: performing a first machining process to remove a portion of the support plate unprotected by the masks to form first mesas and first recessed areas between the first mesas; removing a first mask from the support plate; performing a second machining process to form second recessed areas and at least one of second mesas or a first seal band area; and removing a second mask from the support plate.
    Type: Application
    Filed: August 4, 2022
    Publication date: December 1, 2022
    Inventors: Keith GAFF, Devin RAMDUTT, Ann ERICKSON
  • Publication number: 20220148903
    Abstract: An electrostatic chuck for a substrate processing system includes a monolithic body made of ceramic. A plurality of first electrodes are arranged in the monolithic body adjacent to a top surface of the monolithic body and that are configured to selectively receive a chucking signal. A gas channel is formed in the monolithic body and is configured to supply back side gas to the top surface. Coolant channels are formed in the monolithic body and are configured to receive fluid to control a temperature of the monolithic body.
    Type: Application
    Filed: January 27, 2020
    Publication date: May 12, 2022
    Inventors: Feng WANG, Keith GAFF, Christopher KIMBALL, Darrell EHRLICH
  • Publication number: 20210296099
    Abstract: A wafer support structure in a chamber of a semiconductor manufacturing apparatus is provided. The wafer support structure includes a dielectric block having a bottom surface and a top surface supports a wafer when present. The wafer support structure includes a baseplate for supporting the dielectric block. The wafer support structure includes a first electrode embedded in an upper part of the dielectric block. The first electrode is proximate and below the top surface of the dielectric block. A top surface of the first electrode is substantially parallel to the top surface of the dielectric block. The first electrode is configured for connection to a direct current (DC) power source. The wafer support structure includes a second electrode embedded in the dielectric block. The wafer support structure includes a second electrode disposed below the first electrode and a separation distance is defined between the first electrode and the second electrode within the dielectric block.
    Type: Application
    Filed: May 28, 2021
    Publication date: September 23, 2021
    Inventors: Alexander Matyushkin, Alexei Marakhtanov, John Patrick Holland, Keith Gaff, Felix Kozakevich
  • Patent number: 11069553
    Abstract: A substrate support for a substrate processing system includes a baseplate, a bond layer provided on the baseplate, and a ceramic layer arranged on the bond layer. The ceramic layer includes a first region and a second region located radially outward of the first region, the first region has a first thickness, the second region has a second thickness, and the first thickness is greater than the second thickness.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: July 20, 2021
    Assignee: Lam Research Corporation
    Inventors: Alexander Matyushkin, John Patrick Holland, Harmeet Singh, Alexei Marakhtanov, Keith Gaff, Zhigang Chen, Felix Kozakevich
  • Publication number: 20210166965
    Abstract: A method for electrostatically clamping an edge ring in a plasma processing chamber with an electrostatic ring clamp with at least one ring backside temperature channel for providing a flow of gas to the edge ring is provided. A vacuum is provided to the at least one ring backside temperature channel Pressure in the backside temperature channel is measured. An electrostatic ring clamping voltage is provided when the pressure in the backside temperature channel reaches a threshold maximum pressure. The vacuum to the backside temperature channel is discontinued. Pressure in the backside temperature channel is measured. If pressure in the backside temperature channel rises faster than a threshold rate, then sealing failure is indicated. If pressure in the backside temperature channel does not rise faster than the threshold rate, a plasma process is continued, using the backside temperature channel to regulate a temperature of the edge ring.
    Type: Application
    Filed: February 12, 2021
    Publication date: June 3, 2021
    Inventors: Christopher KIMBALL, Keith GAFF, Feng WANG
  • Patent number: 11024532
    Abstract: A wafer support structure for use in a chamber used for semiconductor fabrication of wafers is provided. The wafer support structure includes a dielectric block. A first electrode is embedded in a top half of the dielectric block. The first electrode is configured for connection to a direct current (DC) power source. A second electrode is embedded in a bottom half of the dielectric block. A vertical connection is embedded in the dielectric block for electrically coupling the second electrode to the first electrode.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: June 1, 2021
    Assignee: Lam Research Corporation
    Inventors: Alexander Matyushkin, Alexei Marakhtanov, John Patrick Holland, Keith Gaff, Felix Kozakevich
  • Patent number: 10923380
    Abstract: An edge ring for use in a plasma processing chamber with a chuck is provided. An edge ring body has a first surface to be placed over and facing the chuck, wherein the first surface forms a ring around an aperture. A first elastomer ring is integrated to the first surface and extending around the aperture.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: February 16, 2021
    Assignee: Lam Research Corporation
    Inventors: Christopher Kimball, Keith Gaff, Feng Wang
  • Patent number: 10872748
    Abstract: An electrostatic chuck includes an embedded electrode receiving a first voltage to electrostatically attract a semiconductor substrate to the electrostatic chuck. A plurality of current loops are disposed in at least one of the electrostatic chuck and an edge ring surrounding the electrostatic chuck. The current loops are laterally spaced apart. Each current loop is a wire formed into a loop. One or more DC power sources are electrically connected to the current loops. A controller supplies the first voltage to the embedded electrode, supplies a DC current to the current loops from the power sources, and controls the power sources. Each current loop is independently operable and generates a localized DC magnetic field proximate to the semiconductor substrate on receiving the DC current during plasma processing of the semiconductor substrate to adjust the plasma processing of the semiconductor substrate. The localized DC magnetic field does not generate plasma.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: December 22, 2020
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Harmeet Singh, Keith Gaff, Brett Richardson, Sung Lee
  • Patent number: 10804129
    Abstract: An electrostatic chuck assembly for processing a semiconductor substrate is provided. The electrostatic chuck assembly includes a first layer, a baseplate, a second layer, and at least one annular gasket. The first layer includes ceramic material and a first radio frequency (RF) electrode. The first RF electrode is embedded in the ceramic material. The second layer is disposed between the first layer and the baseplate. The at least one annular gasket extends along an upper surface of the baseplate and through the second layer. The at least one annular gasket electrically couples the upper surface of the baseplate to the first RF electrode. RF power passes from the baseplate to the first RF electrode through the at least one annular gasket.
    Type: Grant
    Filed: May 24, 2018
    Date of Patent: October 13, 2020
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Christopher Kimball, Keith Gaff, Alexander Matyushkin, Zhigang Chen, Keith Comendant
  • Patent number: 10804081
    Abstract: An edge ring configured to surround an outer periphery of a substrate support in a plasma processing chamber wherein plasma is generated and used to process a substrate is disclosed, the substrate support comprising a base plate, a top plate, an elastomer seal assembly between the base plate and the top plate, and an elastomer seal configured to surround the elastomer seal assembly. The edge ring includes an upper inner surface having an edge step directed towards an interior portion of the edge ring and arranged to extend from an outer periphery of a top surface of the top plate to an outer periphery of an upper surface of the base plate, a lower inner surface, an outer surface, a lower surface extending from the lower inner surface to the outer surface, and a top surface extending from the outer surface to the upper inner surface.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: October 13, 2020
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Ambarish Chhatre, David Schaefer, Keith Gaff
  • Patent number: 10720346
    Abstract: A substrate support in a semiconductor plasma processing apparatus, comprises multiple independently controllable thermal zones arranged in a scalable multiplexing layout, and electronics to independently control and power the thermal zones. A substrate support in which the substrate support is incorporated includes an electrostatic clamping electrode and a temperature controlled base plate. Methods for manufacturing the substrate support include bonding together ceramic or polymer sheets having thermal zones, power supply lines, power return lines and vias.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: July 21, 2020
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Harmeet Singh, Keith Gaff, Neil Benjamin, Keith Comendant
  • Publication number: 20190371576
    Abstract: An electrostatic chuck includes an embedded electrode receiving a first voltage to electrostatically attract a semiconductor substrate to the electrostatic chuck. A plurality of current loops are disposed in at least one of the electrostatic chuck and an edge ring surrounding the electrostatic chuck. The current loops are laterally spaced apart. Each current loop is a wire formed into a loop. One or more DC power sources are electrically connected to the current loops. A controller supplies the first voltage to the embedded electrode, supplies a DC current to the current loops from the power sources, and controls the power sources. Each current loop is independently operable and generates a localized DC magnetic field proximate to the semiconductor substrate on receiving the DC current during plasma processing of the semiconductor substrate to adjust the plasma processing of the semiconductor substrate. The localized DC magnetic field does not generate plasma.
    Type: Application
    Filed: July 9, 2019
    Publication date: December 5, 2019
    Inventors: Harmeet SINGH, Keith GAFF, Brett RICHARDSON, Sung LEE
  • Publication number: 20190267218
    Abstract: An electrostatic chuck for a substrate processing system is provided. The electrostatic chuck includes: a top plate configured to electrostatically clamp to a substrate and formed of ceramic; an intermediate layer disposed below the top plate; and a baseplate disposed below the intermediate layer and formed of ceramic. The intermediate layer bonds the top plate to the baseplate.
    Type: Application
    Filed: February 23, 2018
    Publication date: August 29, 2019
    Inventors: Feng Wang, Keith Gaff, Christopher Kimball
  • Patent number: 10388493
    Abstract: A component of a substrate support assembly such as a substrate support or edge ring includes a plurality of current loops incorporated in the substrate support and/or the edge ring. The current loops are laterally spaced apart and extend less than halfway around the substrate support or edge ring with each of the current loops being operable to induce a localized DC magnetic field of field strength less than 20 Gauss above a substrate supported on the substrate support during plasma processing of the substrate. When supplied with DC power, the current loops generate localized DC magnetic fields over the semiconductor substrate so as to locally affect the plasma and compensate for non-uniformity in plasma processing across the substrate.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: August 20, 2019
    Assignee: Lam Research Corporation
    Inventors: Harmeet Singh, Keith Gaff, Brett Richardson, Sung Lee