Patents by Inventor Keith Jenkins

Keith Jenkins has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190266538
    Abstract: A computer-implemented method for analyzing customer satisfaction is presented. The computer-implemented method may include capturing visual images related to individuals and order consumables, determining, by a processor, at least one measurable metric to predict variations indicating different satisfaction levels, and dynamically refining parameters if the variations exceed one or more thresholds. The computer-implemented method further includes receiving the captured visual images of the individuals and the order consumables by least one camera in communication with the processor.
    Type: Application
    Filed: May 8, 2019
    Publication date: August 29, 2019
    Inventors: Karthik Balakrishnan, Keith A. Jenkins, Barry P. Linder
  • Patent number: 10388580
    Abstract: Methods and circuits for monitoring circuit degradation include measuring degradation in a set of on-chip test oscillators that vary according to a quantity that influences a first type of degradation. A second type of contribution to the measured degradation is determined by extrapolating from the measured degradation for the plurality of test oscillators. The second type of contribution is subtracted from the measured degradation at a predetermined value of the quantity to determine the first type of degradation for devices represented by the predetermined value.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: August 20, 2019
    Assignee: International Business Machines Corporation
    Inventors: Keith A. Jenkins, Barry Linder
  • Patent number: 10365702
    Abstract: Over at least part of a lifetime of a product circuit, quiescent current to a product circuit is periodically measured. Over the part of the lifetime of the product circuit, voltage to the product circuit is periodically adjusted based on the monitored quiescent current. Methods, apparatus, and computer program product are disclosed. A calibration procedure may also be performed as part of manufacturing the product circuit, in order to provide values for the quiescent current and corresponding voltage to which the voltage should be adjusted.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: July 30, 2019
    Assignee: International Business Machines Corporation
    Inventors: Chen-Yong Cher, Pierce I Chuang, Keith A Jenkins, Barry Linder
  • Publication number: 20190230559
    Abstract: Systems and methods are provided for operating an intercom system using a wireless access point. A codec is selected (501) from a plurality of available codecs. In some implementations, the available codecs present a tradeoff between audio quality and intercom device capacity. The access point operates (505) using the selected codec and, in response to detecting a new intercom device connecting to the intercom system (507) through the access point, the access point transmits a signal to the new intercom device identifying the selected codec. In response to a determination that the new intercom device does not have the selected codec stored in its memory, the access point automatically uploads (515) the codec to the new intercom device and transmits communications with the intercom device—including, for example, audio stream data—using the selected codec.
    Type: Application
    Filed: March 14, 2017
    Publication date: July 25, 2019
    Inventors: Keith Jenkins, La Ruhe Gene Friesen, Jim Andersen, Jason Brchan, Bob Basine
  • Patent number: 10360526
    Abstract: A computer-implemented method for analyzing customer satisfaction is presented. The computer-implemented method may include capturing visual images related to individuals and order consumables, determining, by a processor, at least one measurable metric to predict variations indicating different satisfaction levels, and dynamically refining parameters if the variations exceed one or more thresholds. The computer-implemented method further includes receiving the captured visual images of the individuals and the order consumables by least one camera in communication with the processor.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: July 23, 2019
    Assignee: International Business Machines Corporation
    Inventors: Karthik Balakrishnan, Keith A. Jenkins, Barry P. Linder
  • Patent number: 10295589
    Abstract: Embodiments include methods, and systems of an integrated circuit having electromigration wearout detection circuits. Integrated circuit may include a detection element and a reference element. Detection element is subject to normal operation current. Reference element is not subject to normal operation current. A resistance of detection element is monitored to detect electromigration wearout. The electromigration wearout detection monitoring circuit may be configured to perform: periodically measuring resistance of detection element, calculating resistance change of detection element over a predetermined time period, comparing resistance change of detection element calculated to a predetermined safety threshold, and take mitigation actions when resistance change of detection element exceeds predetermined safety threshold. The mitigation actions may include switching to a redundant circuit of the integrated circuit, shutting down the integrated circuit, and sending a signal to initiate a service call.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: May 21, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Keith A. Jenkins, Siyuranga O. Koswatta
  • Patent number: 10247769
    Abstract: Methods and systems for measuring degradation includes measuring an initial electrical characteristic of a test device in a ring oscillator that includes multiple oscillator stages, each having a delay stage and one or more fan-out devices, and a test stage having a delay stage and the test device. The ring oscillator is operated for a period of time. The electrical characteristic of the test device is measured after operating the ring oscillator. A level of degradation in the test device is determined using a processor based on the measurements of the electrical characteristic of the test device.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: April 2, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Barry P. Linder, Keith A. Jenkins
  • Publication number: 20180364296
    Abstract: Methods and systems for measuring degradation includes measuring an initial electrical characteristic of a test device in a ring oscillator that includes multiple oscillator stages and a test stage having a delay stage and the test device. The ring oscillator is operated for a period of time. The electrical characteristic of the test device is measured after operating the ring oscillator. A level of degradation in the test device is determined using a processor based on the measurements of the electrical characteristic of the test device.
    Type: Application
    Filed: August 23, 2018
    Publication date: December 20, 2018
    Inventors: Barry P. Linder, Keith A. Jenkins
  • Publication number: 20180322025
    Abstract: A method and system are provided for chip testing. The method includes selectively deploying a chip for future use or discarding the chip to prevent the future use, responsive to a stress history of the chip determined using a non-destructive test procedure. The test procedure includes ordering each of a plurality of functional patterns by a respective minimum operating period corresponding thereto. The test procedure further includes ranking each of the plurality of patterns based on at least one preceding available pattern to provide a plurality of pattern ranks. The test procedure also includes calculating a sum by summing the plurality of pattern ranks. The sum calculated during an initial performance of the test procedure is designated as a baseline, and the sum calculated during a subsequent performance of the test procedure is compared to a threshold derived from the baseline to determine the stress history of the chip.
    Type: Application
    Filed: July 13, 2018
    Publication date: November 8, 2018
    Inventors: Keith A. Jenkins, Barry P. Linder, Emily A. Ray, Raphael P. Robertazzi, Peilin Song, James H. Stathis, Kevin G. Stawiasz, Franco Stellari, Alan J. Weger, Emmanuel Yashchin
  • Patent number: 10102090
    Abstract: A method and system are provided for chip testing. The method includes ascertaining a baseline for a functioning chip with no stress history by performing a non-destructive test procedure on the functioning chip. The method further includes repeating the test procedure on a chip under test using a threshold derived from the baseline as a reference point to determine a stress history of the chip under test. The test procedure includes ordering each of a plurality of functional patterns by a respective minimum operating period corresponding thereto, ranking each pattern based on at least one preceding available pattern to provide a plurality of pattern ranks, and calculating a sum by summing the pattern ranks. The sum calculated by the ascertaining step is designated as the baseline, and the sum calculated by the repeating step is compared to the threshold to determine the stress history of the chip under test.
    Type: Grant
    Filed: May 16, 2016
    Date of Patent: October 16, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Keith A. Jenkins, Barry P. Linder, Emily A. Ray, Raphael P. Robertazzi, Peilin Song, James H. Stathis, Kevin G. Stawiasz, Franco Stellari, Alan J. Weger, Emmanuel Yashchin
  • Publication number: 20180292879
    Abstract: Over at least part of a lifetime of a product circuit, quiescent current to a product circuit is periodically measured. Over the part of the lifetime of the product circuit, voltage to the product circuit is periodically adjusted based on the monitored quiescent current. Methods, apparatus, and computer program product are disclosed. A calibration procedure may also be performed as part of manufacturing the product circuit, in order to provide values for the quiescent current and corresponding voltage to which the voltage should be adjusted.
    Type: Application
    Filed: April 10, 2017
    Publication date: October 11, 2018
    Inventors: Chen-Yong Cher, Pierce I Chuang, Keith A. Jenkins, Barry Linder
  • Patent number: 10075131
    Abstract: A voltage controlled oscillator (VCO) and a method of operating the VCO are disclosed. The VCO includes an inductor device, a capacitor device coupled in parallel with the inductor device through first and second nodes, and a pair of cross-coupled transistors coupled in parallel with the inductor device and the capacitor device through the first and second nodes. At least one of the pair of cross-coupled transistor includes a plurality of sub transistors coupled in parallel. The sub transistors are individually switchable to adjust current drive capability of each of the sub transistors. Each of the sub transistors includes a first gate and a second gate.
    Type: Grant
    Filed: April 20, 2016
    Date of Patent: September 11, 2018
    Assignee: International Business Machines Corporation
    Inventors: Shu-Jen Han, Keith A. Jenkins
  • Publication number: 20180246159
    Abstract: A method and system of monitoring a reliability of a semiconductor circuit are provided. A current consumption of a first ring oscillator that is in static state is measured at predetermined intervals. Each measured current consumption value is stored. A baseline current consumption value of the first ring oscillator is determined based on the stored current consumption values. A latest measured current consumption value of the first ring oscillator is compared to the baseline current consumption value. Upon determining that the latest measured current consumption value is above a threshold deviation from the baseline current consumption value, the first ring oscillator is identified to have a dielectric breakdown degradation.
    Type: Application
    Filed: February 27, 2017
    Publication date: August 30, 2018
    Inventors: Tam N. Huynh, Keith A. Jenkins, Franco Stellari
  • Publication number: 20180248555
    Abstract: An electronic apparatus for testing an integrated circuit (IC) that includes a ring oscillator is provided. The apparatus configures the ring oscillator to produce oscillation at a first frequency and configures the ring oscillator to produce oscillation at a second frequency. The apparatus then compares the second frequency with an integer multiple of the first frequency to determine a resistive voltage drop between a voltage applied to the IC and a local voltage at the ring oscillator. The ring oscillator has a chain of inverting elements forming a long ring and a short ring. The ring oscillator also has an oscillation selection circuit that is configured to disable the short ring so that the ring oscillator produces a fundamental oscillation based on signal propagation through the long ring and enable the short ring so that the ring oscillator produces a harmonic oscillation based on a signal propagation through the short ring and the long ring.
    Type: Application
    Filed: February 28, 2017
    Publication date: August 30, 2018
    Inventors: Keith A. Jenkins, Peilin Song, James H. Stathis, Franco Stellari
  • Publication number: 20180211894
    Abstract: Methods and circuits for monitoring circuit degradation include measuring degradation in a set of on-chip test oscillators that vary according to a quantity that influences a first type of degradation. A second type of contribution to the measured degradation is determined by extrapolating from the measured degradation for the plurality of test oscillators. The second type of contribution is subtracted from the measured degradation at a predetermined value of the quantity to determine the first type of degradation for devices represented by the predetermined value.
    Type: Application
    Filed: March 20, 2018
    Publication date: July 26, 2018
    Inventors: Keith A. Jenkins, Barry Linder
  • Patent number: 10002810
    Abstract: Methods and circuits for monitoring circuit degradation include measuring degradation in a plurality of on-chip test oscillators that vary according to a quantity that influences hot carrier injection (HCI) degradation. The measured degradation for the plurality of test oscillators is extrapolated to determine a bias temperature instability (BTI) contribution to the measured degradation. The BTI contribution is subtracted from the measured degradation at a predetermined value of the quantity to determine the HCI degradation for devices represented by the predetermined value.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: June 19, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Keith A. Jenkins, Barry Linder
  • Patent number: 9952274
    Abstract: A method of measuring semiconductor output characteristics is provided that includes connecting a pulse generator to the gate structure of a semiconductor device, and applying a plurality of voltage pulses at least some of which having a different pulse width to the gate structure of the semiconductor device. The average current is measured from the drain structure of the device for a duration of each pulse of the plurality of pulses. From the measured values for the average current, a self-heating curve of the average current divided by the pulse width is plotted as a function of the pulse width. The self-heating curve is then extrapolated to a pulse width substantially equal to zero to provide a value of drain current measurements without self-heating effects.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: April 24, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Keith A. Jenkins, Barry P. Linder
  • Patent number: 9906960
    Abstract: A method for gaining access beyond a restricted access gateway includes an access key sequence stored on memory of a device. The access key sequence includes a sequence of key entries and key touch movements. An entered request sequence including keys activated by touch on a keyboard of the device and directions of touch movements made on the keyboard is recorded. With an access controller, it is determined whether the recorded entered request sequence matches the access key sequence. Access beyond the restricted access gateway is granted to functions when the recorded entered request sequence matches the access key sequence.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: February 27, 2018
    Assignee: International Business Machines Corporation
    Inventors: Keith A. Jenkins, Barry P. Linder
  • Publication number: 20180038906
    Abstract: A method and circuit of monitoring an effective age of a target circuit are provided. A standby mode is activated in the target circuit. A standby current of a first number of circuit blocks of the target circuit is measured. The measured standby current of the first number of circuit blocks is compared to a first baseline standby current of the first number of circuit blocks. Upon determining that the measured standby current of the first number of circuit blocks is below a first predetermined factor of a baseline standby current of the first number of circuit blocks, the first number of circuit blocks is identified to have a bias temperature instability (BTI) degradation concern.
    Type: Application
    Filed: August 5, 2016
    Publication date: February 8, 2018
    Inventors: Chen-Yong Cher, Keith A. Jenkins, Barry P. Linder
  • Publication number: 20180035298
    Abstract: A method for gaining access beyond a restricted access gateway includes an access key sequence stored on memory of a device. The access key sequence includes a sequence of key entries and key touch movements. An entered request sequence including keys activated by touch on a keyboard of the device and directions of touch movements made on the keyboard is recorded. With an access controller, it is determined whether the recorded entered request sequence matches the access key sequence. Access beyond the restricted access gateway is granted to functions when the recorded entered request sequence matches the access key sequence.
    Type: Application
    Filed: October 5, 2017
    Publication date: February 1, 2018
    Inventors: Keith A. Jenkins, Barry P. Linder