Patents by Inventor Keith K. Sturcken

Keith K. Sturcken has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11894286
    Abstract: A hermetically sealed electronics module includes a core IC installed on a substrate. A collar surrounds the core IC and is sealed to the substrate and to a lid, forming a sealed chamber. A heat spreader bonded to an internal surface of the lid extends downward into proximal thermal contact with the core IC. A thin layer of TIM can be applied between the heat spreader and core IC. The heat spreader does not overlap any tall components that extend above the core IC, and can extend over regions adjacent to the core IC. Tall components can be limited to a periphery of the chamber, and/or the heat spreader can include openings that surround central tall components. The heat spreader can be soldered or welded to the lid over an entire upper surface of the heat spreader. X-ray and/or CSAM scanning can detect heat spreader bonding flaws.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: February 6, 2024
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Keith K Sturcken, Kenneth J. Cross, Michael J. O'Connor
  • Publication number: 20220051966
    Abstract: A hermetically sealed electronics module includes a core IC installed on a substrate. A collar surrounds the core IC and is sealed to the substrate and to a lid, forming a sealed chamber. A heat spreader bonded to an internal surface of the lid extends downward into proximal thermal contact with the core IC. A thin layer of TIM can be applied between the heat spreader and core IC. The heat spreader does not overlap any tall components that extend above the core IC, and can extend over regions adjacent to the core IC. Tall components can be limited to a periphery of the chamber, and/or the heat spreader can include openings that surround central tall components. The heat spreader can be soldered or welded to the lid over an entire upper surface of the heat spreader. X-ray and/or CSAM scanning can detect heat spreader bonding flaws.
    Type: Application
    Filed: June 13, 2019
    Publication date: February 17, 2022
    Inventors: Keith K. Sturcken, Kenneth J. Cross, Michael J. O'Connor
  • Patent number: 10854586
    Abstract: A multi-chip module hybrid integrated circuit (MCM-HIC) provides cold spare support to an apparatus comprising a plurality of ICs and/or other circuits that are not cold spare compliant. At least one core IC and at least one cold spare chiplet are installed on an interconnecting substrate having a plurality of power zones to which power can be applied and withdrawn as needed. When powered, the cold spare chiplets serve as mediators and interfaces between the non cold spare compliant circuits. When the cold spare chiplets are at least partly unpowered, they protect all interconnected circuits, and ensure that interconnected circuits that remain powered are not hindered by unpowered interconnected circuits. Cold spare chiplets can extend across boundaries between power zones. External circuits can be exclusively interfaced to a subset of the power zones. Separate power circuits within a power zone can be sequenced during application and withdrawal of power.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: December 1, 2020
    Assignee: BAE Systems Information and Electronics Systems Integration Inc.
    Inventors: Lori D. Dennis, Jamie A. Bernard, Alan F. Dennis, Jane O. Gilliam, Jason F. Ross, Keith K. Sturcken, Dale A Rickard
  • Publication number: 20200373286
    Abstract: A multi-chip module hybrid integrated circuit (MCM-HIC) provides cold spare support to an apparatus comprising a plurality of ICs and/or other circuits that are not cold spare compliant. At least one core IC and at least one cold spare chiplet are installed on an interconnecting substrate having a plurality of power zones to which power can be applied and withdrawn as needed. When powered, the cold spare chiplets serve as mediators and interfaces between the non cold spare compliant circuits. When the cold spare chiplets are at least partly unpowered, they protect all interconnected circuits, and ensure that interconnected circuits that remain powered are not hindered by unpowered interconnected circuits. Cold spare chiplets can extend across boundaries between power zones. External circuits can be exclusively interfaced to a subset of the power zones. Separate power circuits within a power zone can be sequenced during application and withdrawal of power.
    Type: Application
    Filed: May 24, 2019
    Publication date: November 26, 2020
    Applicant: BAE SYSTEMS Information and Electronic Systems Integration Inc.
    Inventors: Lori D. Dennis, Jamie A. Bernard, Alan F. Dennis, Jane O. Gilliam, Jason F. Ross, Keith K. Sturcken, Dale A Rickard
  • Patent number: 9859178
    Abstract: A microwave module is described. The microwave module includes a base bracket, a window plate and a lid. The base bracket is configured to contain a photoconductive switch, a radio-frequency transformer and dielectric oil. The window plate, which is transparent to optical light, covers a first portion of the base bracket in which the photoconductive switch is located. The window plate is sealed to the base bracket. The lid, which includes a cutout to allow the radio-frequency transformer to pass through the lid, covers a second portion of the base bracket in which the radio-frequency transformer is located. The window plate is sealed to the base bracket, and the lid is sealed to the window plate, the base bracket and the radio-frequency transformer to contain the dielectric oil within the microwave module.
    Type: Grant
    Filed: October 7, 2015
    Date of Patent: January 2, 2018
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Yannick C. Morel, Sheila J. Konecke, Santos Nazario-Camacho, Clint J. Novotny, Keith K. Sturcken
  • Patent number: 9502269
    Abstract: An apparatus for cooling electronic devices to be used in the vacuum of space is described. a window frame is provided as packaging for an electronic device having a substrate and a chip. The window frame includes an opening to allow a heat pipe to be in direct contact with a backside of the chip. The window frame is hermetically sealed to the backside of the chip. The window frame is also welded to a kovar ring located on the backside of the chip to provide a hermetic seal between the window frame and the substrate.
    Type: Grant
    Filed: April 1, 2015
    Date of Patent: November 22, 2016
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Alan M. Berard, John A. Hughes, Keith K. Sturcken, Timothy Whalen
  • Publication number: 20160100495
    Abstract: A microwave module is described. The microwave module includes a base bracket, a window plate and a lid. The base bracket is configured to contain a photoconductive switch, a radio-frequency transformer and dielectric oil. The window plate, which is transparent to optical light, covers a first portion of the base bracket in which the photoconductive switch is located. The window plate is sealed to the base bracket. The lid, which includes a cutout to allow the radio-frequency transformer to pass through the lid, covers a second portion of the base bracket in which the radio-frequency transformer is located. The window plate is sealed to the base bracket, and the lid is sealed to the window plate, the base bracket and the radio-frequency transformer to contain the dielectric oil within the microwave module.
    Type: Application
    Filed: October 7, 2015
    Publication date: April 7, 2016
    Inventors: YANNICK C. MOREL, SHEILA J. KONECKE, SANTOS NAZARIO-CAMACHO, CLINT J. NOVOTNY, KEITH K. STURCKEN
  • Publication number: 20150289414
    Abstract: An apparatus for cooling electronic devices to be used in the vacuum of space is described. a window frame is provided as packaging for an electronic device having a substrate and a chip. The window frame includes an opening to allow a heat pipe to be in direct contact with a backside of the chip. The window frame is hermetically sealed to the backside of the chip. The window frame is also welded to a kovar ring located on the backside of the chip to provide a hermetic seal between the window frame and the substrate.
    Type: Application
    Filed: April 1, 2015
    Publication date: October 8, 2015
    Inventors: ALAN M. BERARD, JOHN A. HUGHES, KEITH K. STURCKEN, TIMOTHY WHALEN
  • Publication number: 20140206153
    Abstract: A method for fabricating an electronic device package having a column grid array is disclosed. A column grid array package includes a substrate, an integrated circuit located on a first side of the substrate, and a set of solder columns located on a second side of the substrate. The column grid array package also includes multiple two-tab electronic devices located on the second side of the substrate. The heights of the two-tab electronic devices are substantially identical to the heights of the solder columns.
    Type: Application
    Filed: March 25, 2014
    Publication date: July 24, 2014
    Applicant: BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC.
    Inventors: Thomas J. McIntyre, Keith K. Sturcken, Christy A. Hagerty
  • Publication number: 20140175675
    Abstract: A method for manufacturing an electronic multi-chip module that involves stacking at least six tested devices to form the module. These devices may be individually tested prior to assembling the electronic module. After individually testing the devices, the devices may be stacked one on top of the other to form an electronic multi-chip module having at least six stacked devices. Other embodiments may be described and claimed.
    Type: Application
    Filed: February 27, 2014
    Publication date: June 26, 2014
    Applicant: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Keith K. Sturcken, John A. Hughes, Thomas E. Love, Sheila J. Konecke, Jeffrey Montag, Peter M. Wallace
  • Patent number: 8723323
    Abstract: A method for fabricating an electronic device package having a column grid array is disclosed. A column grid array package includes a substrate, an integrated circuit located on a first side of the substrate, and a set of solder columns located on a second side of the substrate. The column grid array package also includes multiple two-tab electronic devices located on the second side of the substrate. The heights of the two-tab electronic devices are substantially identical to the heights of the solder columns.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: May 13, 2014
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Thomas J. McIntyre, Keith K. Sturcken, Christy A. Hagerty
  • Patent number: 8697457
    Abstract: A method for manufacturing an electronic multi-chip module that involves stacking at least six tested devices to form the module. These devices may be individually tested prior to assembling the electronic module. After individually testing the devices, the devices may be stacked one on top of the other to form an electronic multi-chip module having at least six stacked devices. Other embodiments may be described and claimed.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: April 15, 2014
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Keith K. Sturcken, John A. Hughes, Thomas E. Love, Sheila J. Konecke, Jeffrey Montag, Peter M. Wallace
  • Publication number: 20140015098
    Abstract: A method for fabricating an electronic device package having a column grid array is disclosed. A column grid array package includes a substrate, an integrated circuit located on a first side of the substrate, and a set of solder columns located on a second side of the substrate. The column grid array package also includes multiple two-tab electronic devices located on the second side of the substrate. The heights of the two-tab electronic devices are substantially identical to the heights of the solder columns.
    Type: Application
    Filed: July 12, 2012
    Publication date: January 16, 2014
    Applicant: BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC.
    Inventors: THOMAS J. McINTYRE, KEITH K. STURCKEN, CHRISTY A. HAGERTY
  • Publication number: 20130309815
    Abstract: An electronic device package includes a substrate and wire columns arranged in groups about a neutral stress point of the substrate. The height of the wire columns is substantially uniform for the plural groups of wire columns, and a length of at least one of the wire columns is greater than the uniform height. A method of fabricating an electronic device package having a column grid array includes applying two templates on wire columns of the column grid array and bending at least one wire column to increase its length while maintaining a uniform height for the column grid array. In another aspect, an electronic device package substrate includes wire columns having at least one non-uniformity in lengths of the columns, and the length of a wire column corresponds to a distance of that wire column from the neutral stress point of the substrate.
    Type: Application
    Filed: July 26, 2013
    Publication date: November 21, 2013
    Applicant: BAE Systems Information and Electronic Systems Intergration Inc.
    Inventors: John A. Hughes, Christy A. Hagerty, Santos Nazario-Camacho, Keith K. Sturcken
  • Patent number: 8586417
    Abstract: An electronic device package includes a substrate and wire columns arranged in groups about a neutral stress point of the substrate. The height of the wire columns is substantially uniform for the plural groups of wire columns, and a length of at least one of the wire columns is greater than the uniform height. A method of fabricating an electronic device package having a column grid array includes applying two templates on wire columns of the column grid array and bending at least one wire column to increase its length while maintaining a uniform height for the column grid array. In another aspect, an electronic device package substrate includes wire columns having at least one non-uniformity in lengths of the columns, and the length of a wire column corresponds to a distance of that wire column from the neutral stress point of the substrate.
    Type: Grant
    Filed: July 26, 2013
    Date of Patent: November 19, 2013
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: John A. Hughes, Christy A. Hagerty, Santos Nazario-Camacho, Keith K. Sturcken
  • Patent number: 8519527
    Abstract: An electronic device package includes a substrate and wire columns arranged in groups about a neutral stress point of the substrate. The height of the wire columns is substantially uniform for the plural groups of wire columns, and a length of at least one of the wire columns is greater than the uniform height. A method of fabricating an electronic device package having a column grid array includes applying two templates on wire columns of the column grid array and bending at least one wire column to increase its length while maintaining a uniform height for the column grid array. In another aspect, an electronic device package substrate includes wire columns having at least one non-uniformity in lengths of the columns, and the length of a wire column corresponds to a distance of that wire column from the neutral stress point of the substrate.
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: August 27, 2013
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: John A. Hughes, Christy A. Hagerty, Santos Nazario-Camacho, Keith K. Sturcken
  • Publication number: 20110074009
    Abstract: An electronic device package includes a substrate and wire columns arranged in groups about a neutral stress point of the substrate. The height of the wire columns is substantially uniform for the plural groups of wire columns, and a length of at least one of the wire columns is greater than the uniform height. A method of fabricating an electronic device package having a column grid array includes applying two templates on wire columns of the column grid array and bending at least one wire column to increase its length while maintaining a uniform height for the column grid array. In another aspect, an electronic device package substrate includes wire columns having at least one non-uniformity in lengths of the columns, and the length of a wire column corresponds to a distance of that wire column from the neutral stress point of the substrate.
    Type: Application
    Filed: September 29, 2010
    Publication date: March 31, 2011
    Applicant: BAE Systems Information & Electronic Systems Integration Inc.
    Inventors: John A. Hughes, Christy A. Hagerty, Santos Nazario-Camacho, Keith K. Sturcken
  • Patent number: 7491577
    Abstract: An apparatus for providing thermal management on high-power integrated circuit devices is disclosed. Initially, contacts to active devices are formed. Phase change materials are then applied over potential hot spots that can be formed by the active devices. A layer of high-thermally conductive materials is deposited over the phase change materials. The layer of high-thermally conductive materials and the phase change materials are subsequently etched according to a pattern. A layer of passivation conductive vias is subsequently applied to the phase change materials to complete the formation of phase change heatsinks.
    Type: Grant
    Filed: January 8, 2007
    Date of Patent: February 17, 2009
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Keith K. Sturcken, Thomas J. McIntyre
  • Publication number: 20080164603
    Abstract: An apparatus for providing thermal management on high-power integrated circuit devices is disclosed. Initially, contacts to active devices are formed. Phase change materials are then applied over potential hot spots that can be formed by the active devices. A layer of high-thermally conductive materials is deposited over the phase change materials. The layer of high-thermally conductive materials and the phase change materials are subsequently etched according to a pattern. A layer of passivation conductive vias is subsequently applied to the phase change materials to complete the formation of phase change heatsinks.
    Type: Application
    Filed: January 8, 2007
    Publication date: July 10, 2008
    Inventors: Keith K. Sturcken, Thomas J. McIntyre
  • Patent number: 6969869
    Abstract: The semiconductor device comprising a chalcogenide phase change material. The chalcogenide material being programmed from one resistance state to another resistance state by applying a programming current to a resistor which is in thermal contact with the chalcogenide material. The semiconductor device may be used as memory element or as a programmable fuse.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: November 29, 2005
    Assignee: Ovonyx, Inc.
    Inventors: Steve Hudgens, John D. Davis, Thomas J. McIntyre, John C. Rodgers, Keith K. Sturcken