Patents by Inventor Keith K. Sturcken

Keith K. Sturcken has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040140523
    Abstract: The semiconductor device comprising a chalcogenide phase change material. The chalcogenide material being programmed from one resistance state to another resistance state by applying a programming current to a resistor which is in thermal contact with the chalcogenide material. The semiconductor device may be used as memory element or as a programmable fuse.
    Type: Application
    Filed: September 5, 2003
    Publication date: July 22, 2004
    Inventors: Steve Hudgens, John D. Davis, Thomas J. Mclntyre, John C. Rodgers, Keith K. Sturcken
  • Patent number: 6734538
    Abstract: A high-density electronics package compromises a chip-stack having a plurality of ICs. Oblong-shaped bumps comprising an electrically-conductive bonding material are disposed along one side of each IC in the chip-stack. The one side of each IC bearing the bumps is aligned with the bump-bearing side of all other ICs in the chip-stack. A portion of each oblong-shaped bump extends beyond the edge of its host IC. This portion of each bump is available to electrically and mechanically connect the chip stack to the next packaging layer, such as a printed circuit board.
    Type: Grant
    Filed: April 12, 2001
    Date of Patent: May 11, 2004
    Assignee: BAE Systems Information & Electronic Systems Integration, Inc.
    Inventor: Keith K. Sturcken
  • Patent number: 6692994
    Abstract: A method for manufacturing a programmable chalcogenide fuse within a semiconductor device is disclosed. A resistor is initially formed on a substrate. Then, a chalcogenide fuse is formed on top of the resistor. Finally, a conductive layer is deposited on top of the chalcogenide fuse for providing electrical conduction to the chalcogenide fuse.
    Type: Grant
    Filed: June 26, 2002
    Date of Patent: February 17, 2004
    Assignee: BAE Systems, Information and Electronic Systems Integration, Inc.
    Inventors: John D. Davis, Thomas J. McIntyre, John C. Rodgers, Keith K. Sturcken, Peter W. Spreen, Tushar K. Shah
  • Publication number: 20030178715
    Abstract: A method for stacking chips within a multichip module package is disclosed. A first chip is bonded to a substrate. A passivation layer is then deposited on a top surface of the first chip. After a first adhesive layer has been deposited on top of the passivation layer, an interposer is placed on the adhesive layer. Next, a second adhesive layer is deposited on the interposer. Finally, a second chip is bonded to the interposer via the second adhesive layer.
    Type: Application
    Filed: March 20, 2002
    Publication date: September 25, 2003
    Applicant: BAE Systems
    Inventors: Keith K. Sturcken, Sheila J. Konecke, Santos Nazario-Camacho
  • Patent number: 6547124
    Abstract: A method of forming a plurality of micro column interconnection structures on a semiconductor includes providing a semiconductor layer. A photoresist layer is formed on the semiconductor layer. A plurality of cavities are etched in the photoresist layer. The plurality of cavities extend through the photoresist layer to the semiconductor layer. Solder is deposited in the plurality of cavities, thereby forming a plurality of micro columns of solder.
    Type: Grant
    Filed: June 14, 2001
    Date of Patent: April 15, 2003
    Assignee: Bae Systems Information and Electronic Systems Integration Inc.
    Inventors: Tushar T. Shah, Andrew TS Pomerene, Keith K. Sturcken, Steven J. Wright
  • Patent number: 6544879
    Abstract: Methods for manufacturing microchips are provided. A plurality of alternating metallic wiring-layers and non-metallic layers, terminating with a metallic wiring-layer, are formed on a wafer. A plurality of vias is formed for electrically interconnecting various metallic wiring-layers. A plurality of electrically conducting pads is formed adjacent various vias. A passivation layer is formed adjacent the terminal metallic wiring-layer and the plurality of conducting pads. A portion of the passivation layer is removed to expose the plurality of conducting pads. A layer is formed adjacent the passivation layer and the plurality of exposed conducting pads for protecting the microchip against electromagnetic radiation. A portion of the protective layer is removed to expose the plurality of conducting pads. Each conducting pad is electrically isolated from the protective layer. An electrically conducting bump is formed on each conducting pad.
    Type: Grant
    Filed: August 22, 2002
    Date of Patent: April 8, 2003
    Assignee: Bae Systems Information & Electronic Systems Integration Inc.
    Inventors: Tushar T. Shah, Keith K. Sturcken, Steven Wright
  • Publication number: 20030045034
    Abstract: A method for manufacturing a programmable chalcogenide fuse within a semiconductor device is disclosed. A resistor is initially formed on a substrate. Then, a chalcogenide fuse is formed on top of the resistor. Finally, a conductive layer is deposited on top of the chalcogenide fuse for providing electrical conduction to the chalcogenide fuse.
    Type: Application
    Filed: June 26, 2002
    Publication date: March 6, 2003
    Applicant: BAE SYSTEMS, Information and Electronic Systems Integration, Inc.
    Inventors: John D. Davis, Thomas J. McIntyre, John C. Rodgers, Keith K. Sturcken, Peter W. Spreen, Tushar K. Shah
  • Patent number: 6504256
    Abstract: A microchip having a passivation layer on an electrically active surface; a multitude of electrically conducting protuberances for electrically coupling the active surface to a substrate; a layer on the passivation layer for protecting against electromagnetic radiation; and a layer on an electrically inactive surface of the microchip for protecting against electromagnetic radiation.
    Type: Grant
    Filed: January 30, 2001
    Date of Patent: January 7, 2003
    Assignee: Bae Systems Information and Electronic Systems Integration, Inc.
    Inventors: Tushar T. Shah, Keith K. Sturcken, Steven Wright
  • Publication number: 20020195719
    Abstract: Methods for manufacturing microchips are provided. A plurality of alternating metallic wiring-layers and non-metallic layers, terminating with a metallic wiring-layer, are formed on a wafer. A plurality of vias is formed for electrically interconnecting various metallic wiring-layers. A plurality of electrically conducting pads is formed adjacent various vias. A passivation layer is formed adjacent the terminal metallic wiring-layer and the plurality of conducting pads. A portion of the passivation layer is removed to expose the plurality of conducting pads. A layer is formed adjacent the passivation layer and the plurality of exposed conducting pads for protecting the microchip against electromagnetic radiation. A portion of the protective layer is removed to expose the plurality of conducting pads. Each conducting pad is electrically isolated from the protective layer. An electrically conducting bump is formed on each conducting pad.
    Type: Application
    Filed: August 22, 2002
    Publication date: December 26, 2002
    Applicant: BAE SYSTEMS INFORMATION & ELECTRONIC SYSTEMS INTEGRATION, INC.
    Inventors: Tushar K. Shah, Keith K. Sturcken, Steven Wright
  • Publication number: 20020190107
    Abstract: A method of forming a plurality of micro column interconnection structures on a semiconductor includes providing a semiconductor layer. A photoresist layer is formed on the semiconductor layer. A plurality of cavities are etched in the photoresist layer. The plurality of cavities extend through the photoresist layer to the semiconductor layer. Solder is deposited in the plurality of cavities, thereby forming a plurality of micro columns of solder.
    Type: Application
    Filed: June 14, 2001
    Publication date: December 19, 2002
    Applicant: BAE SYSTEMS Information and Electronic Systems Integration, Inc.
    Inventors: Tushar T. Shah, Andrew TS Pomerene, Keith K. Sturcken, Steven J. Wright
  • Patent number: 6492254
    Abstract: A method of converting ball grid array (BGA) modules to column grid array (CGA) modules comprises steps of heating a BGA module, brushing the BGA module to remove the balls, and attaching columns to the module to create a CGA module. A method of converting a first CGA module to a second CGA module comprises steps of heating the first CGA module, brushing the first CGA module to remove the columns, and attaching columns to the module to create the second CGA module.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: December 10, 2002
    Assignee: BAE Systems Information and Electronic Systems Integration, Inc.
    Inventors: Keith K. Sturcken, George Clemen, Sheila J. Konecke, Saint Nazario-Camacho
  • Patent number: 6448576
    Abstract: A method for manufacturing a programmable chalcogenide fuse within a semiconductor device is disclosed. A resistor is initially formed on a substrate. Then, a chalcogenide fuse is formed on top of the resistor. Finally, a conductive layer is deposited on top of the chalcogenide fuse for providing electrical conduction to the chalcogenide fuse.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: September 10, 2002
    Assignee: BAE Systems Information and Electronic Systems Integration, Inc.
    Inventors: John D. Davis, Thomas J. McIntyre, John C. Rodgers, Keith K. Sturcken, Peter W. Spreen, Tushar K. Shah
  • Publication number: 20020102767
    Abstract: A method of converting ball grid array (BGA) modules to column grid array (CGA) modules comprises steps of heating a BGA module, brushing the BGA module to remove the balls, and attaching columns to the module to create a CGA module. A method of converting a first CGA module to a second CGA module comprises steps of heating the first CGA module, brushing the first CGA module to remove the columns, and attaching columns to the module to create the second CGA module.
    Type: Application
    Filed: January 31, 2001
    Publication date: August 1, 2002
    Inventors: Keith K. Sturcken, George Clemen, Sheila J. Konecke, Saint Nazario-Camacho
  • Publication number: 20020100985
    Abstract: A microchip having a passivation layer on an electrically active surface; a multitude of electrically conducting protuberances for electrically coupling the active surface to a substrate; a layer on the passivation layer for protecting against electromagnetic radiation; and a layer on an electrically inactive surface of the microchip for protecting against electromagnetic radiation.
    Type: Application
    Filed: January 30, 2001
    Publication date: August 1, 2002
    Applicant: BAE SYSTEMS Information and Electronic Systems Integration, Inc
    Inventors: Tushar T. Shah, Keith K. Sturcken, Steven Wright
  • Patent number: 6329594
    Abstract: In an integrated circuit package, the density of the I/O leads is increased by implementing the I/O leads by means of flexible circuits. Flexible circuits comprise thin sheets of insulating material on which the I/O leads are formed by photoetching. A conducting film is provided on the opposite side of the insulating film from I/O leads. To make the circuit package, the outer portions of the substrate of a quad pack are trimmed back to the contact pads on each side of the integrated circuit in the quad pack. The conductors of the flexible circuits are then soldered to the contacts of the contact pads.
    Type: Grant
    Filed: January 16, 1998
    Date of Patent: December 11, 2001
    Assignee: BAE Systems Information and Electronic Systems Integration, Inc.
    Inventor: Keith K. Sturcken