Abstract: A method of generating corrected fluorescence data of concentrations of a targeted fluorophore in tissue of a subject includes administering first and second fluorescent contrast agents to the subject, the first contrast agent targeted to tissue of interest, the second agent untargeted. The tissue is illuminated with light of a first stimulus wavelength and first data is acquired at an appropriate emissions wavelength; the tissue is illuminated at a second stimulus wavelength and second data is acquired at a second emissions wavelength associated with the second agent, the first and second emissions wavelength differ. Difference data is generated by subtracting the second data from the first data. A system provides for stimulus and capture at multiple wavelengths, with image storage memory and subtraction code, to perform the method. Corrected data may form an fluorescence image, or is used to generate fluorescence tomographic images.

Abstract: Methods and structure for online migration of data in a storage system comprising a plurality of storage devices. The method comprises redefining a volume of a storage system mapped according to a first mapping structure by defining a second mapping structure. The method further comprises quiescing processing of host I/O requests directed to the volume and transitioning control of the volume from a first to a second volume manager so as to utilize the benefits of the second mapping structure. The method further comprises commencing processing of host I/O requests directed to the volume wherein the volume is mapped according to the second mapping structure. The method further comprises migrating, via the second volume manager, volume data to any of a plurality of storage devices of the system, online, without interrupting processing of host I/O requests directed to the volume. This migrates volume data without significant downtime or wasted space.

Abstract: A method for merging a source electronic memory storage cluster into a destination electronic memory storage cluster may include designating a source storage cluster having a first configuration; designating a destination storage cluster having a second configuration; receiving a configuration database including mapping information associated with the first configuration of the source storage cluster; merging the configuration database for the source storage cluster into the destination storage cluster; identifying a conflict between the source storage cluster configuration and the destination storage cluster configuration by comparing mapping information for the imported configuration database for the source storage cluster to mapping information for a configuration database associated with the second configuration of the destination storage cluster; resolving the identified conflict between the source storage cluster configuration and the destination storage cluster configuration; and merging the configurat

Abstract: A method for merging a source electronic memory storage cluster into a destination electronic memory storage cluster may include designating a source storage cluster having a first configuration; designating a destination storage cluster having a second configuration; receiving a configuration database including mapping information associated with the first configuration of the source storage cluster; merging the configuration database for the source storage cluster into the destination storage cluster; identifying a conflict between the source storage cluster configuration and the destination storage cluster configuration by comparing mapping information for the imported configuration database for the source storage cluster to mapping information for a configuration database associated with the second configuration of the destination storage cluster; resolving the identified conflict between the source storage cluster configuration and the destination storage cluster configuration; and merging the configurat

Abstract: A controller system for detecting and matching link speeds. The present invention provides for a controller system. The controller system is a first controller and a first port. The first port is located in the first controller and has a first link speed. The first controller is adapted to match the first link speed to a second link speed of a second port of a first controlled device that is connectable to the first controller.

Abstract: Methods and structure for online migration of data in a storage system comprising a plurality of storage devices. The method comprises redefining a volume of a storage system mapped according to a first mapping structure by defining a second mapping structure. The method further comprises quiescing processing of host I/O requests directed to the volume and transitioning control of the volume from a first to a second volume manager so as to utilize the benefits of the second mapping structure. The method further comprises commencing processing of host I/O requests directed to the volume wherein the volume is mapped according to the second mapping structure. The method further comprises migrating, via the second volume manager, volume data to any of a plurality of storage devices of the system, online, without interrupting processing of host I/O requests directed to the volume. This migrates volume data without significant downtime or wasted space.

Abstract: Methods and systems for assuring persistence of battery backed cache memory in a storage system comprising multiple virtual machines. In one exemplary embodiment, an additional process is added to the storage controller that senses the loss of power and copies the entire content of the cache memory including portions used by each of the multiple virtual machines to a nonvolatile persistent storage that does not rely on the battery capacity of the storage system. In another exemplary embodiment, the additional process calls a plug-in procedure associated with each of the virtual machines to permit the virtual machine to assure that the content of its portion of the cache memory is consistent before the additional process copies the cache memory to nonvolatile memory. The additional process may be integrated with the hypervisor or may be operable as a separate process in yet another virtual machine.

Abstract: A method for offloading a cache memory is disclosed. The method generally includes the steps of (A) reading all of a plurality of cache lines from the cache memory in response to an assertion of a signal to offload of the cache memory, (B) generating a plurality of blocks by dividing the cache lines in accordance with a RAID configuration and (C) writing the blocks among a plurality of nonvolatile memories in the RAID configuration, wherein each of the nonvolatile memories has a write bandwidth less than a read bandwidth of the cache memory.

Abstract: A controller system for detecting and matching link speeds. The present invention provides for a controller system. The controller system is a first controller and a first port. The first port is located in the first controller and has a first link speed. The first controller is adapted to match the first link speed to a second link speed of a second port of a first controlled device that is connectable to the first controller.

Abstract: A controller system for detecting and matching link speeds. The present invention provides for a controller system. The controller system is a first controller and a first port. The first port is located in the first controller and has a first link speed. The first controller is adapted to match the first link speed to a second link speed of a second port of a first controlled device that is connectable to the first controller.

Abstract: A method for offloading a cache memory is disclosed. The method generally includes the steps of (A) reading all of a plurality of cache lines from the cache memory in response to an assertion of a signal to offload of the cache memory, (B) generating a plurality of blocks by dividing the cache lines in accordance with a RAID configuration and (C) writing the blocks among a plurality of nonvolatile memories in the RAID configuration, wherein each of the nonvolatile memories has a write bandwidth less than a read bandwidth of the cache memory.

Abstract: The present invention is directed to a method and system for disk drive data recovery utilizing CRC information and RAID parity. CRC meta data is compared with either the CRC generated from the data read from the disk drive or the CRC generated from the data reconstructed from the parity drive. If the CRC metadata matches the CRC generated from the data read from the disk drive, the data from the disk drive is accepted as valid. Otherwise, another comparison is made between the CRC generated from data reconstructed from RAID parity and the CRC metadata. If there is a match, the reconstructed data is used as the valid data; otherwise, the data read from the disk drive is used as valid data.

Abstract: A method and system for facilitating communication between computer subnets are provided. One embodiment of the present invention comprises presetting buffers in an internal subnet, wherein the buffers help route external commands to a plurality of devices within the internal subnet. When a command from an external subnet is received by the internal subnet, the command is translated and sent to the proper internal device, as determined by the buffers. The command is then performed by the proper internal device. In another embodiment of the present invention, translation mapping are established for the internal subnet. When a command is received from an external subnet, the destination address associated with the command is translated to the address of the appropriate internal device, and the command is then sent directly to the internal device, which performs the command. By using either the buffer or translation mappings, the internal subnet appears to be a single device to the external subnet.

Abstract: The present invention is an apparatus and method for protecting against drive anomaly errors while optimizing random read performance. Data block persistency is explicitly verified when a data block is written. Data block integrity and location checks are performed by reading data from a single drive. Through such a process, reading of metadata from a second drive is not required, thus decreasing the drive I/O workload. In an example of the invention, a combination of a CRC and a location tag interleaved as metadata along with user data on a single drive may be employed to perform a read operation in accordance with the present invention.

Abstract: Systems and methods for handling I/O requests from a host system to a storage system. A system includes an I/O module for processing I/O requests from a host system, a virtualized storage element, and a communication medium coupling the I/O module to the virtualized storage elements. The virtualized storage element includes a mapping table for translating virtual storage locations into physical storage locations and a plurality of physical storage locations. The virtualized storage element generates base virtual addresses using the mapping table to communicate the base virtual addresses to the I/O module. The I/O module generates specific virtual addresses using the base virtual addresses and using information derived from the I/O requests. The I/O module uses the specific virtual addresses in communication with the virtualized storage element to identify the physical storage locations in the virtualized storage element.

Abstract: The present invention is a method and system for associating metadata with user data in a storage array in a manner that provides independence between metadata management and a storage controller's cache block size. Metadata may be associated with user data according to multiple fashions in order to provide a desired performance benefit. In one example, the metadata may be associated according to a segment basis to maximize random I/O performance and may be associated according to a stripe basis to maximize sequential I/O performance.

Abstract: Structures and methods for non-intrusive testing of communication signals exchanged between two circuit boards via an intermediate interconnect board. In one aspect hereof, the functional signal normally exchanged between the circuits is latched during the exchange of test signals and the latched functional signal is utilized within the circuit that normally receives the functional signal to continue normal operations. In another aspect hereof, the test signals are exchanged over a dedicated test signal path between the two circuits. In another aspect hereof, the test signals are exchanged over the functional signal paths as out of band signals.

Abstract: Methods and associated structure for improving storage system performance by reducing latency associated with communication medium transactions internal to a storage subsystem. In one aspect of the present invention, an I/O control element associated with a storage system transmits prefetch read requests to an associated storage element of the storage system in response to receipt of a host system request. This allows the storage element to commence data transfer to the I/O element in advance of the I/O element returning the data to the host system. Subsequent transfers of data from the storage element to the I/O element then overlap the transfer of data from the I/O element to the host.

Abstract: A switched architecture for dual, independent storage controllers overcomes latency and coherency problems by an inter-controller command interchange scheme. The switched architecture permits a read or write command to be presented to either storage controller to effect data transfer on the same or the other storage controller. Communication between the two storage controllers is effected through internal Infiniband switches.

Abstract: A switched architecture is provided to allow controllers to manage physically independent memory systems as a single, large memory system. The switched architecture includes a path between switches of controllers for inter-controller access to memory systems and input/output interfaces in a redundant controller environment. Controller memory systems are physically independent of each other; however, they are logically managed as a single, large memory pool. Cache coherency is concurrently maintained by both controllers through a shared locking mechanism. Volume Logical Block Address extents or individual cache blocks can be locked for either shared or exclusive access by either controller. There is no strict ownership model to determine data access. Access is managed by the controller in the pair that receives the access request.