Abstract: Systems and methods for handling I/O requests from a host system to a storage system. A system includes an I/O module for processing I/O requests from a host system, a virtualized storage element, and a communication medium coupling the I/O module to the virtualized storage elements. The virtualized storage element includes a mapping table for translating virtual storage locations into physical storage locations and a plurality of physical storage locations. The virtualized storage element generates base virtual addresses using the mapping table to communicate the base virtual addresses to the I/O module. The I/O module generates specific virtual addresses using the base virtual addresses and using information derived from the I/O requests. The I/O module uses the specific virtual addresses in communication with the virtualized storage element to identify the physical storage locations in the virtualized storage element.

Abstract: Methods and associated structure for improving storage system performance by reducing latency associated with communication medium transactions internal to a storage subsystem. In one aspect of the present invention, an I/O control element associated with a storage system transmits prefetch read requests to an associated storage element of the storage system in response to receipt of a host system request. This allows the storage element to commence data transfer to the I/O element in advance of the I/O element returning the data to the host system. Subsequent transfers of data from the storage element to the I/O element then overlap the transfer of data from the I/O element to the host.

Abstract: The present invention is directed to a system and method for eliminating race conditions in RAID controllers while utilizing a high bandwidth internal architecture for data flow. A remote memory controller of the present invention may ensure that an acknowledge signal is sent only after a memory operation has been actually completed. This may provide for remote direct memory access without coherency problems and data corruption problems while a high bandwidth data flow internal architecture is being utilized.

Abstract: The present invention is directed to a system and method employing a dynamic logical identifier. In an aspect of the present invention, a method for accessing data utilizing an input/output interface may include providing an identifier for accessing a target device by a host and generating a logical identifier from the obtained identifier by the host. The logical identifier is transferred to an input/output interface and a look-up table is accessed utilizing the logical identifier by an input/output interface controller. The look-up table is included on the input/output interface, wherein the look-up table provides access between the input/output interface and the target device so as to enable the host to access the target device.

Abstract: The present invention is a method and system for associating metadata with user data in a storage array in a manner that provides independence between metadata management and a storage controller's cache block size. Metadata may be associated with user data according to multiple fashions in order to provide a desired performance benefit. In one example, the metadata may be associated according to a segment basis to maximize random I/O performance and may be associated according to a stripe basis to maximize sequential I/O performance.

Abstract: The present invention is an apparatus and method for protecting against drive anomaly errors while optimizing random read performance. Data block persistency is explicitly verified when a data block is written. Data block integrity and location checks are performed by reading data from a single drive. Through such a process, reading of metadata from a second drive is not required, thus decreasing the drive I/O workload. In an example of the invention, a combination of a CRC and a location tag interleaved as metadata along with user data on a single drive may be employed to perform a read operation in accordance with the present invention.

Abstract: A method and system for disk drive data recovery makes one or two comparisons to determine if data read from a disk drive is valid. If it is determined to be invalid, reconstructed data from the parity data is used. In all comparisons, CRC metadata is compared with either the CRC generated from the data read from the disk drive or the CRC generated from the data reconstructed from the parity drive. In the first comparison, if the CRC metadata matches the CRC generated from the data read from the disk drive, the data from the disk drive is accepted as valid. Otherwise, a second comparison is made between the CRC generated from data reconstructed from RAID parity and CRC metadata. In the second comparison, if there is a match, the reconstructed data is used as the valid data; otherwise, the data read from the disk drive is used as valid data. Error detection and correction codes other than CRC may be used.

Abstract: The present invention is directed to an architecture for transparent mirroring. A method of providing data redundancy in a data storage system may include receiving a request by a first data storage device controller for data access operation. Data is written to a local storage device and a data access operation performed by a second data storage device controller communicatively coupled to the first data storage device controller over an interconnect fabric simultaneously. The second data storage device controller communicatively coupled to a second data storage device.

Abstract: The present invention is directed to a system and method employing a dynamic logical identifier. In an aspect of the present invention, a method for accessing data utilizing an input/output interface may include providing an identifier for accessing a target device by a host and generating a logical identifier from the obtained identifier by the host. The logical identifier is transferred to an input/output interface and a look-up table is accessed utilizing the logical identifier by an input/output interface controller. The look-up table is included on the input/output interface, wherein the look-up table provides access between the input/output interface and the target device so as to enable the host to access the target device.

Abstract: The present invention provides storage system controllers and methods of controlling storage systems therewith. The controller (10) includes a main processor (12), a memory (14), a device interface (18) adapted to interface a peripheral component (28-32), such as a RAID storage device, with the storage system controller, and an operations sequencer (24). The main processor sequences a plurality of tasks to be executed to complete an operation. The operations sequencer coordinates an execution of the plurality of tasks. Methods of the invention include receiving a task status for each of the plurality of tasks that is executed, and issuing an interrupt to the main processor after all of the plurality of tasks of the operation are finished executing. In this manner, the operations sequencer offloads at least some of the main processor overhead to improve processor efficiency.

Abstract: In one embodiment, the present invention provides a storage system controller (10) having a main processor (12), a memory (14) and a device interface (18) adapted to interface with a peripheral component (28-32). The controller further includes an interrupt management scoreboard (24) adapted to receive a plurality of writes from the peripheral component(s) prior to interrupting the main processor. The main processor identifies a group of tasks to be executed, and sets up the scoreboard to await the completion of the tasks before interrupting the main processor.

Abstract: A DMA controller operable within a host adapter which automatically transmits replies to an attached host system to thereby reduce overhead processing in the I/O processor of the host adapter. The DMA controller is preferably operable to perform DMA transfers in accordance with one or more scatter/gather lists descriptive of the desired data transfer. A flag bit associated with and/or contained in entries of the scatter/gather list signifies the need to transmit a reply message to the host system. The requisite reply message is transmitted to the host system by the DMA controller following the DMA transfer of the block defined by the scatter/gather list entry containing the indicator. The reply message content is determined in accordance with information associated with and/or contained in the subsequent entry of the scatter/gather list. The subsequent scatter/gather list entry includes a reference to the reply message content and a reference to the destination location to which the reply is transmitted.

Abstract: A method and apparatus for efficiently posting entries to a queue within the data processing system. Entries are posted by first processor with the entries being handled by second processor in the data processing system. The interrupt state associated with the queue is checked by the first processor. If the interrupt state is clear, then the entry is posted to the queue. This interrupt state is cleared only when all entries have been cleared from the queue by the second processor. In this manner, an efficient posting of entries to the queue may be accomplished.

Abstract: In a multiprocessor data processing system including at least one main processor and one sub-processor utilizing a shared queue, queue integrity is maintained by associating a semaphore with each queue entry to indicate ownership of that queue entry. Ownership of a queue entry is checked by a processor attempting to post to the queue entry. Upon determining that the queue entry is available to the processor, the queue entry is loaded by an atomic write operation, ownership of the queue entry transferred to another processor, and the other processor may be alerted of the post to the queue. The other processor maintains ownership of the queue entry until the other processor has read and saved the data from the queue entry. Items may thus be posted to the queue and cleared from the queue by a processor independent of the state of the other processor.