Abstract: An electrostatic wafer holding apparatus includes an electrostatic chucking pedestal and a bi-directional backside conduit in fluid communication with a backside of the chucking pedestal. The bi-directional backside conduit is in fluid communication with a backside carrier gas supply line, and is further in fluid communication with a vacuum supply line.

Abstract: A conductive structure in an integrated circuit (12), and a method of forming the structure, is provided that includes a polysilicon layer (30), a thin layer containing titanium over the polysilicon, a tungsten nitride layer (34) over the titanium-containing layer and a tungsten layer over the tungsten nitride layer. The structure also includes a silicon nitride interfacial region (38) between the polysilicon layer and the titanium-containing layer. The structure withstands high-temperature processing without substantial formation of metal silicides in the polysilicon layer (30) and the tungsten layer (32), and provides low interface resistance between the tungsten layer and the polysilicon layer.

Abstract: A method for forming a metal suicide contact for a semiconductor device includes forming a refractory metal layer over a substrate, including active and non-active area of said substrate, and forming a cap layer over the refractory metal layer. A counter tensile layer is formed over the cap layer, wherein the counter tensile layer is selected from a material such that an opposing directional stress is created between the counter tensile layer and the cap layer, with respect to a directional stress created between the refractory metal layer and the cap layer.

Abstract: In a method of fabricating a metallization structure during formation of a microelectronic device, the improvement of reducing metal shorts in blanket metal deposition layers later subjected to reactive ion etching, comprising: a) depositing on a first underlayer, a blanket of an aluminum compound containing an electrical short reducing amount of an alloy metal in electrical contact with the underlayer; b) depositing a photoresist and exposing and developing to leave patterns of photoresist on the blanket aluminum compound containing an electrical short reducing amount of an alloy metal; and c) reactive ion etching to obtain an aluminum compound containing an alloy metal line characterized by reduced shorts in amounts less than the aluminum compound without said short reducing amount of alloy metal.

Abstract: A method is provided for fabricating a gate structure for a semiconductor device in which the gate structure has an inner spacer. A replacement-gate process is used in which material is removed in a gate region to expose a portion of the substrate; a gate dielectric is formed on the exposed portion of the substrate; and an inner spacer layer is formed overlying the gate dielectric and the dielectric material. A silicon layer is then formed which overlies the inner spacer layer. The structure is then planarized so that portions of the silicon layer and inner spacer layer remain in the gate region. A silicide gate structure is then formed from the silicon; the silicide gate structure is separated from dielectric material surrounding the gate by the inner spacer layer. The semiconductor device may include a first gate region and a second gate region with an interface therebetween, with the inner spacer layer covering the interface.

Abstract: A method for reworking a ball grid array (BGA) of solder balls is provided including one or more defective solder balls on an electronic component workpiece using a single-ball extractor/placer apparatus having a heatable capillary tube pickup head optionally augmented with vacuum suction. A defective solder ball is identified, extracted by the pickup head and disposed of. A nondefective solder ball is picked up by the pickup head, positioned on the vacated attachment site, and thermally softened for attachment to the workpiece. Flux may be first applied to the replacement solder ball or to the vacated attachment site. The extractor/placer apparatus may be automated to locate, extract and replace defective balls for completion of a fully operable BGA.

Abstract: A method of making a diffusion barrier for a interconnect structure. The method comprises: providing a conductive line in a bottom dielectric trench; depositing a sacrificial liner on the cap layer; depositing an interlayer dielectric; forming a trench and a via in the top interlayer dielectric; and removing a portion of the cap layer and the sacrificial layer proximate to the bottom surface of the via. The removed portions of the cap layer and sacrificial layer deposit predominantly along the lower sidewalls of the via. The conductive line is in contact with a cap layer, and the sacrificial layer is in contact with the cap layer. The invention is also directed to the interconnect structures resulting from the inventive process.

Abstract: A structure and method of fabricating a “Lego”-like interlocking contact for high wiring density semiconductors is characterized in that the barrier liner formed in the contact via extends only partially upwards into the adjacent wire level. As a consequence, current crowding and related reliability problems associated with conventional prior art interconnect structures is avoided and structural integrity of the contact via (metal stud) structure is enhanced. The novel “crown” shape of the Lego-like interlocking contact structure that is fabricated to extend in an upward direction may be employed for other integrated circuit applications including forming capacitor (e.g., MIMCAP) and heat sink structures due to its increased surface area.

Abstract: A method for selective electroplating of a semiconductor input/output (I/O) pad includes forming a titanium-tungsten (TiW) layer over a passivation layer on a semiconductor substrate, the TiW layer further extending into an opening formed in the passivation layer for exposing the I/O pad, such that the TiW layer covers sidewalls of the opening and a top surface of the I/O pad. A seed layer is formed over the TiW layer, and portions of the seed layer are selectively removed such that remaining seed layer material corresponds to a desired location of interconnect metallurgy for the I/O pad. At least one metal layer is electroplated over the remaining seed layer material, using the TiW layer as a conductive electroplating medium.

Abstract: A method of reading a memory cell, and a memory array using the method, are described. An electrical load is applied to a first node in the memory array, the first node corresponding to the memory cell. A second node in the memory array, the second node on a same word line as the first node, is precharged. The second node is separated from the first node by at least one intervening node in the same word line.

Abstract: A method for reworking a ball grid array (BGA) of solder balls including one or more defective solder balls on an electronic component workpiece using a single-ball extractor/placer apparatus having a heatable capillary tube pickup head optionally augmented with vacuum suction. A defective solder ball is identified, extracted by the pickup head and disposed of. A nondefective solder ball is picked up by the pickup head, positioned on the vacated attachment site, and thermally softened for attachment to the workpiece. Flux may be first applied to the replacement solder ball or to the vacated attachment site. The extractor/placer apparatus may be automated to locate, extract and replace defective balls for completion of a fully operable BGA.

Abstract: A method of reading a memory cell, and a memory array using the method, are described. An electrical load is applied to a first node in the memory array, the first node corresponding to the memory cell. A second node in the memory array, the second node on a same word line as the first node, is precharged. The second node is separated from the first node by at least one intervening node in the same word line.

Abstract: A method for reworking a ball grid array (BGA) of solder balls including one or more defective solder balls on an electronic component workpiece using a single-ball extractor/placer apparatus having a heatable capillary tube pickup head optionally augmented with vacuum suction. A defective solder ball is identified, extracted by the pickup head and disposed of. A nondefective solder ball is picked up by the pickup head, positioned on the vacated attachment site, and thermally softened for attachment to the workpiece. Flux may be first applied to the replacement solder ball or to the vacated attachment site. The extractor/placer apparatus may be automated to locate, extract and replace defective balls for completion of a fully operable BGA.

Abstract: A method for forming a TiN layer on top of a metal silicide layer in a semiconductor structure without the formation of a thick amorphous layer containing Ti, Co and Si and the structure formed are provided. In the method, after a Ti layer is deposited on top of a metal silidide layer, a dual-step annealing process is conducted in which a low temperature annealing in a forming gas (or ammonia) at a temperature not higher than 500° C. is first conducted for less than 2 hours followed by a high temperature annealing in a nitrogen-containing gas (or ammonia) at a second temperature not lower than 500° for less than 2 hours to form the TiN layer. The present invention method prevents the problem usually caused by a thick amorphous material layer of Ti—Si—Co which produces weakly bonded Ti which reacts with fluorine atoms from WF6 during a subsequent CVD W deposition process and causes liner failure due to a volume expansion of the amorphous material.

Abstract: A method of forming an integrated barrier/contact for stacked capacitors is provided which results in reduced cost of ownership and in a barrier which is nominally several times thicker than convention structures. The resulting structure results in decreased contact plug resistance as compared with conventional devices.

Abstract: A method for preparing the air bearing surface of a slider for etch patterning including the steps of applying a first thin film to a carrier, applying a second thin film to the carrier, the first thin film and the second thin film separated by a recess, each of the first and second thin films having respective first and second air bearing surfaces, applying an adhesive film over the first and second thin films, depositing a fluid in the recess, the fluid held in the recess by the adhesive film, curing the fluid, and removing the adhesive film. The method of the invention may also include coating the first and second air bearing surfaces with an etch mask, developing the etch mask, and patterning the first and second air bearing surfaces.

Abstract: A method for rephasing one or more of the motion components of moving material in a nuclear magnetic resonance imaging system, including velocity, acceleration, pulsatility and higher order motion components. Gradient pulses are applied in one or more of the read, phase encode and slice select directions, and subsequent gradients are then applied in one or more of such directions so that the total net phase in such direction is zero for the desired motion component and non-zero for static material.