Abstract: A voltage regulator may comprise a high-side switch and a low-side switch for delivering electrical current to the at least one information handling resource, a high-side driver configured to drive a high-side driving voltage for regulating a first electrical current of the high-side switch, a low-side driver configured to drive a low-side driving voltage for regulating a second electrical current of the low-side switch, and a control circuit configured to operate the at least one voltage regulator in both of a fixed dead time mode and an adaptive dead time mode.

Abstract: A voltage regulator that includes a high-side and a low-side power transistor is implemented where the high-side and the low-side power transistors are operable to output power to a transient load. The voltage regulator further includes control circuitry coupled to the high-side low-side power transistors and the transient load, with the control circuitry operable to receive a control signal from the transient load or the system. The control signal may correspond to an operating voltage of the transient load. In response to a decrease in a power level, the control circuitry may turn off the high-side power transistor, turn on the low-side power transistor a first duration, and turn off the low-side power transistor for a second duration. The first duration and the second duration may be based, at least in part, on the operating voltage.

Abstract: The present application is directed to a voltage regulator including a high-side and a low-side power transistor. The high-side and the low-side power transistors are operable to output power to a transient load. The voltage regulator further includes control circuitry coupled to the high-side low-side power transistors and the transient load, with the control circuitry operable to receive a control signal from the transient load or the system. The control signal may correspond to an operating voltage of the transient load. In response to a decrease in a power level, the control circuitry may turn off the high-side power transistor, turn on the low-side power transistor a first duration, and turn off the low-side power transistor for a second duration. The first duration and the second duration may be based, at least in part, on the operating voltage.