Abstract: A variable resistance nonvolatile storage device includes: a variable resistance element having a state reversibly changeable between a high resistance state and a low resistance state; and a current supply circuit that supplies the variable resistance element with a low-resistance changing current for changing the state from the high resistance state to the low resistance state. The low-resistance changing current has a waveform that includes a first period and a second period along a time axis, the second period being subsequent to the first period. The current supply circuit applies to the variable resistance element: a first current during the first period; and a second current during the second period, the second current being smaller than the first current. The first current is not zero at an end of the first period, and the second current is not zero at a start of the second period.

Abstract: A hydrogen sensor includes: a first electrode which is planar; a second electrode which is planar, faces the first electrode, and includes an exposed portion; a metal oxide layer which is sandwiched between a surface of the first electrode and a surface of the second electrode, and has a resistance that changes due to hydrogen; and two terminals, i.e., a first terminal and a second terminal, that are connected to the second electrode.

Abstract: A gas detection device includes a gas sensor and a drive circuit. The drive circuit includes a measurement circuit, a power supply circuit, and a control circuit. The gas sensor includes a first electrode, a second electrode, a metal-oxide layer disposed between the first electrode and the second electrode, and an insulating film that covers the first electrode, the second electrode, and the metal-oxide layer, and has an opening that exposes part of a main surface of the second electrode. A resistance value of the metal-oxide layer decreases when gas containing hydrogen atoms contact the second electrode. When the resistance value of the metal-oxide layer falls outside a predetermined range, the drive circuit applies a predetermined voltage between the first electrode and the second electrode to restore the resistance value of the metal-oxide layer back into the predetermined range.

Abstract: A gas sensor driving method for a gas sensor that (i) includes: a first electrode including a first principal surface; a second electrode including a second principal surface; a metal-oxide layer interposed between the first principal surface and the second principal surface that face each other; and an insulating film covering the first electrode, the metal-oxide layer, and the second electrode, and exposing at least a part of a third principal surface of the second electrode, the third principal surface being disposed on an opposite side of the second principal surface, and (ii) detects hydrogen in accordance with a change in a resistance value of the metal-oxide layer. The gas sensor driving method includes repeatedly applying a positive voltage and a negative voltage across the first electrode and the second electrode.

Abstract: A hydrogen detection apparatus includes a hydrogen sensor, a sensor control circuit configured to sense a resistance value of the hydrogen sensor, and a microcomputer configured to set an off time that differs depending on an operating environment and intermittently drive the sensor control circuit. The hydrogen sensor includes a first electrode; a metal-oxide layer on the first electrode, and in which a resistance value is configured to change in response to contacting hydrogen atoms; a second electrode on the metal-oxide layer; and an insulating film that covers at least a portion of lateral surfaces of the first electrode, the metal-oxide layer, and the second electrode. A portion of at least one of: (i) a first interface between the first electrode and the metal-oxide layer; and (ii) a second interface between the second electrode and the metal-oxide layer is uncovered by the insulating film and exposed to a detection space.

Abstract: A gas detection device includes a gas sensor and a drive circuit. The drive circuit includes a measurement circuit, a power supply circuit, and a control circuit. The gas sensor includes a first electrode, a second electrode, a metal-oxide layer disposed between the first electrode and the second electrode, and an insulating film that covers the first electrode, the second electrode, and the metal-oxide layer, and has an opening that exposes part of a main surface of the second electrode. A resistance value of the metal-oxide layer decreases when gas containing hydrogen atoms contact the second electrode. When the resistance value of the metal-oxide layer falls outside a predetermined range, the drive circuit applies a predetermined voltage between the first electrode and the second electrode to restore the resistance value of the metal-oxide layer back into the predetermined range.

Abstract: A hydrogen detection apparatus includes a hydrogen sensor, a sensor control circuit that senses the resistance value of the hydrogen sensor, and a microcomputer that sets an off time that differs depending on an operating environment and intermittently drives the sensor control circuit. The hydrogen sensor includes a first electrode; a metal-oxide layer disposed on the first electrode, and in which a resistance value changes in response to contacting hydrogen atoms; a second electrode disposed on the metal-oxide layer; and an insulating film that covers at least a portion of lateral surfaces of the first electrode, the metal-oxide layer, and the second electrode. A portion of at least one of (i) a first interface between the first electrode and the metal-oxide layer and (ii) a second interface between the second electrode and the metal-oxide layer is uncovered by the insulating film and exposed to a detection space.

Abstract: A forming method includes: applying a first pulse voltage to a second electrode to a variable-resistance nonvolatile memory element in first state; and executing at least once a sequence that includes determining whether the variable-resistance nonvolatile memory element is in a second state, and continuously applying a second pulse voltage followed by a third pulse voltage to the variable-resistance nonvolatile memory element when the variable-resistance nonvolatile memory element is determined not to be in the second state.

Abstract: A forming method includes: applying a first pulse voltage to a second electrode to a variable-resistance nonvolatile memory element in first state; and executing at least once a sequence that includes determining whether the variable-resistance nonvolatile memory element is in a second state, and continuously applying a second pulse voltage followed by a third pulse voltage to the variable-resistance nonvolatile memory element when the variable-resistance nonvolatile memory element is determined not to be in the second state.

Abstract: A selection circuit that selects a memory cell from a memory cell array and a read circuit for reading a resistance state of a resistance change element in the selected memory cell are provided. In memory cells of odd-numbered-layer and even-numbered-layer memory cell arrays that constitute a multilayer memory cell array, each memory cell in any of the layers has a selection element, a first electrode, a first resistance change layer, a second resistance change layer, and a second electrode that are disposed in the same order. Whether the selected memory cell is located in any layer of the multilayer memory cell array, the read circuit applies a voltage to the selected memory cell to perform the reading operation. The voltage applied to the selected memory cell causes the second electrode to become positive with reference to the first electrode in the selected memory cell.

Abstract: A variable resistance nonvolatile memory element writing method of, by applying a voltage pulse to a memory cell including a variable resistance element, reversibly changing the variable resistance element between a first resistance state and a second resistance state according to a polarity of the applied voltage pulse is provided. The variable resistance nonvolatile memory element writing method includes applying a first preliminary voltage pulse and subsequently applying the first voltage pulse to the variable resistance element to change the variable resistance element from the second resistance state to the first resistance state, the first preliminary voltage pulse being smaller in voltage absolute value than the second threshold voltage and different in polarity from the first voltage pulse.

Abstract: A variable resistance nonvolatile memory device includes: a nonvolatile memory element; an NMOS transistor connected to the nonvolatile memory element; a source line connected to the NMOS transistor; a bit line connected to the nonvolatile memory element. When a control circuit causes the nonvolatile memory element to be in the low resistance state, the control circuit controls to flow a first current from a first voltage source to a reference potential point, and applies a first gate voltage to a gate of a NMOS transistor, and when the control circuit causes the nonvolatile memory element to be in the high resistance state, the control circuit controls to flow a second current from a second voltage source to the reference potential point, and applies a second gate voltage to the gate of the NMOS transistor, the second gate voltage being lower than the first gate voltage.

Abstract: In a method for writing into a variable resistance nonvolatile memory device according to one aspect of the present disclosure, a verify write operation of newly applying a voltage pulse for changing a resistance state is performed on a variable resistance element which does not satisfy a determination condition for verifying that the resistance state has been changed despite application of a voltage pulse for changing the resistance state, and the determination condition in the verify write operation is relaxed when an average number of times of verify write operation, having already been performed on all or part of a plurality of variable resistance elements that are targets for write operation, exceeds a predetermined number of times.

Abstract: A variable resistance nonvolatile memory device includes: a nonvolatile memory element; an NMOS transistor connected to the nonvolatile memory element; a source line connected to the NMOS transistor; a bit line connected to the nonvolatile memory element. When a control circuit causes the nonvolatile memory element to be in the low resistance state, the control circuit controls to flow a first current from a first voltage source to a reference potential point, and applies a first gate voltage to a gate of a NMOS transistor, and when the control circuit causes the nonvolatile memory element to be in the high resistance state, the control circuit controls to flow a second current from a second voltage source to the reference potential point, and applies a second gate voltage to the gate of the NMOS transistor, the second gate voltage being lower than the first gate voltage.

Abstract: A write method for writing to a variable resistance nonvolatile memory element, comprising applying a set of strong recovery-voltage pulses at least once to the variable resistance nonvolatile memory element when it is determined that the resistance state of the variable resistance nonvolatile memory element fails to change to a second resistance state, remaining in a first resistance state, the set of strong recovery-voltage pulses including pulses: (1) a first strong recovery-voltage pulse which has a greater amplitude than a normal second voltage for changing the resistance state to the first resistance state, and has the same polarity as the second voltage; and (2) a second strong recovery-voltage pulse which follows the first strong recovery-voltage pulse and has a longer pulse width than the pulse width of the normal first voltage for changing the resistance state to the second resistance state, and has the same polarity as the first voltage.

Abstract: A selection circuit that selects a memory cell from a memory cell array and a read circuit for reading a resistance state of a resistance change element in the selected memory cell are provided. In memory cells of odd-numbered-layer and even-numbered-layer memory cell arrays that constitute a multilayer memory cell array, each memory cell in any of the layers has a selection element, a first electrode, a first resistance change layer, a second resistance change layer, and a second electrode that are disposed in the same order. Whether the selected memory cell is located in any layer of the multilayer memory cell array, the read circuit applies a voltage to the selected memory cell to perform the reading operation. The voltage applied to the selected memory cell causes the second electrode to become positive with reference to the first electrode in the selected memory cell.

Abstract: A writing method of a variable resistance non-volatile memory element comprises determining, in a first determination step, whether or not a resistance state of the variable resistance non-volatile memory element does not switch to a first resistance state and remains in a second resistance state, when a pulse of a second voltage is applied to the variable resistance non-volatile memory element; and when it is determined that the resistance state of the variable resistance non-volatile memory element does not switch to the first resistance state and remains in the second resistance state in the first determination step, applying, in a recovery step, at least once to the variable-resistance non-volatile memory element a recovery voltage pulse set composed of two pulses which are a first recovery voltage pulse which has the same polarity as that of the first voltage and a second recovery voltage pulse which has the same polarity as that of the second voltage, has a greater amplitude than the second voltage, and

Abstract: Provided is a method of writing to a variable resistance nonvolatile memory element which is capable of both improving retention characteristics and enlarging a window of operation. In the method of writing, to write “1” data (LR), first a weak HR writing process is performed in which a weak HR writing voltage pulse set for changing the variable resistance nonvolatile memory element to an intermediate resistance state is applied and, subsequently, a LR writing process is performed in which a LR writing voltage pulse set for changing the variable resistance nonvolatile memory element from the intermediate resistance state to a LR state is applied.

Abstract: A sense amplification circuit includes a sneak current compensating load current supply unit that selectively switches a load current among load currents having different current amounts and supplies the load current to a bit line selected by a column selection circuit. The sense amplification circuit outputs ‘L’ level when a current amount of the load current is more than a reference current amount, and outputs ‘H’ level when the current amount is less than the reference current amount. A control circuit adjusts the current amount to a predetermined current amount that causes the sense amplification circuit to output ‘H’ level. After the adjustment, the control circuit performs control to supply the load current having the predetermined current amount and controls the writing unit to keep the application until the sense amplification circuit outputs ‘L’ level.

Abstract: In forming, an automatic forming circuit (210) included in a nonvolatile memory device (200) causes a constant current IL to flow in a selected memory cell having a considerably high initial resistance. When the forming generates a filament path in the memory cell and thereby a resistance value is decreased, a potential of a node NBL and a potential of a node Nin are also decreased. If the potentials become lower than that of a reference voltage Vref, an output NO of a difference amplifier (303) for detecting forming success is activated, and a forming success signal Vfp is activated after a delay time depending on the number n of flip flops FF1 to FFn and a clock signal CLK. Thereby, a switch transistor (301) is in a non-conducting state and the forming on a variable resistance element is automatically terminated.