Patents by Inventor Ken Sakamura

Ken Sakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040158490
    Abstract: A portable terminal 10 according to the present invention is provided with an electronic book coupon storage 12, an electronic book coupon transmitter 14, and an electronic book coupon receiver 15. The electronic book coupon storage 12 stores an electronic book coupon which can be charged with no electronic worth by the portable terminal 10. The electronic book coupon transmitter 14 transmits the electronic book coupon stored in the electronic book coupon storage 12, to an electronic book coupon circulating server 20. The electronic book coupon receiver 15 receives the electronic book coupon charged with electronic worth by the electronic book coupon circulating server 20, from the electronic book coupon circulating server 20.
    Type: Application
    Filed: May 20, 2003
    Publication date: August 12, 2004
    Applicants: NTT DoCoMo, Inc.
    Inventors: Ken Sakamura, Noboru Koshizuka, Hiroshi Aono, Kazuhiko Ishii, Kensaku Mori, Sadayuki Hongo
  • Publication number: 20040153422
    Abstract: A portable terminal 20 according to the present invention is provided with an electronic book coupon storage 22, a book data receiver 24, an electronic book coupon deductor 25, and a book data decryptor 26. The electronic book coupon storage 22 stores an electronic book coupon used in acquisition of book data containing a plurality of page data units, along with a decryption key used in decryption of the plurality of page data units. The book data receiver 24 receives the book data from an electronic book providing server 30. The electronic book coupon deductor 25 deducts an electronic worth equivalent to a price according to page data requested to be readout, from the electronic book coupon. The book data decryptor 26 decrypts the page data in steps of one page data unit by use of the decryption key in conjunction with the deduction of the electronic worth.
    Type: Application
    Filed: May 20, 2003
    Publication date: August 5, 2004
    Applicants: NTT DoCoMo, Inc., Ken SAKAMURA, Noboru Koshizuka
    Inventors: Ken Sakamura, Noboru Koshizuka, Hiroshi Aono, Kazuhiko Ishii, Kensaku Mori, Sadayuki Hongo
  • Publication number: 20040059685
    Abstract: Between an IC card (1) and a electronic ticket server (2), upon purchasing an electronic ticket a public key cryptosystem is employed for a mutual authentication to keep a strict security, and a shared secret between the electronic ticket and a ticket collecting machine is sent on a secure channel as well as the electronic ticket. Upon usage of the electronic ticket, the IC card (1) and the ticket collecting machine (6) mutually judge whether they carry out the mutual authentication by using a public key cryptosystem or a symmetric key cryptosystem. When they determine to use the symmetric key cryptosystem, they carry out the mutual authentication by using the shared secret exchanged beforehand. When they determine to use the public key cryptosystem, they carry out the mutual authentication by using the same method as that used upon purchasing the electronic ticket.
    Type: Application
    Filed: June 10, 2003
    Publication date: March 25, 2004
    Applicants: Ken SAKAMURA, Noboru KOSHIZUKA, NTT DoCoMo, Inc.
    Inventors: Ken Sakamura, Noboru Koshizuka, Hiroshi Aono, Kazuhiko Ishii, Kensaku Mori, Sadayuki Hongo
  • Publication number: 20040044625
    Abstract: The object of the present invention is to prevent the fraudulent copying and creation of digital contents.
    Type: Application
    Filed: June 10, 2003
    Publication date: March 4, 2004
    Applicants: Ken SAKAMURA, Noboru KOSHIZUKA, NTT DoCoMo, Inc.
    Inventors: Ken Sakamura, Noboru Koshizuka, Kensaku Mori, Kazuhiko Ishii, Hiroshi Aono, Sadayuki Hongo
  • Publication number: 20040034766
    Abstract: An autonomous integrated circuit card includes a logic external communication interface which directly communicates with a communication device connected to an integrated circuit card terminal main body via a network, in addition to a host device interface connected to an integrated card reader/writer via a physical layer. A communication control unit includes a software module which directly communicates with the communication device via the external communication interface. A central processing unit performs authentication via the communication control unit and reads value information stored in a nonvolatile memory. Further, the central processing unit encrypts the read value information by use of an encryption processing unit and directly transmits the encrypted value information to the communication device via the communication control unit and the external communication interface.
    Type: Application
    Filed: June 10, 2003
    Publication date: February 19, 2004
    Applicants: NTT DoCoMo, Inc.
    Inventors: Ken Sakamura, Noboru Koshizuka, Kazuhiko Ishii, Kensaku Mori, Hiroshi Aono, Sadayuki Hongo
  • Publication number: 20040033813
    Abstract: When direct communication is performed between a cellular phone 2a having an IC card 1a inserted in its slot and a cellular phone 2b having an IC card 1b inserted in its slot, the IC cards 1a and 1b perform mutual authentication, and then notify each other of the IDs of the IC cards and the connection information of the cellular phones. Subsequently, one IC card 1 capable of connecting to a server 3 performs mutual authentication with the server 3, and then notifies the server 3 of the ID and the connection information concerning the other IC card. Thus, even if the other IC card is in a state where it cannot directly communicate with the server 3, the ID and the connection information concerning the other IC card can be managed in the server 3.
    Type: Application
    Filed: June 10, 2003
    Publication date: February 19, 2004
    Applicants: NTT DoCoMo, Inc.
    Inventors: Ken Sakamura, Noboru Koshizuka, Kazuhiko Ishii, Kensaku Mori, Hiroshi Aono, Sadayuki Hongo
  • Publication number: 20040030896
    Abstract: A cryptographic communication method between IC cards in an electronic ticket distribution system is provided, wherein when a server and a user terminal, to each of which an IC card is connected, begin mutual data-communication or when an IC card and, a ticket collecting machine begin mutual data-communication, they both dynamically change encryption algorithms for mutual authentication and for concealment of contents to be transmitted in accordance with information about commonly usable encryption algorithms exchanged at the beginning of a mutual authentication between them, and this procedure at the beginning of the mutual authentication can result in a speedy and secured cryptographic communication between them.
    Type: Application
    Filed: June 10, 2003
    Publication date: February 12, 2004
    Applicants: Ken SAKAMURA, Noboru KOSHIZUKA, NTT DoComo, Inc.
    Inventors: Ken Sakamura, Noboru Koshizuka, Hiroshi Aono, Kazuhiko Ishii, Kensaku Mori, Sadayuki Hongo
  • Publication number: 20030236744
    Abstract: Each IC card 1 notifies a server 3 of the ID of the IC card and the connection information of a terminal device to which the IC card is connected. The server 3 stores the ID and the connection information in a database 4 while associating the ID and the connection information with each other. When an IC card 1 communicates with another IC card, the IC card 1 requests the connection information concerning the destination IC card from the server 3 while specifying the ID of this IC card. The server 3 searches the database 4 for the connection information corresponding to the ID specified by the request, and notifies the requesting IC card 1 of the acquired connection information. This enables communications between IC cards even if the terminal device to which a destination IC card is connected has been changed in the past.
    Type: Application
    Filed: June 10, 2003
    Publication date: December 25, 2003
    Applicants: NTT DoCoMo, Inc.
    Inventors: Ken Sakamura, Noboru Koshizuka, Kazuhiko Ishii, Kensaku Mori, Hiroshi Aono, Sadayuki Hongo
  • Publication number: 20030228886
    Abstract: The object of the present invention is to prevent copying of electronic value data itself. In communication system of the present invention, different from the conventional system, source IC card A and target IC card B mutually authenticate the other party, and thereafter the electronic value data is transferred from IC card A to IC card B through direct encryption communication between these IC cards A, B, whereby it is feasible to prevent decipher and falsification of the data by a third party in the middle of a communication path and prevent copying of the data.
    Type: Application
    Filed: June 3, 2003
    Publication date: December 11, 2003
    Applicants: NTT DoCoMo, Inc., Ken SAKAMURA, Noboru KOSHIZUKA
    Inventors: Kazuhiko Ishii, Kensaku Mori, Hiroshi Aono, Sadayuki Hongo, Ken Sakamura, Noboru Koshizuka
  • Patent number: 5680568
    Abstract: A data processor which has an operand instruction having an operation code specifying portion to specify the kind of operation and an effective address specifying field showing the effective address of the operand, so that an additional mode specifying field to perform the extension modification of addressing can be added to an addressing mode shown by the effective address specifying field, whereby even when the address modification extension is carried out at multiple levels, the address calculation can sequentially be performed while reading each part of the operand, thereby improving the execution speed of program and facilitating complier structure.
    Type: Grant
    Filed: June 15, 1994
    Date of Patent: October 21, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Ken Sakamura
  • Patent number: 5606675
    Abstract: The invention provides a novel data processor containing specific instructions including that which invalidates the content or branch records stored in cache memory, instruction queue, instruction pipeline, and branch prediction mechanism, and that which fetches and executed instructions having propriety, so that the data processor to securely coordinate the instruction string of main memory and those instructions to be actually processed, thus eventually preventing the instruction pipelines from conflict between them.
    Type: Grant
    Filed: April 21, 1992
    Date of Patent: February 25, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Ken Sakamura, Akira Ohtsuka
  • Patent number: 5434988
    Abstract: The data processor accesses memory with an address value which is expressed by signed binary notation expressed by twos compliment, is so constructed that the negative address value having maximum absolute value and the positive address value having the same are not wrapped around each other, is provided with hardware which signed extends the address values expressed by relatively small bit number, and is so constructed that the user area and the supervisor area are separated from each other in accordance with the positiveness and the negativeness of address value, so that the positive and negative address space are allowed to optionally be extended in the direction of the greater absolute value without being split, and extending process of address value is easy, furthermore, the user area and the supervisor area can be judged merely by means of the signed bit denoting either the positiveness or the negativeness, to thereby violation of the access right in the supervisor area under the user mode being able to
    Type: Grant
    Filed: January 14, 1994
    Date of Patent: July 18, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Ken Sakamura, Toyohiko Yoshida
  • Patent number: 5398319
    Abstract: A microprocessor including instruction decoding apparatus, instruction execution apparatus and information holding apparatus. The microprocessor performs a first step of storing information specifying the kind of operation to be performed by the instruction execution apparatus, upon execution of a first instruction, in the information holding apparatus and a second step of causing the instruction execution apparatus to perform the kind of operation specified by information stored in the information holding apparatus when a second instruction is decoded and includes information specifying that the operation to be performed by the instruction execution apparatus is the kind of operation specified by the information stored in the information holding apparatus.
    Type: Grant
    Filed: September 11, 1992
    Date of Patent: March 14, 1995
    Assignees: Ken Sakamura, Hitachi Ltd., Hitachi Microcomputer Engineering Ltd.
    Inventors: Ken Sakamura, Ikuya Kawasaki, Atsushi Hasegawa, Kazuhiko Iwasaki, Motonobu Tonomura
  • Patent number: 5327542
    Abstract: The data processor related to the invention accesses memory with an address value which is expressed by signed binary notation expressed by twos compliment, is so constructed that the negative address value having maximum absolute value and the positive address value having the same are not wrapped around each other, is provided with hardware which signed extends the address values expressed by relatively small bit number, and is so constructed that the user area and the supervisor area are separated from each other in accordance with the positiveness and the negativeness of address value, so that the positive and negative address space are allowed to optionally be extended in the direction of the greater absolute value without being split, and extending process of address value is easy, furthermore, the user area and the supervisor area can be judged merely by means of the signed bit denoting either the positiveness or the negativeness, to thereby violation of the access right in the supervisor area under th
    Type: Grant
    Filed: July 8, 1993
    Date of Patent: July 5, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Ken Sakamura, Toyohiko Yoshida
  • Patent number: 5307474
    Abstract: A data processor of this invention capable of extending the expressible range of constant data in which a portion of the expressible range not necessary for an instruction is removed from that range and the vacancy thus made is utilized for extending the range of data necessary for the instruction.
    Type: Grant
    Filed: May 11, 1992
    Date of Patent: April 26, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Ken Sakamura, Jiro Korematsu
  • Patent number: 5274637
    Abstract: In a token-ring-type local area network (LAN), a plurality of communication nodes are linked together into a ring by a transmission path, onto which a token used for obtaining a transmission right is circulating through and a frame carrying data is transferred through. Herein, the token has a first memory area for memorizing a ring priority, while the frame has a second memory area for memorizing a reservation priority corresponding to a data priority of the data owned by each communication node. When a current communication node receives the token, the frame is generated and transmitted therefrom without transmitting the token if the data priority is higher than the reservation priority. When the current communication node receives the frame, the data priority of the current communication node is written into the second memory area of the frame if the data priority is higher than the reservation priority.
    Type: Grant
    Filed: December 28, 1990
    Date of Patent: December 28, 1993
    Assignee: Yamaha Corporation
    Inventors: Ken Sakamura, Kanehisa Tsurumi, Kazushi Tamai, Nobuharu Nakamura
  • Patent number: 5210835
    Abstract: In addition to an ordinary bit field instruction without limitation which makes use of an offset value and a field width, a bit field instruction with limitation which does not calculate the spread of the bit field is separately installed. In the present invention the calculation for determination of the spread of the bit field is not performed when the bit field instruction with limitation is executed. In addition, when executing a bit field instruction with limitation, the offset value and the field width can be obtained directly as immediate values thereby decreasing the execution time of the instruction.
    Type: Grant
    Filed: January 2, 1990
    Date of Patent: May 11, 1993
    Assignees: Ken Sakamura, Hitachi, Ltd., Hitachi Microcomputer Engineering Co., Ltd.
    Inventors: Ken Sakamura, Takuichiro Nakazawa, Atsushi Hasegawa, Ikuya Kawasaki, Kazuhiko Iwasaki
  • Patent number: 5201039
    Abstract: Two or more address spaces are provided in a data processor. One of the address spaces comprises control registers so that the control registers can be accessed using instructions having an address in the second address space. High-speed context switching can be accomplished by allotting the context-saving area to the second address space. The context can be saved in various formats specified by a context format register.
    Type: Grant
    Filed: August 20, 1990
    Date of Patent: April 6, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Ken Sakamura
  • Patent number: 5170474
    Abstract: A method for searching the memory of a data processing apparatus including a decoder for decoding the contents of an instruction and an execution unit for executing is performed in response to an instruction based on an output from the decoder, the search instruction which identifies a desired data storage area from a plurality of data storage areas in the memory which includes an array data structure.
    Type: Grant
    Filed: September 24, 1991
    Date of Patent: December 8, 1992
    Assignees: Hitachi, Ltd., Hitachi Microcomputer Engineering Ltd.
    Inventors: Ken Sakamura, Kouzi Hashimoto, Ikuya Kawasaki, Atsushi Hasegawa, Kazuhiko Iwasaki
  • Patent number: 5140684
    Abstract: The data processor related to the invention accesses memory with an address value which is expressed by signed binary notation expressed by twos compliment, is so constructed that the negative address value having maximum absolute value and the positive address value having the same are not wrapped around each other, is provided with hardware which signed extends the address values expressed by relatively small bit number, and is so constructed that the user area and the supervisor area are separated from each other in accordance with the positiveness and the negativeness of address value, so that the positive and negative address space are allowed to optionally be extended in the direction of the greater absolute value without being split, and extending process of address value is easy, furthermore, the user area and the supervisor area can be judged merely by means of the signed bit denoting either the positiveness or the negativeness, to thereby violation of the access right in the supervisor area under th
    Type: Grant
    Filed: February 28, 1991
    Date of Patent: August 18, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Ken Sakamura, Toyohiko Yoshida