Patents by Inventor Kenichi Arakawa

Kenichi Arakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6031571
    Abstract: A solid-state imaging device has a storage section formed on a surface portion of a semiconductor substrate to receive and store signal charges, a discharge section formed on the surface portion of the substrate at a predetermined distance from the storage section, a reset section constituted by a depletion-type MOS transistor formed between the storage section and the discharge section, and reset voltage setting means for setting a voltage of a reset pulse to be applied to the reset section. The reset voltage setting section has first and second resistive elements series-connected between one end to which a predetermined voltage is applied and the other end which is grounded. A node which connects the first resistive element to the second resistive element is connected to a reset voltage application electrode.
    Type: Grant
    Filed: May 23, 1997
    Date of Patent: February 29, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kenichi Arakawa
  • Patent number: 5847757
    Abstract: A driving method for a solid-state image sensing device includes the steps of: transferring signal charges generated at pixels (12) arranged in odd rows in the column upward direction through vertical transfer paths (13) each arranged for each column; temporarily accumulating the upward transferred signal charges for one field at a first accumulation region (14) and transferring the accumulated signal charges row by row in sequence for each field period through other vertical transfer paths (18) to a first horizontal path (16); transferring the upward transferred signal charges in the horizontal row direction row by row through the first horizontal transfer path (16); transferring signal charges generated at pixels (12) arranged in even rows in the column downward direction through the same vertical transfer paths (13); temporarily accumulating the downward transferred signal charges for one field at a second accumulation region (15) and transferring the accumulated signal charges row by row in sequence for e
    Type: Grant
    Filed: February 23, 1996
    Date of Patent: December 8, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobusuke Sasano, Kenichi Arakawa, Tomoaki Iizuka, Miho Kobayashi, Hideki Motoyama, Tetsuo Yamada
  • Patent number: 5796610
    Abstract: In order to provide a method of detecting seam characteristic points which makes it possible to accurately and quickly detect seam characteristic points, which are used as work target positions, by using coordinate data of a series of distance points detected by a sensor, when sealing is performed by a robot (1) equipped with a sensor (2), seam characteristic points P of an object are detected, a distance to an arbitrary cross section of an object is detected by the sensor (2), the data obtained through the measurement are converted into coordinate data of a series of distance points arranged in a predetermined order, a statistic value regarding the distance between paired adjacent distance points among the series of distant points is calculated so as to obtain a threshold level for judging discontinuity, based on the statistic value, the distance between paired adjacent distance points is compared with the discontinuity threshold level so as to detect a pair of adjacent distance points which are separated fr
    Type: Grant
    Filed: October 24, 1996
    Date of Patent: August 18, 1998
    Assignees: Nippon Telegraph and Telephone Corporation, Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Kenichi Arakawa, Takao Kakizaki, Shinji Omyo
  • Patent number: 5572051
    Abstract: A solid state image sensing device, comprises: an n-type semiconductor substrate (11), a p-type well (12) formed on a surface of the semiconductor substrate, and a p.sup.+ -type diffusion layer (13, 21) having an impurity concentration higher than that of the well. In particular, the P.sup.+ -type diffusion layer (13) is formed so as to cover at least a part of circumference of an n-type diffusion layer (17) of a load transistor (N3) formed in the well (12) as a source follower circuit. Instead, the P.sup.+ -type diffusion layer (21) is formed between the n-type diffusion layer (17) of the load transistor (N3) and the semiconductor substrate (11).
    Type: Grant
    Filed: December 7, 1994
    Date of Patent: November 5, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenichi Arakawa, Kenji Nakahara
  • Patent number: 5548142
    Abstract: A solid-state imaging device capable of removing undesired influences, includes a semiconductor substrate having one of conductive types, a well layer arranged on the substrate and having the other conductive type opposite to the substrate, photo-sensitive pixels recessed in a matrix having a predetermined number and having the conductive type opposite to the well layer to generate signal charges corresponding to an incident light amount, a transfer channel formed along one direction of the photosensitive pixels arranged by the conductive type as the same as that of the substrate to transfer the signal charges generated by the photosensitive pixels, an electrode provided to the transfer channel on a side opposite to the substrate to supply an electric field to the transfer channel, and a barrier well formed of the impurity semiconductor material of the conductive type opposite to the conductive type of the semiconductor substrate in the manner that an impurity density of the well layer becomes longer along th
    Type: Grant
    Filed: May 17, 1995
    Date of Patent: August 20, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kenichi Arakawa
  • Patent number: 5500675
    Abstract: In the method of driving a solid-state image sensing device, for each vertical blanking (VBL), the signal charges of a first pixel group composed of photosensitive pixels of odd ordinal numbers counted in the vertical direction of the photosensitive region and the signal charges of a second pixel group composed of photosensitive pixels of even ordinal numbers counted in the same way are reversed in the vertical transfer direction, so that the signal charges of the first and second pixel groups can be outputted from the same charge detecting circuit for each field. Further, unnecessary accumulated charges in the pixel groups in the photosensitive region are cleared off in response to an accumulated charge clear pulse.
    Type: Grant
    Filed: February 14, 1994
    Date of Patent: March 19, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenichi Arakawa, Nobusuke Sasano, Tomoaki Iizuka, Miho Kobayashi, Tetsuo Yamada, Hideki Motoyama
  • Patent number: 5396091
    Abstract: Solid-state image sensing device is provided with a synthesizing section for synthesizing odd-field signal charges and even-field signal charges. The synthesizing section is a transfer path formed outside of the photosensitive region or vertical transfer paths formed in the photosensitive region. For the signal charge synthesis through vertical transfer path, after the integration, the signal charges are read simultaneously from the odd-line pixel group and the even-line pixel group. Further, it is possible to select either the method of outputting the odd-field signal charges and the even-field signal charges separately or the method of outputting the synthesized odd- and even-field signal charges.
    Type: Grant
    Filed: February 14, 1994
    Date of Patent: March 7, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Miho Kobayashi, Tomoaki Iizuka, Hideki Motoyama, Tetsuo Yamada, Kenichi Arakawa, Nobusuke Sasano
  • Patent number: 5389805
    Abstract: A solid-state image sensing device comprises: a charge storage layer (12) formed in the vicinity of a surface of a first conductive type semiconductor substrate (11), for transferring incident light into an electric signal photoelectrically and further storing the transferred electric signal as a signal charge temporarily; a transfer channel (14) formed on the surface of the semiconductor substrate, for transferring the signal charge stored in the charge storing layer; a depletion prevention layer (13) formed on the surface of the semiconductor substrate and on the charge storage layer, for preventing interfaces from being depleted; and a barrier layer (16) formed at a position deeper than the transfer channel, for preventing punch through from being generated between the charge storage layer (12) and the transfer channel (14). The barrier layer (16) is formed locally at such a position that a maximum impurity concentration thereof is located at a position deeper than the depletion prevention layer.
    Type: Grant
    Filed: March 29, 1994
    Date of Patent: February 14, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kenichi Arakawa