Patents by Inventor Kenichi Iguchi

Kenichi Iguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11977042
    Abstract: An oxygen sensor for detecting gas concentration based on either an electric current value or a resistance value measured when a voltage is applied to a sensor element includes gaps formed between electrodes arranged in an element main body and ridges where surfaces of an element touch each other. These gaps will be escaping parts for expansion and contraction of electrode material that accompany thermal expansion and contraction of a sensor main body, and concentration of thermal stress at edge parts of the element main body may thus be eliminated, thereby alleviating thermal stress on the oxygen sensor. This allows provision of a gas sensor that controls generation of cracks in the element and that is stably usable over a long period of time.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: May 7, 2024
    Assignee: KOA Corporation
    Inventors: Chika Ito, Ken Takahashi, Tetsuro Tanaka, Kenichi Iguchi
  • Publication number: 20240125589
    Abstract: A film thickness measuring apparatus measures a film thickness of a sample during a manufacturing step. The film thickness measuring apparatus includes a lens focusing light (plasma light) generated in the manufacturing step and reflected by one surface of the sample, an inclined dichroic mirror having a transmissivity and a reflectivity changing in accordance with a wavelength in a predetermined wavelength region and separating light focused by the lens through transmission and reflection, an area sensor capturing an image of light separated by the inclined dichroic mirror, and a control apparatus estimating the film thickness of the sample on the basis of a signal from the area sensor capturing an image of light and obtaining a film thickness distribution on the one surface of the sample. Light reflected by the sample includes light having a wavelength included in the predetermined wavelength region of the inclined dichroic mirror.
    Type: Application
    Filed: November 4, 2021
    Publication date: April 18, 2024
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Kenichi OHTSUKA, Kazuya IGUCHI, Tomonori NAKAMURA
  • Publication number: 20240088276
    Abstract: Provided is a semiconductor apparatus having a MOS gate structure, comprising: a semiconductor substrate; a first interlayer dielectric film provided above an upper surface of the semiconductor substrate and including a first opening; and a second interlayer dielectric film stacked on the first interlayer dielectric film and including a second opening overlapping the first opening in a top view, wherein a width of the first opening in a first direction is different from a width of the second opening in the first direction, at a boundary height between the first interlayer dielectric film and the second interlayer dielectric film.
    Type: Application
    Filed: November 23, 2023
    Publication date: March 14, 2024
    Inventor: Kenichi IGUCHI
  • Patent number: 11929412
    Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes a first insulating layer, a second insulating layer, a third insulating layer, a fourth insulating layer, a semiconductor layer, and a first conductive layer. The second insulating layer is positioned over the first insulating layer and the island-shaped semiconductor layer is positioned over the second insulating layer. The second insulating layer has an island shape having an end portion outside a region overlapping with the semiconductor layer. The fourth insulating layer covers the second insulating layer, the semiconductor layer, the third insulating layer, and the first conductive layer, is in contact with part of a top surface of the semiconductor layer, and is in contact with the first insulating layer outside the end portion of the second insulating layer.
    Type: Grant
    Filed: July 18, 2022
    Date of Patent: March 12, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masami Jintyou, Takahiro Iguchi, Yukinori Shima, Kenichi Okazaki
  • Publication number: 20230349851
    Abstract: A sensor element (12) has a cross-sectional area that continuously only increases from a positive (+) electrode side toward a negative (?) electrode side, thereby leading a hot spot, which attempts to move to the negative electrode side, to a lower resistance side. A position that is at nearly equal distances from paired electrodes (13 and 15) formed on either end of the sensor element (12) is set as a hot spot generating position, so as to avoid damage to the electrodes due to heat emitted by the hot spot.
    Type: Application
    Filed: June 7, 2023
    Publication date: November 2, 2023
    Inventors: Tetsuro TANAKA, Kenichi IGUCHI, Ken TAKAHASHI, Chika ITO
  • Patent number: 11370671
    Abstract: Focusing on zinc oxide itself, which is a main raw material for a zinc oxide varistor (laminated varistor), a predetermined amount of additive is added to a zinc oxide powder having crystallite size of 20 to 100 nm, particle diameter of 20 to 110 nm found using a specific area BET method, untamped density of 0.60 g/cm3 or greater, and tap density of 0.80 g/cm3 or greater. This allows a zinc oxide sintered body to secure uniformity, high density, and high electric conductivity, resulting in a zinc oxide varistor with high surge resistance, capable of downsizing and cost reduction. Moreover, addition of aluminum (Al), as a donor element, to the zinc oxide powder allows control of sintered grain size in conformity with the aluminum added amount and baking temperature, and also allows adjustment of varistor voltage, etc.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: June 28, 2022
    Assignees: KOA Corporation, JFE Mineral Company, Ltd.
    Inventors: Naomi Ishida, Yoji Gomi, Kenichi Iguchi, Etsurou Udagawa, Yuko Echizenya, Yoshimi Nakata
  • Patent number: 11370712
    Abstract: Focus is on zinc oxide itself, which is a base material for a zinc oxide varistor (laminated varistor), wherein specified quantities of additives are added to a zinc oxide powder having a crystallite size of 20 to 50 nm, grain diameter of 15 to 60 nm found using the specific surface area BET method, untamped density of 0.38 to 0.50 g/cm3, and tap density of 0.50 to 1.00 g/cm3. This allows securing of uniformity, high compactness, and high electrical conductivity of a zinc oxide sintered body, and provision of a zinc oxide varistor having high surge resistance.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: June 28, 2022
    Assignees: KOA Corporoation, JFE Mineral Company, Ltd.
    Inventors: Yoji Gomi, Kenichi Iguchi, Etsurou Udagawa, Yuko Echizenya, Yoshimi Nakata
  • Patent number: 11264240
    Abstract: A semiconductor device is manufactured by implanting impurity ions in one surface of a semiconductor substrate made of silicon carbide; irradiating a region of the semiconductor substrate implanted with the impurity ions with laser light of a wavelength in the ultraviolet region; and forming, on a surface of a high-concentration impurity layer formed by irradiating with the laser light, an electrode made of metal in ohmic contact with the high-concentration impurity layer. When irradiating with the laser light, a first concentration peak of the impurity ions that exceeds a solubility limit concentration of the impurity ions in silicon carbide is formed in a surface region near the one surface of the semiconductor substrate within the high-concentration impurity layer.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: March 1, 2022
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Kenichi Iguchi, Haruo Nakazawa
  • Patent number: 11245010
    Abstract: A semiconductor device having a semiconductor substrate that includes a first-conductivity-type substrate and a first-conductivity-type epitaxial layer, and a plurality of trenches reaching a predetermined depth from a main surface of the semiconductor substrate to terminate in the first-conductivity-type epitaxial layer. The semiconductor substrate includes a hydrogen-donor introduced part, of which a concentration of a hydrogen donor is greatest at a depth position that is separate from bottoms of the trenches by a distance at least two times of the depth of the trenches. The impurity concentration of an impurity dopant of the first-conductivity-type substrate being lower than that of the first-conductivity-type epitaxial layer.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: February 8, 2022
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Kosuke Yoshida, Haruo Nakazawa, Kenichi Iguchi, Koh Yoshikawa, Motoyoshi Kubouchi
  • Publication number: 20210238052
    Abstract: Focusing on zinc oxide itself, which is a main raw material for a zinc oxide varistor (laminated varistor), a predetermined amount of additive is added to a zinc oxide powder having crystallite size of 20 to 100 nm, particle diameter of 20 to 110 nm found using a specific area BET method, untamped density of 0.60 g/cm3 or greater, and tap density of 0.80 g/cm3 or greater. This allows a zinc oxide sintered body to secure uniformity, high density, and high electric conductivity, resulting in a zinc oxide varistor with high surge resistance, capable of downsizing and cost reduction. Moreover, addition of aluminum (Al), as a donor element, to the zinc oxide powder allows control of sintered grain size in conformity with the aluminum added amount and baking temperature, and also allows adjustment of varistor voltage, etc.
    Type: Application
    Filed: June 4, 2019
    Publication date: August 5, 2021
    Inventors: Naomi ISHIDA, Yoji GOMI, Kenichi IGUCHI, Etsurou UDAGAWA, Yuko ECHIZENYA, Yoshimi NAKATA
  • Patent number: 11069779
    Abstract: A silicon carbide semiconductor device includes a first semiconductor layer of silicon carbide, a device structure provided on top of the first semiconductor layer, a second semiconductor layer of silicon carbide having a higher impurity concentration than the first semiconductor layer, provided under the first semiconductor layer, the second semiconductor layer implementing an ohmic-contact, and a metallic electrode film provided under the second semiconductor layer. A thickness of a carbon-containing region in which carbon-atoms are precipitated between the second semiconductor layer and the metallic electrode film is 10 nm or less.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: July 20, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Kenichi Iguchi, Haruo Nakazawa, Yusuke Wada
  • Publication number: 20210111248
    Abstract: A semiconductor device having a semiconductor substrate that includes a first-conductivity-type substrate and a first-conductivity-type epitaxial layer, and a plurality of trenches reaching a predetermined depth from a main surface of the semiconductor substrate to terminate in the first-conductivity-type epitaxial layer. The semiconductor substrate includes a hydrogen-donor introduced part, of which a concentration of a hydrogen donor is greatest at a depth position that is separate from bottoms of the trenches by a distance at least two times of the depth of the trenches. The impurity concentration of an impurity dopant of the first-conductivity-type substrate being lower than that of the first-conductivity-type epitaxial layer.
    Type: Application
    Filed: September 3, 2020
    Publication date: April 15, 2021
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Kosuke YOSHIDA, Haruo NAKAZAWA, Kenichi IGUCHI, Koh YOSHIKAWA, Motoyoshi KUBOUCHI
  • Publication number: 20210041409
    Abstract: An oxygen sensor element made of a ceramic sintered body detects oxygen concentration based on an electric current value measured when a voltage is applied. The ceramic sintered body has a composition formula LnBa2-xSrxCu3O7-? generated by substituting any element selected from group 2 elements in the periodic table, such as strontium (Sr), for a part of a composition formula LnBa2Cu3O7-? (Ln denotes rare earth element and ? is 0 to 1). Sr substitution quantity x should satisfy an inequality constraint 0<x?1.5. This allows provision of an oxygen sensor element that improves durability etc. without losing sensor characteristics.
    Type: Application
    Filed: January 30, 2019
    Publication date: February 11, 2021
    Inventors: Tomoichiro OKAMOTO, Kenichi IGUCHI, Ken TAKAHASHI, Tetsuro TANAKA, Chika ITO
  • Publication number: 20210018456
    Abstract: An oxygen sensor for detecting gas concentration based on either an electric current value or a resistance value measured when a voltage is applied to a sensor element includes gaps formed between electrodes arranged in an element main body and ridges where surfaces of an element touch each other. These gaps will be escaping parts for expansion and contraction of electrode material that accompany thermal expansion and contraction of a sensor main body, and concentration of thermal stress at edge parts of the element main body may thus be eliminated, thereby alleviating thermal stress on the oxygen sensor. This allows provision of a gas sensor that controls generation of cracks in the element and that is stably usable over a long period of time.
    Type: Application
    Filed: March 20, 2019
    Publication date: January 21, 2021
    Inventors: Chika ITO, Ken TAKAHASHI, Tetsuro TANAKA, Kenichi IGUCHI
  • Publication number: 20210010963
    Abstract: A sensor element has a cross-sectional area that increases either uniformly or gradually from a positive (+) electrode side toward a negative (?) electrode side, thereby leading a hot spot, which attempts to move to the negative electrode side, to a lower resistance side. A position that is at nearly equal distances from paired electrodes formed on either end of the sensor element is set as a hot spot generating position, so as to avoid damage to the electrodes due to heat emitted by the hot spot.
    Type: Application
    Filed: March 20, 2019
    Publication date: January 14, 2021
    Inventors: Tetsuro TANAKA, Kenichi IGUCHI, Ken TAKAHASHI, Chika ITO
  • Patent number: 10727060
    Abstract: A doping system includes a light source to emit an optical pulse; a light source controller connected to the light source, to control an energy density of the optical pulse; and a beam adjusting unit to irradiate the optical pulse to a surface of a doping-object made of silicon carbide on which an impurity-containing source-film containing impurity atoms is deposited. The light source controller irradiates a first optical pulse to the impurity-containing source-film so as to form a reaction-product layer in the doping-object, and irradiates a second optical pulse having an energy density higher than an energy density of the first optical pulse, so as to introduce the impurity atoms into the target through the reaction-product layer.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: July 28, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Kenichi Iguchi, Haruo Nakazawa
  • Patent number: 10658183
    Abstract: An impurity-doping apparatus is provided with: a supporting plate which supports a semiconductor substrate; a wall-like block disposed above the supporting plate floating away from the semiconductor substrate, the wall-like block implements a recess inside so as to establish a space for a solution region containing impurity elements, the solution region is localized on an upper surface of the semiconductor substrate, the upper surface being opposite to an bottom surface facing to the supporting plate; and a laser optical system, configured to irradiate a laser beam onto the upper surface of the semiconductor substrate, through the solution region surrounded by the wall-like block, wherein the impurity elements are doped into a part of the semiconductor substrate by irradiation of the laser beam.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: May 19, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Kenichi Iguchi, Haruo Nakazawa, Masaaki Ogino
  • Publication number: 20200066528
    Abstract: A semiconductor device is manufactured by implanting impurity ions in one surface of a semiconductor substrate made of silicon carbide; irradiating a region of the semiconductor substrate implanted with the impurity ions with laser light of a wavelength in the ultraviolet region; and forming, on a surface of a high-concentration impurity layer formed by irradiating with the laser light, an electrode made of metal in ohmic contact with the high-concentration impurity layer. When irradiating with the laser light, a first concentration peak of the impurity ions that exceeds a solubility limit concentration of the impurity ions in silicon carbide is formed in a surface region near the one surface of the semiconductor substrate within the high-concentration impurity layer.
    Type: Application
    Filed: August 1, 2019
    Publication date: February 27, 2020
    Applicant: Fuji Electric Co., Ltd.
    Inventors: Kenichi IGUCHI, Haruo NAKAZAWA
  • Patent number: 10559664
    Abstract: A method of manufacturing a semiconductor device includes assigning a plurality of chip regions on an epitaxial-growth layer of a semiconductor substrate where the epitaxial-growth layer is grown on a bulk layer and forming a plurality of device structures on the plurality of chip regions, respectively, thinning the semiconductor substrate from a bottom-surface side of the bulk layer, bonding a supporting-substrate on a bottom surface of the thinned semiconductor substrate, selectively removing the supporting-substrate so that the bottom surface of the semiconductor substrate is exposed, at locations corresponding to positions of each of main current paths in the plurality of device structures, respectively, dicing the semiconductor substrate together with the supporting-substrate along dicing lanes between the plurality of the chip regions so as to form a plurality of chips.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: February 11, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Kenichi Iguchi, Haruo Nakazawa
  • Publication number: 20190371893
    Abstract: A silicon carbide semiconductor device includes a first semiconductor layer of silicon carbide, a device structure provided on top of the first semiconductor layer, a second semiconductor layer of silicon carbide having a higher impurity concentration than the first semiconductor layer, provided under the first semiconductor layer, the second semiconductor layer implementing an ohmic-contact, and a metallic electrode film provided under the second semiconductor layer. A thickness of a carbon-containing region in which carbon-atoms are precipitated between the second semiconductor layer and the metallic electrode film is 10 nm or less.
    Type: Application
    Filed: March 22, 2019
    Publication date: December 5, 2019
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Kenichi IGUCHI, Haruo NAKAZAWA, Yusuke WADA