Patents by Inventor Kenichi Iguchi

Kenichi Iguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160315169
    Abstract: When p-type impurities are implanted into a SiC substrate using a laser, controlling the concentration is difficult. A p-type impurity region is formed by a laser in a region where the control of the concentration in the SiC substrate is not necessary almost at all. A SiC semiconductor device having withstanding high voltage is manufactured at a lower temperature process compared to ion implantation process. A method of manufacturing a silicon carbide semiconductor device includes forming, on one main surface of a first conductivity-type silicon carbide substrate, a first conductivity-type drift layer having a lower concentration than that of the silicon carbide substrate; forming, on a front surface side of the drift layer, a second conductivity-type electric field control region by a laser doping technology; forming a Schottky electrode in contact with the drift layer; and forming, on the other main surface of the silicon carbide substrate, a cathode electrode.
    Type: Application
    Filed: March 10, 2016
    Publication date: October 27, 2016
    Inventors: Koh YOSHIKAWA, Haruo NAKAZAWA, Kenichi IGUCHI, Yasukazu SEKI
  • Publication number: 20160284547
    Abstract: An impurity-doping apparatus is provided with: a supporting plate which supports a semiconductor substrate; a wall-like block disposed above the supporting plate floating away from the semiconductor substrate, the wall-like block implements a recess inside so as to establish a space for a solution region containing impurity elements, the solution region is localized on an upper surface of the semiconductor substrate, the upper surface being opposite to an bottom surface facing to the supporting plate; and a laser optical system, configured to irradiate a laser beam onto the upper surface of the semiconductor substrate, through the solution region surrounded by the wall-like block, wherein the impurity elements are doped into a part of the semiconductor substrate by irradiation of the laser beam.
    Type: Application
    Filed: June 6, 2016
    Publication date: September 29, 2016
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Kenichi IGUCHI, Haruo NAKAZAWA, Masaaki OGINO
  • Publication number: 20160247681
    Abstract: Impurity elements are doped at a high concentration exceeding a thermodynamic equilibrium concentration into a solid material having an extremely small diffusion coefficient of the impurity element. A method for doping impurities includes steps for depositing source film made of material containing impurity elements with a film thickness on a surface of a solid target object (semiconductor substrate) made from the solid material. The film thickness is determined in consideration of irradiation time per light pulse and the energy density of the light pulse. The method also includes a step for irradiating the source film by the light pulse with the irradiation time and the energy density so as to dope the impurity elements into the target object at a concentration exceeding a thermodynamic equilibrium concentration.
    Type: Application
    Filed: February 24, 2016
    Publication date: August 25, 2016
    Applicants: KYUSHU UNIVERSITY, NATIONAL UNIVERSITY CORPORATION, FUJI ELECTRIC CO., LTD.
    Inventors: Akihiro IKEDA, Hiroshi Ikenoue, Tanemasa Asano, Kenichi Iguchi, Haruo Nakazawa, Koh Yoshikawa, Yasukazu Seki
  • Publication number: 20160189968
    Abstract: A method of manufacturing a semiconductor device that reduces degradation of device properties includes forming an impurity region in a surface layer of a semiconductor substrate by ion injection; forming a transition metal layer in a surface of the impurity region; and exposing the semiconductor substrate with the transition metal layer formed thereon to a hydrogen plasma atmosphere formed by microwaves. The transition metal layer is heated and the heat is transferred from the transition metal layer to the impurity region to form an ohmic contact at the interface of the transition metal layer and the impurity region by reaction of the transition metal layer and the impurity region, and the impurity region is activated. When the substrate is a silicon carbide substrate, the ohmic contact is composed of a transition metal silicide and the impurity region, which is an ion injection layer, is activated.
    Type: Application
    Filed: March 9, 2016
    Publication date: June 30, 2016
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Haruo NAKAZAWA, Masaaki OGINO, Tsunehiro NAKAJIMA, Kenichi IGUCHI, Masaaki TACHIOKA
  • Publication number: 20160189969
    Abstract: A method of manufacturing a semiconductor device includes forming a device structure in a surface of a semiconductor substrate, forming, in a face of the semiconductor substrate, a transition metal layer that contacts the semiconductor substrate, and exposing the semiconductor substrate having the transition metal layer formed thereon to a hydrogen plasma atmosphere formed by microwaves to cause the transition metal layer to generate heat. During exposure of the semiconductor substrate to the hydrogen plasma atmosphere, a portion of the semiconductor substrate contacting the transition metal layer is heated by a transfer of the heat from the transition metal layer, and an ohmic contact is formed at an interface of the transition metal layer and the semiconductor substrate by reaction of the transition metal layer and the semiconductor substrate. When the semiconductor substrate is silicon carbide, the ohmic contact is composed of a silicide, such as a transition metal silicide.
    Type: Application
    Filed: March 9, 2016
    Publication date: June 30, 2016
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Kenichi IGUCHI, Haruo NAKAZAWA, Tsunehiro NAKAJIMA, Masaaki OGINO, Masaaki TACHIOKA
  • Publication number: 20160189982
    Abstract: Provided are a method of processing a semiconductor substrate and a method of manufacturing a semiconductor device that uses this method of processing. The method of processing the semiconductor substrate includes: a bonding step in which a supporting plate, which is composed primarily of a material that substantially transmits laser light of prescribed wavelength, and a principal surface of a semiconductor substrate, which is composed primarily of a material that substantially transmits the laser light of the prescribed wavelength, are arranged to face each other in a vacuum and then pressed together in the vacuum with an intermediate layer that includes an amorphous silicon layer interposed therebetween; and a separating step in which, after the laser light is radiated from a side of the supporting plate and the intermediate layer absorbs laser energy, the semiconductor substrate and the supporting plate are separated from each other.
    Type: Application
    Filed: March 8, 2016
    Publication date: June 30, 2016
    Applicant: Fuji Electric Co., Ltd.
    Inventor: Kenichi IGUCHI
  • Publication number: 20160189967
    Abstract: A method of manufacturing a semiconductor device includes providing a semiconductor substrate having a front surface and a back surface; forming a transition metal layer in a surface of the semiconductor substrate; and exposing the semiconductor substrate having the transition metal layer formed thereon to a hydrogen plasma atmosphere formed by microwaves, to cause the transition metal layer to generate heat, Thus, during the exposure of the semiconductor substrate, a portion of the semiconductor substrate contacting the transition metal layer is heated by a transfer of heat from the transition metal layer and, at an interface of the transition metal layer and the semiconductor substrate, an ohmic contact is formed by reaction of the transition metal layer and the semiconductor substrate, such as to form a transition metal silicide when the semiconductor substrate is silicon carbide. The ohmic contact provides a lower contact resistivity and device properties can be prevented from degrading.
    Type: Application
    Filed: March 9, 2016
    Publication date: June 30, 2016
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Haruo NAKAZAWA, Masaaki OGINO, Tsunehiro NAKAJIMA, Kenichi IGUCHI, Masaaki TACHIOKA, Kiyokazu NAKAGAWA
  • Patent number: 9355858
    Abstract: Some embodiments of the present invention relate to a semiconductor device and a method of manufacturing a semiconductor device capable of preventing the deterioration of electrical characteristics. A p-type collector region is provided on a surface layer of a backside surface of an n-type drift region. A p+-type isolation layer for obtaining reverse blocking capability is provided at the end of an element. In addition, a concave portion is provided so as to extend from the backside surface of the n-type drift region to the p+-type isolation layer. A p-type region is provided and is electrically connected to the p+-type isolation layer. The p+-type isolation layer is provided so as to include a cleavage plane having the boundary between the bottom and the side wall of the concave portion as one side.
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: May 31, 2016
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Hiroki Wakimoto, Kenichi Iguchi, Koh Yoshikawa, Tsunehiro Nakajima, Shunsuke Tanaka, Masaaki Ogino
  • Publication number: 20160005606
    Abstract: A method for introducing impurity into a semiconductor substrate includes bringing a solution containing a compound of an impurity element into contact with a primary surface of a semiconductor substrate; and irradiating the primary surface of the semiconductor substrate with a laser beam through the solution to raise a temperature of the primary surface of the semiconductor substrate at a position irradiated by the laser beam so as to dope the impurity element into the semiconductor substrate. The laser beam irradiation is performed such that the raised temperature does not return to room temperature until a prescribed dose of the impurity element is caused to be doped into the semiconductor substrate.
    Type: Application
    Filed: June 3, 2015
    Publication date: January 7, 2016
    Applicant: Fuji Electric Co., Ltd.
    Inventors: Haruo NAKAZAWA, Kenichi IGUCHI, Masaaki OGINO
  • Publication number: 20150214053
    Abstract: A first nickel film is deposited inside a contact hole of an interlayer dielectric formed on an n+-type SiC substrate. Irradiation with a first laser is carried out, forming an Ohmic contact with a silicon carbide semiconductor. A second nickel film and a front surface electrode film are deposited on the first nickel film, forming a source electrode. The back surface of the n+-type SiC substrate is ground, and a third nickel film is formed on the ground back surface of the n+-type SiC substrate. Irradiation with a second laser is carried out, forming an Ohmic contact with the silicon carbide semiconductor. A fourth nickel film and a back surface electrode film are deposited on the third nickel film, forming a drain electrode. By so doing, it is possible to prevent electrical characteristic deterioration of a semiconductor device, and to prevent warping and cracking of a wafer.
    Type: Application
    Filed: April 9, 2015
    Publication date: July 30, 2015
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Haruo NAKAZAWA, Masaaki TACHIOKA, Naoto FUJISHIMA, Masaaki OGINO, Tsunehiro NAKAJIMA, Kenichi IGUCHI
  • Publication number: 20150001688
    Abstract: A groove for air ventilation is formed in a rib with a substantially rectangular ring shape which is provided so as to surround a concave portion provided in a rear surface of a semiconductor chip. The groove is provided in each side or at each corner of the rib so as to traverse the rib from the inner circumference to the outer circumference of the rib. The depth of the groove is equal to or less than the depth of the concave portion provided in the rear surface of the chip. In this way, it is possible to reliably solder a semiconductor device, in which the concave portion is provided in the rear surface of the semiconductor chip and the rib is provided in the outer circumference of the concave portion, to a base substrate, without generating a void in a drain electrode provided in the concave portion.
    Type: Application
    Filed: September 12, 2014
    Publication date: January 1, 2015
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Kenichi IGUCHI
  • Publication number: 20140094020
    Abstract: Some embodiments of the present invention relate to a semiconductor device and a method of manufacturing a semiconductor device capable of preventing the deterioration of electrical characteristics. A p-type collector region is provided on a surface layer of a backside surface of an n-type drift region. A p+-type isolation layer for obtaining reverse blocking capability is provided at the end of an element. In addition, a concave portion is provided so as to extend from the backside surface of the n-type drift region to the p+-type isolation layer. A p-type region is provided and is electrically connected to the p+-type isolation layer. The p+-type isolation layer is provided so as to include a cleavage plane having the boundary between the bottom and the side wall of the concave portion as one side.
    Type: Application
    Filed: December 4, 2013
    Publication date: April 3, 2014
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Hiroki WAKIMOTO, Kenichi Iguchi, Koh Yoshikawa, Tsunehiro Nakajima, Shunsuke Tanaka, Masaaki Ogino
  • Patent number: 8604584
    Abstract: Some embodiments of the present invention relate to a semiconductor device and a method of manufacturing a semiconductor device capable of preventing the deterioration of electrical characteristics. A p-type collector region is provided on a surface layer of a backside surface of an n-type drift region. A p+-type isolation layer for obtaining reverse blocking capability is provided at the end of an element. In addition, a concave portion is provided so as to extend from the backside surface of the n-type drift region to the p+-type isolation layer. A p-type region is provided and is electrically connected to the p+-type isolation layer. The p+-type isolation layer is provided so as to include a cleavage plane having the boundary between the bottom and the side wall of the concave portion as one side.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: December 10, 2013
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Hiroki Wakimoto, Kenichi Iguchi, Koh Yoshikawa, Tsunehiro Nakajima, Shunsuke Tanaka, Masaaki Ogino
  • Patent number: 8278682
    Abstract: A semiconductor device that has a reduced size and exhibits a superior blocking voltage capability. A semiconductor device includes an edge termination structure between an active region and an isolation region, the edge termination structure being composed of an edge termination structure for a forward bias section and an edge termination structure for a reverse bias section. A plurality of field limiting rings (FLRs) and a plurality of field plates (FPs) are provided in the edge termination structure for the forward bias section and the edge termination structure for the reverse bias section. A first forward FP that is the nearest of the plurality of FPs to the edge termination structure for the reverse bias section is formed to extend towards the isolation region side. A first reverse FP that is the nearest of the plurality of FPs to the edge termination structure for the forward bias section is formed to extend towards the active region side.
    Type: Grant
    Filed: May 26, 2011
    Date of Patent: October 2, 2012
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Koh Yoshikawa, Kenichi Iguchi
  • Publication number: 20110291241
    Abstract: A semiconductor device that has a reduced size and exhibits a superior blocking voltage capability. A semiconductor device includes an edge termination structure between an active region and an isolation region, the edge termination structure being composed of an edge termination structure for a forward bias section and an edge termination structure for a reverse bias section. A plurality of field limiting rings (FLRs) and a plurality of field plates (FPs) are provided in the edge termination structure for the forward bias section and the edge termination structure for the reverse bias section. A first forward FP that is the nearest of the plurality of FPs to the edge termination structure for the reverse bias section is formed to extend towards the isolation region side. A first reverse FP that is the nearest of the plurality of FPs to the edge termination structure for the forward bias section is formed to extend towards the active region side.
    Type: Application
    Filed: May 26, 2011
    Publication date: December 1, 2011
    Applicant: Fuji Electric Co., Ltd.
    Inventors: Koh YOSHIKAWA, Kenichi Iguchi
  • Publication number: 20110215435
    Abstract: Some embodiments of the present invention relate to a semiconductor device and a method of manufacturing a semiconductor device capable of preventing the deterioration of electrical characteristics. A p-type collector region is provided on a surface layer of a backside surface of an n-type drift region. A p+-type isolation layer for obtaining reverse blocking capability is provided at the end of an element. In addition, a concave portion is provided so as to extend from the backside surface of the n-type drift region to the p+-type isolation layer. A p-type region is provided and is electrically connected to the p+-type isolation layer. The p+-type isolation layer is provided so as to include a cleavage plane having the boundary between the bottom and the side wall of the concave portion as one side.
    Type: Application
    Filed: March 1, 2011
    Publication date: September 8, 2011
    Applicant: FUJI ELECTRIC HOLDINGS CO., LTD.
    Inventors: Hiroki WAKIMOTO, Kenichi Iguchi, Koh Yoshikawa, Tsunehiro Nakajima, Shunsuke Tanaka, Masaaki Ogino
  • Patent number: 5846593
    Abstract: A food material containing sesaminol triglucoside by at least 3.0 mm per 1 g of its dry component is obtained by subjecting dehulled sesame seeds to an extraction process at an extraction temperature below 120.degree. C. with aliphatic hydrocarbon as extraction solvent to obtain a solution, removing the solution to obtain a solid which contains the extraction solvent by less than 10 weight %, adding water to this solid to obtain a water-containing object, and removing the residual solvent from this water-containing object by distillation at 20-120.degree. C. The food material thus obtained is substantially free of the solvent used in the extraction process and has improved color, flavor and taste.
    Type: Grant
    Filed: October 1, 1996
    Date of Patent: December 8, 1998
    Assignees: Takemoto Yushi Kabushiki Kaisha, Corunum Corporation
    Inventors: Masato Sugiura, Masanori Inayoshi, Shigeo Sakurai, Kenichi Iguchi, Toshihiko Osawa