Abstract: A storage control apparatus comprises a vertical logic board; and a cooling mechanism for cooling the logic board. This cooling mechanism is constituted such that air taken in from the front of the storage control apparatus travels to the rear side of the storage control apparatus and then rises up, this risen air rises further while cooling the vertical logic board, and the risen air is discharged from the rear of the storage control apparatus.

Abstract: First and second voltage buffers are added to an amplifying circuit including input and output amplifying stages in which a P-MOS transistor and an N-MOS transistor operate as a push-pull circuit. An input of the first voltage buffer is connected to an output of the amplifying circuit, and an output of the first voltage buffer is connected via a first phase compensating capacitor to a gate electrode of the P-MOS transistor, and is connected via a second phase compensating capacitor to a gate electrode of the N-MOS transistor. An input of the second voltage buffer is connected to the output of the amplifying circuit, and an output of the second voltage buffer is connected via a third phase compensating capacitor to the gate electrode of the P-MOS transistor, and is connected via a fourth phase compensating capacitor to the gate electrode of the N-MOS transistor.

Abstract: Two or more media drives that cannot be detached by the user are pre-installed in an enclosure. An expansion slot member having the smaller number of expansion drive slots than the number of media drives that can be pre-installed are provided. The media drives that are installed via the expansion drive slots are installed so as to be detached by the user.

Abstract: In a storage device accommodating a plurality of memory devices in a general-purpose chassis provided from both surface sides thereof, a cooling device is provided on the front of the memory devices. This cooling device is allowed to freely move to leave available the area in front of the memory devices, thereby enabling maintenance and replacement of the memory devices from the both surface sides of the chassis. With such a storage device of a type using a general-purpose chassis, and inserting therein a plurality of memory devices from the both surface sides thereof, even if a cooling device is located on the front of the chassis, the memory devices can be subjected to maintenance and replacement.

Abstract: A cleaning and drying-preventing method including: positioning a nozzle in a container such that a funnel-like inner circumferential surface of the container is located around a periphery of a distal end of the nozzle; sucking a liquid in the nozzle to retract a level of the liquid to a side of a supply passage; supplying a solvent into the container to form a swirl flow of the solvent turning around the distal end of the nozzle, and cleaning the nozzle by the swirl flow; supplying a solvent into the container to form a liquid pool of the solvent; and further retracting the level of the liquid in the nozzle to the side of the supply passage. A liquid layer, an air layer, and a solvent layer are formed in the nozzle in this order from the side of the supply passage, to prevent drying of the liquid in the nozzle.

Abstract: In a method of manufacturing a TFT substrate in accordance with an exemplary aspect of the present invention, an intrinsic semiconductor film, an impurity semiconductor film, and a conductive film for source lines are formed in succession, and a resist having a thin-film portion and a thick-film portions is formed on the conductive film for source lines. Then, etching is performed by using the resist as a mask, and after that, a part of the conductive film for source lines is exposed by removing the thin-film portion of the resist. Next, the exposed conductive film for source lines is etched by using the thick-film portions of the resist a mask, so that the impurity semiconductor film is exposed. Then, by etching the exposed impurity semiconductor film, a back channel region of a TFT 108 is formed. Further, a dummy back channel region 18a, which is irrelevant to the operation of the finished product, is also formed in a portion other than the TFT 108 region.

Abstract: A storage apparatus has a cabinet stored with an array of memory mediums, a power supply unit housed at the bottom of the cabinet, a fan provided immediately under the top surface of the cabinet and immediately above the memory mediums, and a partition member provided insides the cabinet and configured to partition a first cooling path from mixing with a second cooling path inside the cabinet. The first cooling path of first external air for cooling the memory mediums starts at an inlet on a side surface of the cabinet and ends at the top surface of the cabinet to discharge the first external air out of the cabinet form the top surface. The second cooling path of second external air for cooling the power supply unit ends at the top surface of the cabinet and discharges the second external air out of the cabinet at the top surface.

Abstract: A fiber channel switch (hereinafter, FC-SW) connected to a plurality of communications devices is provided with a buffer for temporarily storing data received from servers via a first communications port, a trace data storage memory for storing trace data, and a microprocessor (MP) for sending data accumulated in the buffer to a storage control system. The MP stores the information about the data about the received data into the trace data storage memory as trace data, issues a write command to the storage control system if it is detected that trace data sending condition is satisfied, and reads out the trace data stored in the trace data storage memory and sends it to the storage control system.

Abstract: There is provided a liquid crystal display device having a pixel electrode including a transmissive pixel electrode and a reflective pixel electrode. The liquid crystal display device includes a TFT array substrate, an opposing substrate, a sealing material that bonds the both substrates, an organic film formed on the TFT array substrate and having a thick film portion provided below the pixel electrode and a thin film portion provided outside the thick film portion, a columnar spacer formed on the opposing substrate and holding substrate gap between the both substrates, and a gap retaining pad formed in a region outside the display region and inside the sealing material to adjust the substrate gap outside the display region according to the substrate gap on the pixel electrode. The columnar spacer holds the substrate gap between the both substrates over the gap retaining pad and over the pixel electrode.

Abstract: A security system capable of safely performing home device state check or operation. In the security system, a mobile telephone module of a mobile telephone transmits M-series data (call signal) to home device modules provided in home devices such as a door lock and home electric appliances. In response to this call, the home device module returns a home device ID to the mobile telephone module. The mobile telephone module authenticates the home device module according to the home device ID and after authentication, returns a mobile telephone ID and state check or operation command to the home device module. The home device module authenticates the mobile telephone module according to the mobile telephone ID. When this mutual authentication is complete, the home device module performs the home device state check or operation according to the command and returns the result to the mobile telephone module.

Abstract: The present invention provides an authentication card inserted to a portable device. The authentication card 1 is inserted (installed) in a cellular phone 30 and the authentication card 2 is inserted (installed) in a PDA 40. The authentication card 1 comprises an identification code transmission unit 10 and the authentication card 2 comprises a usage restriction cancellation unit 20. The units 10 and 20 exchange the identification code by means of wireless signal and mutually authenticate the identification code mutually. In case that the PDA 40 is moved more than the predetermined distance from the cellular phone 30 and the reception level of signal from the unit 10 received by the unit 20 is smaller than the predetermined value, or the unit 20 can not authenticate the identification code of the unit 10, the unit 20 stops transmission of the usage restriction cancellation signal to the PDA 40.

Abstract: First and second voltage buffers are added to an amplifying circuit including input and output amplifying stages in which a P-MOS transistor and an N-MOS transistor operate as a push-pull circuit. An input of the first voltage buffer is connected to an output of the amplifying circuit, and an output of the first voltage buffer is connected via a first phase compensating capacitor to a gate electrode of the P-MOS transistor, and is connected via a second phase compensating capacitor to a gate electrode of the N-MOS transistor. An input of the second voltage buffer is connected to the output of the amplifying circuit, and an output of the second voltage buffer is connected via a third phase compensating capacitor to the gate electrode of the P-MOS transistor, and is connected via a fourth phase compensating capacitor to the gate electrode of the N-MOS transistor.

Abstract: A semiconductor storage apparatus includes a plurality of data cells arranged in rows and columns. The data cells have MOS transistors having different types of operating characteristics to store data according to the types of the MOS transistors. Bit lines extend to the respective columns of data cells. The stored data is read out according to a cell current arising in the bit lines. One among the bit liens is taken as a reference bit line, and the bit line cell currents in the remaining bit lines are adjusted according to the value of the cell current arising in the reference bit line.

Abstract: The present invention provides an LCD panel driving circuit capable of suppressing unevenness in gradation even by a centralized amplifier system. In the LCD panel driving circuit, a source driver includes source terminals. The source terminals are sectioned into three source terminal groups. Decoder groups, bus wirings and amplifier groups are respectively assigned to the three source terminal groups by ones, and the LCD panel is driven by a centralized amplifier system every section.

Abstract: The LCD panel driving circuit includes a plurality of supply signal lines and feedback signal lines provided for respective differential driving amplifiers. Each driving amplifier has two input terminals, and generates a gradation signal in accordance with a write potential supplied to one of the two input terminals. The supply signal lines supply to the gradation signal lines the gradation signals, that are produced by the differential driving amplifiers, via first connection points. The feedback signal lines are connected to the gradation signal lines at second connection points. Each feedback signal line sends a potential at its second connection point to the other differential input terminal of the associated differential driving amplifier.

Abstract: Two or more media drives that cannot be detached by the user are pre-installed in an enclosure. An expansion slot member having the smaller number of expansion drive slots than the number of media drives that can be pre-installed are provided. The media drives that are installed via the expansion drive slots are installed so as to be detached by the user.

Abstract: A first section, a second section, and a third section are provided. A plurality of NAS head substrates are mounted in the first section, arranged along the height direction, and each oriented horizontally. A plurality of logical substrates are mounted in the second section, arranged along the width direction. And power supplies are mounted in the third section. First through third fans are provided respectively corresponding to the first through the third sections, and the flow conduit for the air blown by each of the fans is independent from the flow conduits for the air blown by other fans.

Abstract: In a driving circuit of a display device, a period for writing to pixels is shortened while an increase in size of an integrated circuit is avoided. In a first period of the writing period, the pixel is charged up with a gradation potential of a particular node in a node group that includes a node which is at an objective gradation potential. In the first period, a plurality of lines corresponding to the number of nodes included in the node group are connected in parallel between the particular node and the pixel. In a second period of the data-writing period, this parallel connection is cancelled and only the node corresponding to the objective gradation potential is connected to the pixel.

Abstract: An object of the present invention is to efficiently perform load balancing between Fibre Channel switches and storage apparatuses, avoiding communication congestion, and maintaining high system performance.