Patents by Inventor Kenichi Otsuka

Kenichi Otsuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110210392
    Abstract: A structure of a power semiconductor device, in which a P-well region having a large area and a gate electrode are opposed to each other through a field oxide film having a larger thickness than that of a gate insulating film such that the P-well region having a large area and the gate electrode are not opposed to each other through the gate insulating film, or the gate electrode is not provided above the gate insulating film that includes the P-well region having a large area therebelow.
    Type: Application
    Filed: June 30, 2009
    Publication date: September 1, 2011
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shuhei Nakata, Shoyu Watanabe, Kenichi Otsuka, Naruhisa Miura
  • Publication number: 20100219417
    Abstract: A semiconductor device and a method of manufacturing the same, to appropriately determine an impurity concentration distribution of a field relieving region and reduce an ON-resistance. The semiconductor device includes a substrate, a first drift layer, a second drift layer, a first well region, a second well region, a current control region, and a field relieving region. The first well region is disposed continuously from an end portion adjacent to the vicinity of outer peripheral portion of the second drift layer to a portion of the first drift layer below the vicinity of outer peripheral portion. The field relieving region is so disposed in the first drift layer as to be adjacent to the first well region.
    Type: Application
    Filed: November 17, 2006
    Publication date: September 2, 2010
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Naruhisa Miura, Keiko Fujihira, Kenichi Otsuka, Masayuki Imaizumi
  • Patent number: 7781301
    Abstract: A method of fabricating a semiconductor device according to one embodiment includes: forming an interlayer sacrificial film and an insulating film located thereon above a semiconductor substrate having a semiconductor element, the interlayer sacrificial film having a wiring provided therein; etching the insulating film, or, etching the insulating film and the interlayer sacrificial film to form a trench reaching the interlayer sacrificial film; forming a gas permeable film in the trench; gasifying and removing the interlayer sacrificial film through the trench and the gas permeable film; and forming a sealing film on the gas permeable film for sealing the vicinity of an opening of the trench after removing the interlayer sacrificial film.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: August 24, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kei Watanabe, Akifumi Gawase, Kenichi Otsuka
  • Publication number: 20100055893
    Abstract: A method of fabricating a semiconductor device according to one embodiment includes: forming an interlayer sacrificial film and an insulating film located thereon above a semiconductor substrate having a semiconductor element, the interlayer sacrificial film having a wiring provided therein; etching the insulating film, or, etching the insulating film and the interlayer sacrificial film to form a trench reaching the interlayer sacrificial film; forming a gas permeable film in the trench; gasifying and removing the interlayer sacrificial film through the trench and the gas permeable film; and forming a sealing film on the gas permeable film for sealing the vicinity of an opening of the trench after removing the interlayer sacrificial film.
    Type: Application
    Filed: August 6, 2009
    Publication date: March 4, 2010
    Inventors: Kei WATANABE, Akifumi Gawase, Kenichi Otsuka
  • Patent number: 7520182
    Abstract: A torque meter enables highly accurate measurement of a torque by detecting only the torque, without being affected by various loads. The torque meter includes an elastic member placed in a power transmission channel and being deformed upon application with a torque being measured, and a torque detecting arrangement for detecting the torque based on the deformation of the elastic member. The torque member receives a torque being applied to the elastic member, and the load member is provided separately from the torque member, for supporting the load of the elastic member.
    Type: Grant
    Filed: February 4, 2004
    Date of Patent: April 21, 2009
    Assignee: Ono Sokki Co., Ltd
    Inventors: Akio Takamura, Kenichi Otsuka, Tooru Miyata
  • Publication number: 20070180931
    Abstract: A torque meter enables highly accurate measurement of a torque by detecting only the torque, without being affected by various loads. The torque meter includes an elastic member placed in a power transmission channel and being deformed upon application with a torque being measured, and a means for detecting the torque based on the deformation of the elastic member. The torque member receives a torque being applied to the elastic member, and the load member is provided separately from the torque member, for supporting the load of the elastic member.
    Type: Application
    Filed: February 4, 2004
    Publication date: August 9, 2007
    Applicant: ONO SOKKI CO., LTD.
    Inventors: Akio Takamura, Kenichi Otsuka, Tooru Miyata
  • Patent number: 7017507
    Abstract: A watercraft can include seats having hip supports for the riders including an operator and/or passengers thereof. Additionally, the watercraft can include a handlebar cover that is configured to prevent water from entering a steering mechanism. For example, the handlebar cover can include a lower portion and an upper portion extending downwardly over the lower portion.
    Type: Grant
    Filed: July 29, 2004
    Date of Patent: March 28, 2006
    Assignee: Yamaha Marine Kabushiki Kaisha
    Inventors: Toshiyuki Hattori, Kenichi Otsuka
  • Publication number: 20050235894
    Abstract: A watercraft can include seats having hip supports for the riders including an operator and/or passengers thereof. Additionally, the watercraft can include a handlebar cover that is configured to prevent water from entering a steering mechanism. For example, the handlebar cover can include a lower portion and an upper portion extending downwardly over the lower portion.
    Type: Application
    Filed: July 29, 2004
    Publication date: October 27, 2005
    Inventors: Toshiyuki Hattori, Kenichi Otsuka
  • Patent number: 6861294
    Abstract: A semiconductor plastic package, more particularly a preferred package structure and method for making a BGA package. A resin sealed BGA package where a supporting frame which fixedly supports semiconductor parts; i.e., an IC chip, a circuit board, or a circuit film, is sealed with resin, using a mold which is composed of an upper mold half and a lower mold half with the lower mold half having a plurality of projections, one at a position corresponding to each of the external terminals. The mold has a divisional structure which has an air vent between the divisional elements thereof.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: March 1, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Shigeharu Tsunoda, Junichi Saeki, Isamu Yoshida, Kazuya Ooji, Michiharu Honda, Makoto Kitano, Nae Yoneda, Shuji Eguchi, Kunihiko Nishi, Ichiro Anjoh, Kenichi Otsuka
  • Publication number: 20040063272
    Abstract: A semiconductor plastic package, more particularly a preferred package structure and method for making a BGA package. A resin sealed BGA package where a supporting frame which fixedly supports semiconductor parts; i.e., an IC chip, a circuit board, or a circuit film, is sealed with resin, using a mold which is composed of an upper mold half and a lower mold half with the lower mold half having a plurality of projections, one at a position corresponding to each of the external terminals. The mold has a divisional structure which has an air vent between the divisional elements thereof.
    Type: Application
    Filed: September 30, 2003
    Publication date: April 1, 2004
    Applicant: HITACHI, LTD.
    Inventors: Shigeharu Tsunoda, Junichi Saeki, Isamu Yoshida, Kazuya Ooji, Michiharu Honda, Makoto Kitano, Nae Yoneda, Shuji Eguchi, Kunihiko Nishi, Ichiro Anjoh, Kenichi Otsuka
  • Patent number: 6686226
    Abstract: A semiconductor plastic package, more particularly a preferred package structure and method for making a BGA package. A resin sealed BGA package where a supporting frame which fixedly supports semiconductor parts; i.e., an IC chip, a circuit board, or a circuit film, is sealed with resin, using a mold, which is composed of an upper mold half and a lower mold half with the lower mold half having a plurality of projections, one at a position corresponding to each of the external terminals. The mold has a divisional structure which has an air vent between the divisional elements thereof.
    Type: Grant
    Filed: May 2, 2000
    Date of Patent: February 3, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Shigeharu Tsunoda, Junichi Saeki, Isamu Yoshida, Kazuya Ooji, Michiharu Honda, Makoto Kitano, Nae Yoneda, Shuji Eguchi, Kunihiko Nishi, Ichiro Anjoh, Kenichi Otsuka
  • Patent number: 6553928
    Abstract: A small watercraft includes expanded storage capacity so as to accommodate more of the type of articles that rider's typically what to carry on the watercraft. Such articles include, for example, towels, water skis, tow ropes, etc. At least one of the storage compartments on the watercraft is formed by an opening on an upper deck section. A container is affixed to the deck below the opening and has an upper end defined by a flange that extends from walls of the container. The flange is attached to an interior wall of the upper deck section so that the container and the corresponding upper deck section form a storage compartment. The upper end of the container, however, has a larger area than the opening in the deck so as to maximize the storage space within the compartment without weakening the deck and minimizing the area through which water can enter the hull.
    Type: Grant
    Filed: May 23, 2001
    Date of Patent: April 29, 2003
    Assignee: Yamaha Hatsudoki Kabushiki Kaisha
    Inventors: Hisato Yamada, Kenichi Otsuka
  • Publication number: 20020059892
    Abstract: A small watercraft includes expanded storage capacity so as to accommodate more of the type of articles that rider's typically what to carry on the watercraft. Such articles include, for example, towels, water skis, tow ropes, etc. At least one of the storage compartments on the watercraft is formed by an opening on an upper deck section. A container is affixed to the deck below the opening and has an upper end defined by a flange that extends from walls of the container. The flange is attached to an interior wall of the upper deck section so that the container and the corresponding upper deck section form a storage compartment. The upper end of the container, however, has a larger area than the opening in the deck so as to maximize the storage space within the compartment without weakening the deck and minimizing the area through which water can enter the hull.
    Type: Application
    Filed: May 23, 2001
    Publication date: May 23, 2002
    Inventors: Hisato Yamada, Kenichi Otsuka
  • Patent number: 6276290
    Abstract: A small watercraft includes expanded storage capacity so as to accommodate more of the type of articles that rider's typically what to carry on the watercraft. Such articles include, for example, towels, water skis, tow ropes, etc. One of the storage compartments on the watercraft may be formed by an opening on an upper deck section. A container is affixed to the deck below the opening and has an upper end defined by a flange that extends from walls of the container. The flange is attached to an interior wall of the upper deck section so that the container and the corresponding upper deck section form a storage compartment. The upper end opening of the container, however, has a larger area than the opening in the deck so as to maximize the storage space within the compartment without weakening the deck, and at the same time to minimize the area through which water can enter the hull.
    Type: Grant
    Filed: March 23, 1998
    Date of Patent: August 21, 2001
    Assignee: Yamaha Hatsudoki Kabushiki
    Inventors: Hisato Yamada, Kenichi Otsuka
  • Publication number: 20010000052
    Abstract: A small watercraft includes expanded storage capacity so as to accommodate more of the type of articles that rider's typically what to carry on the watercraft. Such articles include, for example, towels, water skis, tow ropes, etc. At least one of the storage compartments on the watercraft is formed by an opening on an upper deck section. A container is affixed to the deck below the opening and has an upper end defined by a flange that extends from walls of the container. The flange is attached to an interior wall of the upper deck section so that the container and the corresponding upper deck section form a storage compartment. The upper end of the container, however, has a larger area than the opening in the deck so as to maximize the storage space within the compartment without weakening the deck and minimizing the area through which water can enter the hull.
    Type: Application
    Filed: November 30, 2000
    Publication date: March 22, 2001
    Inventors: Hisato Yamada, Kenichi Otsuka
  • Patent number: 6180513
    Abstract: Disclosed are an apparatus and a method for manufacturing a semiconductor device. A Si wafer set within an L/UL chamber is transferred under the state of a high vacuum through a transfer chamber into a Ti chamber. The wafer is heated to at least 300° C. within the Ti chamber by a heating mechanism arranged within the Ti chamber. Then, a TiSix film is formed at a bottom portion of a contact hole by a plasma CVD method using an Ar gas supplied through a gas line as a carrier gas and a TiCl4 gas supplied through another gas line as a source gas, Ti in the source gas being self-aligned with Si in the wafer. The wafer having the TiSix film formed therein is transferred through the transfer chamber into a W chamber without being exposed to the air atmosphere. Within the W chamber, a W film is consecutively deposited by a selective CVD method on the TiSix film.
    Type: Grant
    Filed: August 12, 1997
    Date of Patent: January 30, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mari Otsuka, Kenichi Otsuka
  • Patent number: 6114192
    Abstract: A semiconductor plastic package, more particularly a preferred package structure and method for making a BGA package. A resin sealed BGA package where a supporting frame which fixedly supports semiconductor parts; i.e., an IC chip, a circuit board, or a circuit film, is sealed with resin, using a mold which is composed of an upper mold half and a lower mold half with the lower mold half having a plurality of projections, one at a position corresponding to each of the external terminals. The mold has a divisional structure which has an air vent between the divisional elements thereof.
    Type: Grant
    Filed: July 14, 1998
    Date of Patent: September 5, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Shigeharu Tsunoda, Junichi Saeki, Isamu Yoshida, Kazuya Ooji, Michiharu Honda, Makoto Kitano, Nae Yoneda, Shuji Eguchi, Kunihiko Nishi, Ichiro Anjoh, Kenichi Otsuka
  • Patent number: 5990007
    Abstract: This invention provides a method of manufacturing a semiconductor device, including the steps of forming an insulating film and a first metal film on one major surface of a semiconductor substrate, each of the insulating film and the first metal film having a partially exposed surface, and selectively forming a second metal film on the exposed surface of the first metal film, wherein formation of the second metal film is performed in an atmosphere containing a gasified silicon compound obtained upon gasifying a liquid silicon compound containing at least one element selected from the group consisting of carbon, hydrogen, oxygen, chlorine, and fluorine, or its reaction product, whereby the exposed surface of the insulating film is chemically modified with the silicon compound or its reaction product.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: November 23, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akihiro Kajita, Katsuhiko Oya, Johta Fukuhara, Kenichi Otsuka, Hitoshi Itoh
  • Patent number: 5914531
    Abstract: A semiconductor plastic package, more particularly a preferred package structure and method for making a BGA package. A resin sealed BGA package where a supporting frame which fixedly supports semiconductor parts; i.e., an IC chip, a circuit board, or a circuit film, is sealed with resin, using a mold which is composed of an upper mold half and a lower mold half with the lower mold half having a plurality of projections, one at a position corresponding to each of the external terminals. The mold has a divisional structure which has an air vent between the divisional elements thereof.
    Type: Grant
    Filed: February 25, 1997
    Date of Patent: June 22, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Shigeharu Tsunoda, Junichi Saeki, Isamu Yoshida, Kazuya Ooji, Michiharu Honda, Makoto Kitano, Nae Yoneda, Shuji Eguchi, Kunihiko Nishi, Ichiro Anjoh, Kenichi Otsuka
  • Patent number: 5834367
    Abstract: In a method of manufacturing a semiconductor device having a multilayer wiring structure, it has at least two underlying layers having different etching conditions. Firstly, the native oxide film formed on one of the underlying layers, or a barrier metal layer, is etched out under etching conditions suitable for the barrier metal layer. Then, the surface of the barrier metal layer is capped with a plugging material having etching conditions similar to or substantially the same as those of the other one of the underlying layers, or a lower wiring layer. Subsequently, the native oxide film and the etching by-product formed on the lower wiring layer are etched out under etching conditions suitable for the lower wiring layer. Thereafter, contact holes for the two underlying layers are buried with a conductive substance to establish electric connection with their respective upper conductive layers.
    Type: Grant
    Filed: April 12, 1996
    Date of Patent: November 10, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mari Otsuka, Kenichi Otsuka