Abstract: A solid-state imaging device comprises a pixel array; a reference signal generation unit operable to generate a reference signal that changes monotonically for a predetermined period in a horizontal period; a comparator operable to compare the level of a pixel signal with the level of a reference signal; a counter operable to count input clock pulses; a memory operable to store the number of counts counted by the counter as a digital value; and a timing control unit operable to generate a clock that is to be input into the counter, and change frequency of the clock that is to be input into the counter based on external input data.

Abstract: A solid-state imaging device comprises a pixel array; a reference signal generation unit operable to generate a reference signal that changes monotonically for a predetermined period in a horizontal period; a comparator operable to compare the level of a pixel signal with the level of a reference signal; a counter operable to count input clock pulses; a memory operable to store the number of counts counted by the counter as a digital value; and a timing control unit operable to generate a clock that is to be input into the counter, and change frequency of the clock that is to be input into the counter based on external input data.

Abstract: The solid-state imaging device according to the present invention includes: pixel units arranged two-dimensionally in rows and columns; signal holding units each holding an analog signal outputted from one of the pixel units in a corresponding one of the columns; and column AD circuits each converting, into a digital signal, the analog signal held by a corresponding one of said signal holding units. The signal holding units and the column AD circuits are respectively provided for the columns of the pixel units. Each of the signal holding units includes: a switching element connected to a column signal line through which the analog signal outputted from the one of the pixel units is transmitted; and a capacitor element holding the analog signal and being connected to the column signal line through the switching element.

Abstract: In a solid state imaging device to be included in an imaging device such as a digital camera, a ramp run-up AD conversion circuit for AD converting a pixel signal is provided corresponding to one or a plurality of pixel columns. A column counter provided in each ramp run-up AD conversion circuit holds an upper bit, and a clock signal is supplied to one or plural latches for holding a lower bit. Thus, fast and accurate AD conversion can be realized while suppressing increase of clock frequency.

Abstract: In a solid state imaging device to be included in an imaging device such as a digital camera, a ramp run-up AD conversion circuit for AD converting a pixel signal is provided corresponding to one or a plurality of pixel columns. A column counter provided in each ramp run-up AD conversion circuit holds an upper bit, and a clock signal is supplied to one or plural latches for holding a lower bit. Thus, fast and accurate AD conversion can be realized while suppressing increase of clock frequency.

Abstract: It is an object of the present invention to provide a solid-state imaging device capable of operating at high-speed, and suppressing the deterioration of image quality caused by coupling. A solid-state imaging device according to the present invention includes: pixels arranged in rows and columns; color filters each of which is arranged on a light incidence plane of a corresponding one of the pixels, each of the color filters being one of at least two colors; and column signal lines provided for each of the columns of the pixels, and each of which transmits the signals from the pixels in a column direction, in which one of the color filters is arranged on one of the pixels connected to the column signal line, and is of a same color as another one of the color filters arranged on another one of the pixels connected to the column signal line.

Abstract: It is an object of the present invention to provide a solid-state imaging device for enhancing accuracy of AD conversion and active switching of up-counting and down-counting in the asynchronous counter without limiting the AD conversion frequency. The solid-state imaging device according to the present invention includes an asynchronous counter having an up-counting mode in which up-counting is performed, a down-counting mode in which down-counting is performed, and a holding mode for switching operation settings between the up-counting and the down-counting while maintaining a count value held in the asynchronous counter.

Abstract: A solid-state imaging device comprises a pixel array; a reference signal generation unit operable to generate a reference signal that changes monotonically for a predetermined period in a horizontal period; a comparator operable to compare the level of a pixel signal with the level of a reference signal; a counter operable to count input clock pulses; a memory operable to store the number of counts counted by the counter as a digital value; and a timing control unit operable to generate a clock that is to be input into the counter, and change frequency of the clock that is to be input into the counter based on external input data.

Abstract: A row scanner selects an arbitrary row in an pixel array unit. Per-column AD converters separately convert voltage signals respectively outputted from a column of a plurality of unit pixels in the selected arbitrary row into digital signals. A column scanner sequentially outputs the digital signals by a column-scanning operation thereof. An AD conversion result adjuster judges whether or not the digital signals reach a predetermined judgment value or the status equivalent to the digital signals reaching the predetermined judgment value is generated, and fixes the digital signals to digital pixel values set in accordance with the predetermined judgment value when a result of the judgment is positive.

Abstract: In a solid state imaging device to be included in an imaging device such as a digital camera, a ramp run-up AD conversion circuit for AD converting a pixel signal is provided corresponding to one or a plurality of pixel columns. A column counter provided in each ramp run-up AD conversion circuit holds an upper bit, and a clock signal is supplied to one or plural latches for holding a lower bit. Thus, fast and accurate AD conversion can be realized while suppressing increase of clock frequency.

Abstract: An image pickup control unit specifies a scan area of a frame based on a scaling factor for electronic zooming. An image sensor converts incoming light signals into electric signals by performing reset scanning on each line of the specified scan area of the frame, and accumulates each of the electric signals, and reads the electric signals accumulated thereby by performing read scanning to output them as image data. In response to an instruction for changing a horizontal scanning period and a vertical scanning period of an Nth frame and later frames in a series of frames from the image pickup control unit, the image sensor performs reset scanning and read scanning on the Nth frame based on the changed horizontal scanning and vertical scanning periods even when a reset scanning period of the Nth frame partially overlaps a read scanning period of an immediately preceding (N?1)th frame.

Abstract: An imaging control unit specifies a scan region, including an effective pixel region and a blanking region, of an image based on a magnification for electronic zooming, and converts an input optical signal into an electrical signal by scanning the scan region. The imaging control unit reads the electrical signal stored and delivers the electrical signal to an image sensor unit as picture data. An RW control unit stores the picture data in a register based on the magnification for electronic zooming, and then reads the picture data at a predetermined frame rate. A resolution converter performs interpolation processing of the picture data based on the magnification for electronic zooming.

Abstract: An imaging control unit specifies a scan region, including an effective pixel region and a blanking region, of an image based on a magnification for electronic zooming, and converts an input optical signal into an electrical signal by scanning the scan region. The imaging control unit reads the electrical signal stored and delivers the electrical signal to an image sensor unit as picture data. An RW control unit stores the picture data in a register based on the magnification for electronic zooming, and then reads the picture data at a predetermined frame rate. A resolution converter performs interpolation processing of the picture data based on the magnification for electronic zooming.

Abstract: An image pickup control unit specifies a scan area of a frame based on a scaling factor for electronic zooming. An image sensor converts incoming light signals into electric signals by performing reset scanning on each line of the specified scan area of the frame, and accumulates each of the electric signals, and reads the electric signals accumulated thereby by performing read scanning to output them as image data. In response to an instruction for changing a horizontal scanning period and a vertical scanning period of an Nth frame and later frames in a series of frames from the image pickup control unit, the image sensor performs reset scanning and read scanning on the Nth frame based on the changed horizontal scanning and vertical scanning periods even when a reset scanning period of the Nth frame partially overlaps a read scanning period of an immediately preceding (N-1)th frame.

Abstract: An imaging control unit 4 specifies a scan region including an effective pixel region and a blanking region based on the magnification for electronic zooming, and converts an input optical signal into an electrical signal by scanning the scan region. The imaging control unit 4 reads the electrical signal stored therein and delivers it to an image sensor unit 1 as picture data. An RW control unit 6 stores the picture data in a register 5 based on the magnification for electronic zooming, and then reads the picture data at a predetermined frame rate. A resolution converter 7 performs an interpolation processing on the picture data based on the magnification for electronic zooming.

Abstract: A fuzzy development-support device includes a data input unit, a fuzzy-inference execution unit and a result verification unit. As an example, the data input unit includes a display unit connected to a membership function generator and a grid pitch designation unit for designating a grid pitch on a grid sheet displayed on the display unit for creation of membership functions. The grid pitch designation unit allows variation of grid pitch on the grid sheet. Thus, an operator uses the grid pitch designation unit to achieve an effective input of membership functions by generating the grid sheet with a pitch adequate for a desired shape of membership function.

Abstract: An SOI-MOS transistor structure is obtained which enables prevention of a substrate floating effect, reduction of the gate capacity and the contact resistance, and connection of two or more transistors in series. A semiconductor device including this transistor includes a pair of n.sup.+ type source/drain regions and a p.sup.+ type channel potential fixing region formed by dividing an active region by a first wiring and a second wiring, and a third wiring and a fourth wiring extending from respective side portions of the wirings. Since holes stored in an effective channel region flow in the p.sup.+ type channel potential fixing region, the substrate flowing effect can be prevented. Since one region of the pair of n.sup.+ type source/drain regions is wider than the other region, the contact resistance can be decreased. Further, since the gate wirings are not connected to each other, transistors can be connected in series.