Patents by Inventor Kenichi Suzaki

Kenichi Suzaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190211449
    Abstract: There is provided a technique that includes: a process chamber accommodating substrate; a storage tank including bottom portion having recess and wall portion and storing liquid precursor; a vaporizing part vaporizing the stored liquid precursor to generate precursor gas; a supply part supplying the generated precursor gas to the process chamber; a sensor disposed in the recess and detecting liquid level of the stored liquid precursor; a replenishment part replenishing the liquid precursor in the storage tank; and a controller controlling the supply part to supply the precursor gas to the process chamber to perform a substrate processing process for processing the substrate, and controlling, each time when the substrate processing process is performed a predetermined number of times, the replenishment part, based on the detected liquid level, to replenish the liquid precursor in the storage tank so that the liquid level becomes a predetermined level.
    Type: Application
    Filed: March 15, 2019
    Publication date: July 11, 2019
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Noriyuki ISOBE, Kenichi SUZAKI, Takeshi KASAI, Yoshitaka KAWAHARA, Masakazu SHIMADA
  • Publication number: 20180135176
    Abstract: A vaporization system includes a vaporization chamber having a first portion and a second portion. A first fluid supply part is connected to the first portion of the vaporization chamber, and configured to supply a mixed fluid in which a first carrier gas and a liquid precursor are mixed, toward the second portion. A second fluid supply part is configured to supply a second carrier gas toward the mixed fluid at the second portion.
    Type: Application
    Filed: January 12, 2018
    Publication date: May 17, 2018
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Atsushi MORIKAWA, Masakazu SHIMADA, Takeshi KASAI, Kenichi SUZAKI, Hirohisa YAMAZAKI, Yoshimasa NAGATOMI
  • Patent number: 9970112
    Abstract: The substrate processing apparatus includes a reaction chamber configured to accommodate a substrate; a first gas supply unit configured to supply a first process gas containing a silicon element to the substrate; a second gas supply unit configured to supply a second process gas containing a silicon element and a chlorine element to the substrate; an exhaust unit configured to exhaust the first process gas and the second process gas; a cleaning gas bypass supply unit configured to supply a cleaning gas to the exhaust unit; a cleaning monitoring unit installed in the exhaust unit; a gas flow rate control unit configured to adjust an amount of the cleaning gas supplied; and a main control unit configured to control the gas flow rate control unit in response to a signal received from the cleaning gas monitoring unit.
    Type: Grant
    Filed: March 3, 2015
    Date of Patent: May 15, 2018
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Yasunobu Koshi, Kenichi Suzaki, Akihito Yoshino
  • Publication number: 20170232457
    Abstract: A substrate processing apparatus includes: a process chamber accommodating substrates; a heating system for heating the process chamber to a predetermined temperature; a precursor gas supply system including a precursor gas nozzle and for supplying a precursor gas from the precursor gas nozzle to the process chamber; a reaction gas supply system configured to supply a reaction gas reacting with the precursor gas in the process chamber; and a control part configured to control the heating system, the precursor gas supply system and the reaction gas supply system to form a film on each of the plurality of substrates by performing a process, while heating the process chamber accommodating the plurality of substrates to the predetermined temperature. The process includes supplying the precursor gas from the precursor gas nozzle to the process chamber and supplying the reaction gas to the process chamber.
    Type: Application
    Filed: February 14, 2017
    Publication date: August 17, 2017
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Toshiki FUJINO, Yuma FUJII, Kazuki NONOMURA, Yoshinori BABA, Yuji TAKEBAYASHI, Kenichi SUZAKI
  • Patent number: 9708708
    Abstract: A film is efficiently formed by sufficiently supplying a source gas to substrates accommodated in a process chamber, and the uniformity of a film formed on the substrates is improved. A method of a semiconductor device manufacturing includes (a) supplying a source gas to an upper region of a process chamber through a first gas supply hole disposed at a front end of a first nozzle disposed in a lower region of the process chamber where the source gas is not pyrolyzed; (b) supplying the source gas to substrates disposed in the lower region and a middle region of the process chamber through a plurality of second gas supply holes of a second nozzle; and (c) supplying a reactive gas to substrates disposed in the lower region, the middle region and the upper region of the process chamber through a plurality of third gas supply holes of a third nozzle.
    Type: Grant
    Filed: September 8, 2016
    Date of Patent: July 18, 2017
    Assignee: Hitachi Kokusai Electric, Inc.
    Inventors: Noriyuki Isobe, Yuji Takebayashi, Kenichi Suzaki, Takeshi Kasai, Atsushi Hirano, Koichi Oikawa
  • Publication number: 20170067159
    Abstract: A film is efficiently formed by sufficiently supplying a source gas to substrates accommodated in a process chamber, and the uniformity of a film formed on the substrates is improved. A method of a semiconductor device manufacturing includes (a) supplying a source gas to an upper region of a process chamber through a first gas supply hole disposed at a front end of a first nozzle disposed in a lower region of the process chamber where the source gas is not pyrolyzed; (b) supplying the source gas to substrates disposed in the lower region and a middle region of the process chamber through a plurality of second gas supply holes of a second nozzle; and (c) supplying a reactive gas to substrates disposed in the lower region, the middle region and the upper region of the process chamber through a plurality of third gas supply holes of a third nozzle.
    Type: Application
    Filed: September 8, 2016
    Publication date: March 9, 2017
    Inventors: Noriyuki ISOBE, Yuji TAKEBAYASHI, Kenichi SUZAKI, Takeshi KASAI, Atsushi HIRANO, Koichi OIKAWA
  • Patent number: 9390916
    Abstract: A method of manufacturing a semiconductor device can enhance controllability of the diameters of grains of a film containing a predetermined element such as a silicon film when the film is formed. The method includes (a) forming a seed layer containing a predetermined element and carbon on a substrate by performing a cycle a predetermined number of times, the cycle including alternately performing supplying a first source gas containing the predetermined element, an alkyl group and a halogen group to the substrate and supplying a second source gas containing the predetermined element and an amino group to the substrate, or by performing supplying the first source gas to the substrate a predetermined number of times; and (b) forming a film containing the predetermined element on the seed layer by supplying a third source gas containing the predetermined element and free of the alkyl group to the substrate.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: July 12, 2016
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Yoshiro Hirose, Kenichi Suzaki
  • Publication number: 20150287594
    Abstract: A method of manufacturing a semiconductor device can enhance controllability of the diameters of grains of a film containing a predetermined element such as a silicon film when the film is formed. The method includes (a) forming a seed layer containing a predetermined element and carbon on a substrate by performing a cycle a predetermined number of times, the cycle including alternately performing supplying a first source gas containing the predetermined element, an alkyl group and a halogen group to the substrate and supplying a second source gas containing the predetermined element and an amino group to the substrate, or by performing supplying the first source gas to the substrate a predetermined number of times; and (b) forming a film containing the predetermined element on the seed layer by supplying a third source gas containing the predetermined element and free of the alkyl group to the substrate.
    Type: Application
    Filed: June 23, 2015
    Publication date: October 8, 2015
    Applicant: Hitachi Kokusai Electric Inc.
    Inventors: Yoshiro HIROSE, Kenichi SUZAKI
  • Patent number: 9093270
    Abstract: A method of manufacturing a semiconductor device can enhance controllability of the diameters of grains of a film containing a predetermined element such as a silicon film when the film is formed. The method includes (a) forming a seed layer containing a predetermined element and carbon on a substrate by performing a cycle a predetermined number of times, the cycle including alternately performing supplying a first source gas containing the predetermined element, an alkyl group and a halogen group to the substrate and supplying a second source gas containing the predetermined element and an amino group to the substrate, or by performing supplying the first source gas to the substrate a predetermined number of times; and (b) forming a film containing the predetermined element on the seed layer by supplying a third source gas containing the predetermined element and free of the alkyl group to the substrate.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: July 28, 2015
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Yoshiro Hirose, Kenichi Suzaki
  • Publication number: 20150176130
    Abstract: The substrate processing apparatus includes a reaction chamber configured to accommodate a substrate; a first gas supply unit configured to supply a first process gas containing a silicon element to the substrate; a second gas supply unit configured to supply a second process gas containing a silicon element and a chlorine element to the substrate; an exhaust unit configured to exhaust the first process gas and the second process gas; a cleaning gas bypass supply unit configured to supply a cleaning gas to the exhaust unit; a cleaning monitoring unit installed in the exhaust unit; a gas flow rate control unit configured to adjust an amount of the cleaning gas supplied; and a main control unit configured to control the gas flow rate control unit in response to a signal received from the cleaning gas monitoring unit.
    Type: Application
    Filed: March 3, 2015
    Publication date: June 25, 2015
    Inventors: Yasunobu KOSHI, Kenichi SUZAKI, Akihito YOSHINO
  • Patent number: 8999858
    Abstract: The substrate processing apparatus includes a reaction chamber configured to accommodate a substrate; a first gas supply unit configured to supply a first process gas containing a silicon element to the substrate; a second gas supply unit configured to supply a second process gas containing a silicon element and a chlorine element to the substrate; an exhaust unit configured to exhaust the first process gas and the second process gas; a cleaning gas bypass supply unit configured to supply a cleaning gas to the exhaust unit; a cleaning monitoring unit installed in the exhaust unit; a gas flow rate control unit configured to adjust an amount of the cleaning gas supplied; and a main control unit configured to control the gas flow rate control unit in response to a signal received from the cleaning gas monitoring unit.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: April 7, 2015
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Yasunobu Koshi, Kenichi Suzaki, Akihito Yoshino
  • Publication number: 20140179085
    Abstract: A method of manufacturing a semiconductor device can enhance controllability of the diameters of grains of a film containing a predetermined element such as a silicon film when the film is formed. The method includes (a) forming a seed layer containing a predetermined element and carbon on a substrate by performing a cycle a predetermined number of times, the cycle including alternately performing supplying a first source gas containing the predetermined element, an alkyl group and a halogen group to the substrate and supplying a second source gas containing the predetermined element and an amino group to the substrate, or by performing supplying the first source gas to the substrate a predetermined number of times; and (b) forming a film containing the predetermined element on the seed layer by supplying a third source gas containing the predetermined element and free of the alkyl group to the substrate.
    Type: Application
    Filed: December 23, 2013
    Publication date: June 26, 2014
    Applicant: Hitachi Kokusai Electric Inc.
    Inventors: Yoshiro HIROSE, Kenichi SUZAKI
  • Patent number: 8636882
    Abstract: Disclosed is a producing method of a semiconductor device, comprising: loading a substrate into a reaction furnace; forming a film on the substrate in the reaction furnace; unloading the substrate from the reaction furnace after the film has been formed; and forcibly cooling an interior of the reaction furnace in a state where the substrate does not exist in the reaction furnace after the substrate has been unloaded.
    Type: Grant
    Filed: March 16, 2009
    Date of Patent: January 28, 2014
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Kenichi Suzaki, Jie Wang
  • Patent number: 8231731
    Abstract: A process for producing a semiconductor device, comprising the steps of conducting film formation on substrate (10) in reactor (1); and unloading the substrate (10) after film formation from the reactor (1) and thereafter effecting forced air cooling of the interior of the reactor (1) while the substrate (10) is absent in the reactor (1). The stress of deposited film adhering in the reactor (1) is increased over that exhibited at air cooling without blower so as to positively generate thermal stress with the result that the deposited film would undergo forced cracking over that exhibited at air cooling without blower. Microparticles scattered by the cracking are efficiently discharged from the reactor forcibly through purging in the reactor in the state of atmospheric pressure.
    Type: Grant
    Filed: May 2, 2011
    Date of Patent: July 31, 2012
    Assignee: Hitachi Kokusai Electric, Inc.
    Inventors: Kenichi Suzaki, Jie Wang
  • Patent number: 8227030
    Abstract: A process for producing a semiconductor device, in which in the formation of a boron doped silicon film from, for example, monosilane and boron trichloride by vacuum CVD technique, there can be produced a film excelling in inter-batch homogeneity with respect to the growth rate and concentration of a dopant element, such as boron. The process includes the step of performing the first purge through conducting at least once of while a substrate after treatment is housed in a reaction furnace, vacuuming of the reaction furnace and inert gas supply thereto and the steps of performing the second purge through conducting at least once of after carrying of the substrate after treatment out of the reaction furnace, prior to carrying of a substrate to be next treated into the reaction furnace and while at least no product substrate is housed in the reaction furnace, vacuuming of the reaction furnace and inert gas supply thereto.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: July 24, 2012
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Takaaki Noda, Kenichi Suzaki
  • Patent number: 8221835
    Abstract: A process for producing a semiconductor device, in which in the formation of a boron doped silicon film from, for example, monosilane and boron trichloride by vacuum CVD technique, there can be produced a film excelling in inter-batch homogeneity with respect to the growth rate and concentration of a dopant element, such as boron. The process includes the step of performing the first purge through conducting at least once of while a substrate after treatment is housed in a reaction furnace, vacuuming of the reaction furnace and inert gas supply thereto and the steps of performing the second purge through conducting at least once of after carrying of the substrate after treatment out of the reaction furnace, prior to carrying of a substrate to be next treated into the reaction furnace and while at least no product substrate is housed in the reaction furnace, vacuuming of the reaction furnace and inert gas supply thereto.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: July 17, 2012
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Takaaki Noda, Kenichi Suzaki
  • Patent number: 8211798
    Abstract: A support section (28) for supporting a wafer (1) is convexly formed in the center of a receiving section (26) of a support groove (25) of a boat 21. At the time of boat loading of the boat (21), in which wafers (1) respectively received by the supporting sections (28) are aligned, from a standby chamber (33) to a processing chamber (14), the pressure in the standby chamber (33) and processing chamber (14) is set to 200 pascals or more, and 3000 pascals or less. By supporting the wafer upwards from the receiving section with use of the support section, even if peeling of the film on the wafer occurs from a large frictional force between the supported surface of the wafer and the support section under a reduced pressure, the particles from the peeling are caught by the receiving section and therefore particles are prevented from adhering to the IC fabrication surface of the wafer directly below the receiving section.
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: July 3, 2012
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Takashi Ozaki, Kenichi Suzaki
  • Publication number: 20120052203
    Abstract: Provided is a substrate processing apparatus and a substrate processing method, capable of preventing a reactive product from being deposited to the inside of a processing chamber and an exhaust line, and preventing the corrosion caused by hydrogen chloride gas. The method includes (a) forming a film on a substrate in a processing chamber; and (b) introducing an air from an outside of the processing chamber into an inside of the processing chamber, reacting an adherent adhered to the inside of the processing chamber and an inside of an exhaust line connected to the processing chamber with a moisture contained in the air to generate at least a hydrogen chloride gas, and exhausting the hydrogen chloride gas through the exhaust line, wherein the step (b) is performed after performing the step (a) and the step (b) is performed until a concentration level of the hydrogen chloride gas in the processing chamber is equal to or lower than a preset concentration level.
    Type: Application
    Filed: August 4, 2011
    Publication date: March 1, 2012
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Tomoyasu Miyashita, Kenichi Suzaki
  • Publication number: 20110239936
    Abstract: A process for producing a semiconductor device, comprising the steps of conducting film formation on substrate (10) in reactor (1); and unloading the substrate (10) after film formation from the reactor (1) and thereafter effecting forced air cooling of the interior of the reactor (1) while the substrate (10) is absent in the reactor (1). The stress of deposited film adhering in the reactor (1) is increased over that exhibited at air cooling without blower so as to positively generate thermal stress with the result that the deposited film would undergo forced cracking over that exhibited at air cooling without blower. Microparticles scattered by the cracking are efficiently discharged from the reactor forcibly through purging in the reactor in the state of atmospheric pressure.
    Type: Application
    Filed: May 2, 2011
    Publication date: October 6, 2011
    Inventors: Kenichi SUZAKI, Jie WANG
  • Patent number: D828091
    Type: Grant
    Filed: July 26, 2016
    Date of Patent: September 11, 2018
    Assignee: HITACHI KOKUSAI ELECTRIC, INC.
    Inventors: Toshiki Fujino, Yuma Fujii, Kazuki Nonomura, Yoshinori Baba, Yuji Takebayashi, Kenichi Suzaki