Patents by Inventor Kenichi Yoshino
Kenichi Yoshino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190080739Abstract: According to one embodiment, a magnetoresistive element includes: a first magnetic layer having a magnetization direction that is variable; a second magnetic layer having a magnetization direction that is invariable; a first non-magnetic layer provided between the first magnetic layer and the second magnetic layer; a third magnetic layer that fixes the magnetization direction of the second magnetic layer and that antiferromagnetically couples with the second magnetic layer; and a second non-magnetic layer provided between the second magnetic layer and the third magnetic layer. The second non-magnetic layer includes ruthenium (Ru) and a metal element.Type: ApplicationFiled: March 9, 2018Publication date: March 14, 2019Applicant: TOSHIBA MEMORY CORPORATIONInventors: Tadaaki OIKAWA, Young Min EEH, Kazuya SAWADA, Kenichi YOSHINO, Toshihiko NAGASE, Daisuke WATANABE
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Publication number: 20190019841Abstract: A semiconductor device includes a first rare earth oxide layer, a first magnetic layer adjacent to the first rare earth oxide layer, a second rare earth oxide layer, a second magnetic layer adjacent to the second rare earth oxide layer, and a nonmagnetic layer. The first magnetic layer is disposed between the first rare earth oxide layer and the nonmagnetic layer and is oriented in a crystal surface which is the same as a crystal surface of the nonmagnetic layer. The second magnetic layer is disposed between the second rare earth oxide layer and the nonmagnetic layer and is oriented in a crystal surface which is the same as a crystal surface of the nonmagnetic layer. The nonmagnetic layer is disposed between the first magnetic layer and the second magnetic layer.Type: ApplicationFiled: September 9, 2018Publication date: January 17, 2019Applicant: TOSHIBA MEMORY CORPORATIONInventors: Youngmin EEH, Toshihiko NAGASE, Daisuke WATANABE, Kazuya SAWADA, Kenichi YOSHINO, Tadaaki OIKAWA, Hiroyuki OHTORI
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Publication number: 20180277745Abstract: According to one embodiment, a magnetic memory device includes a magnetoresistive element, the magnetoresistive element including a first magnetic layer having a variable magnetization direction, a second magnetic layer having a fixed magnetization direction and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer. The first magnetic layer includes first and second sub-magnetic layers each containing at least iron (Fe) and boron (B), and a concentration of boron (B) contained in the first sub-magnetic layer is different from a concentration of boron (B) contained in the second sub-magnetic layer.Type: ApplicationFiled: September 12, 2017Publication date: September 27, 2018Applicants: TOSHIBA MEMORY CORPORATION, SK HYNIX INC.Inventors: Tadaaki OIKAWA, Toshihiko NAGASE, Youngmin EEH, Daisuke WATANABE, Kazuya SAWADA, Kenichi YOSHINO, Hiroyuki OHTORI, Yang Kon KIM, Ku Youl JUNG, Jong Koo LIM, Jae Hyoung LEE, Soo Man SEO, Sung Woong CHUNG, Tae Young LEE
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Publication number: 20180205006Abstract: A magnetoresistive memory device includes a first magnetic layer having a variable magnetization direction; a second magnetic layer, a magnetization direction of the second magnetic layer being invariable; a first nonmagnetic layer provided between the first magnetic layer and the second magnetic layer; and a second nonmagnetic layer provided on the first magnetic layer, which is opposite the first nonmagnetic layer. The first magnetic layer having a stacked layer structure in which amorphous magnetic material layer is sandwiched between crystalline magnetic material layers.Type: ApplicationFiled: March 12, 2018Publication date: July 19, 2018Applicant: TOSHIBA MEMORY CORPORATIONInventors: Daisuke WATANABE, Toshihiko NAGASE, Youngmin EEH, Kazuya SAWADA, Makoto NAGAMINE, Tadaaki OIKAWA, Kenichi YOSHINO, Hiroyuki OHTORI
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Patent number: 9947862Abstract: According to one embodiment, a magnetoresistive memory device includes a first magnetic layer in which a magnetization direction is variable, a first nonmagnetic layer provided on the first magnetic layer, a second magnetic layer provided on the first nonmagnetic layer, a magnetization direction of the second magnetic layer being invariable, and a second nonmagnetic layer provided on the first magnetic layer, which is opposite the first nonmagnetic layer. The first magnetic layer includes Mo.Type: GrantFiled: September 16, 2016Date of Patent: April 17, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventors: Daisuke Watanabe, Toshihiko Nagase, Youngmin Eeh, Kazuya Sawada, Makoto Nagamine, Tadaaki Oikawa, Kenichi Yoshino, Hiroyuki Ohtori
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Publication number: 20180076383Abstract: According to one embodiment, a magnetic memory device includes a first magnetic layer having a variable magnetization direction, a second magnetic layer having a fixed magnetization direction, and a nonmagnetic layer between the first and second magnetic layers. The second magnetic layer includes a first main surface on the nonmagnetic layer side and a second main surface opposite to the first main surface, and includes a first region on the first main surface side and a second region on the second main surface side, and an intermediate region between the first and second regions and containing a predetermined nonmagnetic element. A concentration of the predetermined nonmagnetic element in the intermediate region is higher than that in the first and second regions. The second magnetic layer contains a magnetic element from the first to second main surfaces.Type: ApplicationFiled: March 20, 2017Publication date: March 15, 2018Applicant: TOSHIBA MEMORY CORPORATIONInventors: Kazuya SAWADA, Toshihiko NAGASE, Youngmin EEH, Daisuke WATANABE, Kenichi YOSHINO, Tadaaki OIKAWA, Hiroyuki OHTORI
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Publication number: 20180076262Abstract: According to one embodiment, a semiconductor device includes a first rare earth oxide layer, a first magnetic layer being adjacent to the first rare earth oxide layer, and a nonmagnetic layer, the first magnetic layer being disposed between the first rare earth oxide layer and the nonmagnetic layer and being oriented in a crystal surface which is the same as a crystal surface of the nonmagnetic layer.Type: ApplicationFiled: February 28, 2017Publication date: March 15, 2018Applicant: TOSHIBA MEMORY CORPORATIONInventors: Youngmin EEH, Toshihiko NAGASE, Daisuke WATANABE, Kazuya SAWADA, Kenichi YOSHINO, Tadaaki OIKAWA, Hiroyuki OHTORI
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Publication number: 20170263857Abstract: According to one embodiment, a magnetoresistive memory device includes a first magnetic layer in which a magnetization direction is variable, a first nonmagnetic layer provided on the first magnetic layer, a second magnetic layer provided on the first nonmagnetic layer, a magnetization direction of the second magnetic layer being invariable, and a second nonmagnetic layer provided on the first magnetic layer, which is opposite the first nonmagnetic layer. The first magnetic layer includes Mo.Type: ApplicationFiled: September 16, 2016Publication date: September 14, 2017Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Daisuke WATANABE, Toshihiko NAGASE, Youngmin EEH, Kazuya SAWADA, Makoto NAGAMINE, Tadaaki OIKAWA, Kenichi YOSHINO, Hiroyuki OHTORI
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Publication number: 20170263858Abstract: According to one embodiment, a magnetic memory device includes a stacked structure including a first magnetic layer, a second magnetic layer and a nonmagnetic layer between the first magnetic layer and the second magnetic layer, and a sidewall insulating layer provided on a side surface of the stacked structure and containing boron (B).Type: ApplicationFiled: September 16, 2016Publication date: September 14, 2017Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yasuyuki SONODA, Daisuke WATANABE, Masatoshi YOSHIKAWA, Youngmin EEH, Shuichi TSUBATA, Toshihiko NAGASE, Yutaka HASHIMOTO, Kazuya SAWADA, Kazuhiro TOMIOKA, Kenichi YOSHINO, Tadaaki OIKAWA
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Publication number: 20170263680Abstract: According to one embodiment, a magnetoresistive memory device includes an electrode, a first layer which is provided on the electrode and includes an amorphous portion in at least a part of an electrode side, and a magnetoresisive element provided on the first layer.Type: ApplicationFiled: September 16, 2016Publication date: September 14, 2017Applicants: KABUSHIKI KAISHA TOSHIBA, SK HYNIX INC.Inventors: Kenichi YOSHINO, Toshihiko NAGASE, Youngmin EEH, Daisuke WATANABE, Kazuya SAWADA, Makoto NAGAMINE, Won Joon CHOI, Guk Cheon KIM, Yang Kon KIM, Jong Koo LIM
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Publication number: 20160027682Abstract: According to the embodiments, a manufacturing method for a semiconductor device includes forming recessed parts on a surface of a semiconductor layer. The manufacturing method for the semiconductor device includes a process for forming a buffer layer, which has a melting point lower than that of the semiconductor layer, on a surface of the recessed part on the surface of the semiconductor layer. The manufacturing method for the semiconductor device includes a process for forming a high-melting point film, which has the melting point higher than that of the semiconductor layer, on the buffer layer and fills the recessed part with the high-melting point film. The manufacturing method for the semiconductor device includes a process for heating the semiconductor layer having the buffer layer and the high-melting point film formed thereon at a temperature equal to or higher than the melting point of the buffer layer.Type: ApplicationFiled: March 2, 2015Publication date: January 28, 2016Inventors: Shintaro Okujo, Kenichi Yoshino, Hiroyuki Fukumizu, Satoshi Kato
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Publication number: 20150311079Abstract: According to embodiments, there is provided a semiconductor device, including: a first area including plural transistors formed therein; and a second area including plural dummy transistors formed therein, the second area surrounding the first area, wherein a pitch of the dummy transistors is equal to or less than a central wavelength of a light used to form the transistors.Type: ApplicationFiled: July 6, 2015Publication date: October 29, 2015Inventors: Takayuki Ito, Kenichi Yoshino, Tomoya Sanuki, Hiroshi Ohno
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Publication number: 20150255665Abstract: According to one embodiment, a laser heating treatment method includes forming a film having a higher melting point than a structural body provided on a substrate so as to cover the structural body, and heating the structural body by irradiating the film and the structural body with laser.Type: ApplicationFiled: February 25, 2015Publication date: September 10, 2015Applicant: Kabushiki Kaisha ToshibaInventors: Hiroyuki FUKUMIZU, Yoshio Kasai, Takaaki Minami, Kenichi Yoshino, Yosuke Kitamura, Yusaku Konno, Koichi Kawamura, Satoshi Kato, Naoaki Sakurai
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Publication number: 20150115388Abstract: A solid-state imaging device includes a plurality of photoelectric transducers disposed in an array in a semiconductor layer. Each photoelectric transducer includes a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type. The first and second regions are in direct contact. An isolation region is between each adjacent pair of photoelectric transducers. The isolation region includes an insulating material extending from a surface of the semiconductor layer and a third semiconductor region of the first conductivity type surrounding the insulating material. The third semiconductor region is between the insulating material and the first semiconductor region, and the first semiconductor region is between the second and third semiconductor regions.Type: ApplicationFiled: October 24, 2014Publication date: April 30, 2015Inventors: Kentaro EDA, Kenichi YOSHINO, Shintaro OKUJO, Hiroyuki FUKUMIZU, Takaaki MINAMI, Takeshi YOUSYOU, Hiroaki ASHIDATE
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Publication number: 20140217515Abstract: According to embodiments, there is provided a semiconductor device, including: a first area including plural transistors formed therein; and a second area including plural dummy transistors formed therein, the second area surrounding the first area, wherein a pitch of the dummy transistors is equal to or less than a central wavelength of a light used to form the transistors.Type: ApplicationFiled: February 7, 2014Publication date: August 7, 2014Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Takayuki Ito, Kenichi Yoshino, Tomoya Sanuki, Hiroshi Ohno
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Patent number: 8629482Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes implanting impurity ions to a semiconductor layer in which an electrode is embedded; forming a light absorption film which absorbs laser light at a side of the electrode to which the laser light is irradiated; and activating the impurity ions by irradiating laser light to the semiconductor layer at which the light absorption film is formed in the forming.Type: GrantFiled: June 18, 2012Date of Patent: January 14, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Tomoyasu Kudo, Kenichi Yoshino, Masaki Kamimura
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Publication number: 20130183792Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes implanting impurity ions to a semiconductor layer in which an electrode is embedded; forming a light absorption film which absorbs laser light at a side of the electrode to which the laser light is irradiated; and activating the impurity ions by irradiating laser light to the semiconductor layer at which the light absorption film is formed in the forming.Type: ApplicationFiled: June 18, 2012Publication date: July 18, 2013Applicant: Kabushiki Kaisha ToshibaInventors: Tomoyasu KUDO, Kenichi YOSHINO, Masaki KAMIMURA
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Patent number: 8426285Abstract: An ion implantation is performed to implant ions into a silicon substrate, and a microwave irradiation is performed to irradiate the silicon substrate with microwaves after the ion implantation. After the microwave irradiation, the silicon substrate is transferred to a heat-treatment apparatus, where the silicon substrate is treated with heat by being irradiated with light having a pulse width ranging from 0.1 milliseconds to 100 milliseconds, both inclusive.Type: GrantFiled: September 30, 2010Date of Patent: April 23, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Kenichi Yoshino, Kiyotaka Miyano, Tomonori Aoyama
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Patent number: 8420555Abstract: A manufacturing method for a semiconductor device including: determining pattern dependency of a radiation factor of an element forming surface of one wafer having a predetermined pattern formed on the wafer; determining a heating surface of the wafer, based on the pattern dependency of the radiation factor; holding the one wafer having the determined heating surface and another wafer having a determined heating surface, spaced at a predetermined distance in such a manner that non-heating surfaces of the one wafer and the another wafer oppose to each other; and heating the each heating surface of the one wafer and the another wafer.Type: GrantFiled: January 19, 2011Date of Patent: April 16, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Masaki Kamimura, Kenichi Yoshino
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Patent number: 8148717Abstract: A manufacturing method for semiconductor device includes: forming an opening, in a surface of a semiconductor substrate being composed of first atom, the opening having an opening ratio y to an area of the surface of the semiconductor substrate ranging from 5 to 30%; forming an epitaxial layer in the opening, the epitaxial layer being made of a mixed crystal containing a second atom in a concentration ranging from 15 to 25%, and the second atom having a lattice constant different from a lattice constant of the first atom; implanting impurity ion into the epitaxial layer; and performing activation annealing at a predetermined temperature T, the predetermined temperature T being equal to or higher than 1150° C. and satisfies a relationship of y?1E-5exp (21541/T).Type: GrantFiled: January 28, 2011Date of Patent: April 3, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Takayuki Ito, Yusuke Oshiki, Kouji Matsuo, Kenichi Yoshino, Takaharu Itani, Takuo Ohashi, Toshihiko Iinuma, Kiyotaka Miyano, Kunihiro Miyazaki