Patents by Inventor Kenichiro Toratani
Kenichiro Toratani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160268388Abstract: A non-volatile memory device includes a semiconductor body extending in a first direction, an electrode extending in a second direction crossing the first direction, a first floating gate provided between the semiconductor body and the electrode, and a second floating gate provided between the first floating gate and the electrode. The first floating gate is provided via an insulating film on the semiconductor body and has a side surface in the second direction. The second floating gate has a side surface in the second direction. The device further includes a silicon nitride film in contact with the side surface of the second floating gate and a first insulating film that covers the silicon nitride film and is in contact with the side surface of the first floating gate.Type: ApplicationFiled: August 28, 2015Publication date: September 15, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Hiroshi ITOKAWA, Kenichiro TORATANI
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Publication number: 20160233230Abstract: A semiconductor memory device according to an embodiment, includes a stacked body, a semiconductor member, a charge storage layer, a charge block layer and an electrode antioxidant layer. The stacked body includes a plurality of electrode layers stacked separated from each other and an inter-electrode insulating layer between the electrode layers. The semiconductor member extends in a stacking direction of the stacked body and penetrates the stacked body. The tunnel insulating layer is provided on a side surface of the semiconductor member. The charge storage layer is provided on a side surface of the tunnel insulating layer. The charge block layer is provided on a side surface of the charge storage layer and contains oxygen. The electrode antioxidant layer is provided between the charge block layer and the electrode layer and has a composition different from that of the electrode layer.Type: ApplicationFiled: June 25, 2015Publication date: August 11, 2016Inventors: Takashi FURUHASHI, Masayuki TANAKA, Kenichiro TORATANI
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Patent number: 9355846Abstract: According to one embodiment, a method for forming a semiconductor device includes: forming a first underlayer film that contains a first chemical element selected from the group consisting of germanium, aluminum, tungsten, hafnium, titanium, tantalum, nickel, cobalt and alkaline earth metals; forming, on the first underlayer film, a second underlayer film that contains a second chemical element selected from the group consisting of germanium, aluminum, tungsten, hafnium, titanium, tantalum, nickel, cobalt and alkaline earth metals, the second chemical element being an chemical element not contained in the first underlayer film; and forming, on the second underlayer film, a silicon oxide film by a CVD or ALD method by use of a silicon source containing at least one of an ethoxy group, a halogen group, an alkyl group, and an amino group, or a silicon source of a siloxane system.Type: GrantFiled: August 29, 2012Date of Patent: May 31, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Masayuki Tanaka, Kenichiro Toratani, Kazuhiro Matsuo
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Publication number: 20160071948Abstract: According to a nonvolatile memory device including a semiconductor layer, a control electrode, a memory layer provided between the semiconductor layer and the control electrode, a first insulating film provided between the semiconductor layer and the memory layer, and a second insulating film provided between the control electrode and the memory layer. The second insulating film includes a metal oxide having a monoclinic structure.Type: ApplicationFiled: March 3, 2015Publication date: March 10, 2016Inventors: Kenichiro TORATANI, Masayuki TANAKA, Takashi FURUHASHI
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Publication number: 20150263013Abstract: A non-volatile semiconductor memory device according to an embodiment includes a semiconductor substrate, a tunnel insulating film on the semiconductor substrate, a first electric charge storage layer on the tunnel insulating film, a first insulating layer on the first electric charge storage layer, a second electric charge storage layer on the first insulating layer and including a metal containing layer, a first metal diffusion suppressing layer on the second electric charge storage layer to suppress diffusion of metal contained in the second electric charge storage layer, a second insulating layer on the first metal diffusion suppressing layer, and a control electrode on the second insulating layer.Type: ApplicationFiled: February 9, 2015Publication date: September 17, 2015Inventors: Takashi FURUHASHI, Atsushi MURAKOSHI, Kenichiro TORATANI, Masayuki TANAKA, Yoshio OZAWA
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Patent number: 9087910Abstract: According to one embodiment, a nonvolatile semiconductor storage device includes a semiconductor substrate, a first insulating film formed on the semiconductor substrate, a charge accumulation film formed on the first insulating film, a second insulating film formed on the charge accumulation film, and a control electrode formed on a second insulating film, and one of the first and the second insulating film includes a layer containing nitrogen, a layer that is formed on the layer containing nitrogen and that includes a first oxygen containing aluminum atoms and oxygen atoms, and a layer that is formed on the layer including the first oxygen and that includes a second oxygen containing silicon atoms and oxygen atoms; and a concentration of the aluminum atoms is from 1E12 atoms/cm2 to 1E16 atoms/cm2.Type: GrantFiled: September 3, 2013Date of Patent: July 21, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Kenichiro Toratani, Masayuki Tanaka
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Patent number: 8987804Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a semiconductor region, a tunnel insulator provided above the semiconductor region, a charge storage insulator provided above the tunnel insulator, a block insulator provided above the charge storage insulator, a control gate electrode provided above the block insulator, and an interface region including a metal element, the interface region being provided at one interface selected from between the semiconductor region and the tunnel insulator, the tunnel insulator and the charge storage insulator, the charge storage insulator and the block insulator, and the block insulator and the control gate electrode.Type: GrantFiled: August 8, 2013Date of Patent: March 24, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Kenichiro Toratani, Masayuki Tanaka, Kazuhiro Matsuo
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Patent number: 8809935Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes: forming an underlayer film that contains atoms selected from the group consisting of aluminum, boron and alkaline earth metal; and forming a silicon oxide film on the underlayer film by a CVD method or an ALD method by use of a silicon source containing at least one of an ethoxy group, a halogen group, an alkyl group and an amino group, or a silicon source of a siloxane system.Type: GrantFiled: March 19, 2012Date of Patent: August 19, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Masayuki Tanaka, Kenichiro Toratani
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Patent number: 8784568Abstract: In one embodiment, a method of cleaning a semiconductor manufacturing apparatus includes supplying a cleaning gas for removing a deposition film deposited on an inside wall of a treatment chamber through a supply pipe of the treatment chamber so that a supply amount of the cleaning gas from the supply pipe per unit time is greater than an exhaust amount of the cleaning gas from an exhaust pipe of the treatment chamber per unit time. The method further includes supplying an inert gas to fill the supply pipe with the inert gas.Type: GrantFiled: March 18, 2011Date of Patent: July 22, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Kenichiro Toratani, Takashi Nakao
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Patent number: 8748967Abstract: An aspect of the present embodiment, there is provided a semiconductor device, including a semiconductor substrate, a first insulator above the semiconductor substrate, the first insulator containing tungsten, germanium and silicon, a charge storage film on the first insulator, a second insulator on the charge storage film and, a control gate electrode on the second insulator.Type: GrantFiled: February 27, 2013Date of Patent: June 10, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Kenichiro Toratani, Masayuki Tanaka
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Publication number: 20140061769Abstract: According to one embodiment, a nonvolatile semiconductor storage device includes a semiconductor substrate, a first insulating film formed on the semiconductor substrate, a charge accumulation film formed on the first insulating film, a second insulating film formed on the charge accumulation film, and a control electrode formed on a second insulating film, and one of the first and the second insulating film includes a layer containing nitrogen, a layer that is formed on the layer containing nitrogen and that includes a first oxygen containing aluminum atoms and oxygen atoms, and a layer that is formed on the layer including the first oxygen and that includes a second oxygen containing silicon atoms and oxygen atoms; and a concentration of the aluminum atoms is from 1E12 atoms/cm2 to 1E16 atoms/cm2.Type: ApplicationFiled: September 3, 2013Publication date: March 6, 2014Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kenichiro TORATANI, Masayuki TANAKA
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Publication number: 20140061756Abstract: A non-volatile semiconductor storage device disclosed in the embodiment has a semiconductor substrate, a first insulating film, a first charge storage film, a second insulating film, a second charge storage film, a third insulating film, and a control electrode. In this non-volatile semiconductor storage device, the first and second charge storage films comprise a metallic material, a semi-metallic material or a semiconductor material. One of the first, second, and third insulating films is a multi-layered insulating film formed by layering multiple insulating films. This non-volatile semiconductor storage device further has a film comprising of any one of an oxide film, nitride film, boride film, sulfide film, and carbide film that is in contact with one interface of the laminated insulating film and contains one type of atom selected from aluminum, boron, alkaline earth metal, and transition metal at a concentration in the range of 1E12 atoms/cm2 to 1E16 atoms/cm2.Type: ApplicationFiled: July 8, 2013Publication date: March 6, 2014Inventors: Masayuki TANAKA, Kenichiro TORATANI
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Publication number: 20130319473Abstract: An LPCVD apparatus is provided with a processing chamber and a reaction cooling apparatus. The reaction cooling apparatus is placed outside the processing chamber and is configured to generate hydrogen fluoride gas by reaction of hydrogen gas and fluorine gas and to cool the hydrogen fluoride gas. The hydrogen fluoride gas cooled by the reaction cooling apparatus is supplied into the processing chamber as a cleaning gas.Type: ApplicationFiled: August 6, 2013Publication date: December 5, 2013Applicant: Kabushiki Kaisha ToshibaInventors: Kenichiro Toratani, Fumiki Aiso, Takashi Nakao, Kazuhei Yoshinaga
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Publication number: 20130320426Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a semiconductor region, a tunnel insulator provided above the semiconductor region, a charge storage insulator provided above the tunnel insulator, a block insulator provided above the charge storage insulator, a control gate electrode provided above the block insulator, and an interface region including a metal element, the interface region being provided at one interface selected from between the semiconductor region and the tunnel insulator, the tunnel insulator and the charge storage insulator, the charge storage insulator and the block insulator, and the block insulator and the control gate electrode.Type: ApplicationFiled: August 8, 2013Publication date: December 5, 2013Applicant: Kabushiki Kaisha ToshibaInventors: Kenichiro Toratani, Masayuki Tanaka, Kazuhiro Matsuo
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Publication number: 20130264624Abstract: A semiconductor device fabrication method includes forming a tunnel insulating film on a substrate containing silicon, forming a floating gate on the tunnel insulating film, forming an integral insulating film on the floating gate, and forming a control gate on the integral insulating film. The floating gate is formed on the tunnel insulating film by forming a seed layer containing amorphous silicon on the tunnel insulating film, forming an impurity later containing adsorbed boron or germanium on the seed layer, and forming a cap layer containing silicon on the impurity layer.Type: ApplicationFiled: March 4, 2013Publication date: October 10, 2013Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Hirokazu ISHIDA, Kenichiro TORATANI
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Publication number: 20130256779Abstract: A method of manufacturing a semiconductor device comprising: forming a first insulating film on a semiconductor substrate; forming an adsorption film on the first insulating film; forming a first film containing germanium on the adsorption film; forming a second insulating film on the first film; forming a floating electrode film on the second insulating film; forming a third insulating film on the floating electrode film; and forming a gate electrode on the third insulating film.Type: ApplicationFiled: March 14, 2013Publication date: October 3, 2013Applicant: Kabushiki Kaisha ToshibaInventors: Keiichi SAWA, Tetsuya Kai, Shinji Mori, Kenichiro Toratani, Masayuki Tanaka
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Publication number: 20130248964Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a semiconductor substrate, a first insulation film formed on a semiconductor substrate, a charge storage film formed on the first insulation film, a second insulation film formed on the charge storage film, and a control electrode formed on the second insulation film. The first insulation film is formed on the semiconductor substrate, and has a lower layer film containing silicon, and an upper layer film formed on the lower layer film, the upper layer film having a concentration of transition metal atoms containing at least one of hafnium, titanium, zirconium, tantalum or lanthanum from 1e13 atoms/cm2 to 1e16 atoms/cm2 and is formed by either an oxide film, a nitride film, or an oxynitride film.Type: ApplicationFiled: March 5, 2013Publication date: September 26, 2013Applicant: Kabushiki Kaisha ToshibaInventors: Kenichiro TORATANI, Masayuki Tanaka
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Publication number: 20130241068Abstract: According to one embodiment, a method for forming a semiconductor device includes: forming a first underlayer film that contains a first atom selected from the group consisting of germanium, aluminum, tungsten, hafnium, titanium, tantalum, nickel, cobalt and alkaline earth metals; forming, on the first underlayer film, a second underlayer film that contains a second atom selected from the group consisting of germanium, aluminum, tungsten, hafnium, titanium, tantalum, nickel, cobalt and alkaline earth metals, the second atom being an atom not contained in the first underlayer film; and forming, on the second underlayer film, a silicon oxide film by a CVD or ALD method by use of a silicon source containing at least one of an ethoxy group, a halogen group, an alkyl group, and an amino group, or a silicon source of a siloxane system.Type: ApplicationFiled: August 29, 2012Publication date: September 19, 2013Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Masayuki TANAKA, Kenichiro Toratani, Kazuhiro Matsuo
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Publication number: 20130240972Abstract: An aspect of the present embodiment, there is provided a semiconductor device, including a semiconductor substrate, a first insulator above the semiconductor substrate, the first insulator containing tungsten, germanium and silicon, a charge storage film on the first insulator, a second insulator on the charge storage film and, a control gate electrode on the second insulator.Type: ApplicationFiled: February 27, 2013Publication date: September 19, 2013Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kenichiro TORATANI, Masayuki Tanaka
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Patent number: 8536699Abstract: In a manufacturing process of a semiconductor device by forming a structure film on a substrate in a reaction chamber of a manufacturing apparatus, cleaning inside the reaction chamber is performed. That is, a precoat film made of a silicon nitride film containing boron is deposited on an inner wall of the reaction chamber, a silicon nitride film not containing boron is formed as the structure film on the substrate in the reaction chamber, and the inner wall of the reaction chamber is dry etched to be cleaned. At this time, the dry etching is terminated after boron is detected in a gas exhausted from the reaction chamber.Type: GrantFiled: October 13, 2011Date of Patent: September 17, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Kenichiro Toratani, Takashi Nakao, Ichiro Mizushima