Patents by Inventor Kenji A. Sasaki

Kenji A. Sasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11894350
    Abstract: A microLED mass transfer stamping system includes a stamp substrate with an array of trap sites, each configured with a columnar-shaped recess to temporarily secure a keel extended from a bottom surface of a microLED. In the case of surface mount microLEDs, the keel is electrically nonconductive. In the case of vertical microLEDs, the keel is an electrically conductive second electrode. The stamping system also includes a fluidic assembly carrier substrate with an array of wells having a pitch separating adjacent wells that matches the pitch separating the stamp substrate trap sites. A display substrate includes an array of microLED pads with the same pitch as the trap sites. The stamp substrate top surface is pressed against the display substrate, with each trap site interfacing a corresponding microLED site, and the microLEDs are transferred. Fluidic assembly stamp substrates are also presented for use with microLEDs having keels or axial leads.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: February 6, 2024
    Assignee: e Lux, Inc.
    Inventors: Paul J. Schuele, Kenji Sasaki, Kurt Ulmer, Jong-Jan Lee
  • Publication number: 20240014296
    Abstract: In a semiconductor device, plural cells are disposed side by side on a substrate in a first direction. Each of the plural cells includes a bipolar transistor, an emitter electrode contained in a base layer of the bipolar transistor as viewed from above, and a base electrode. The bipolar transistors of the plural cells are connected in parallel with each other. Among the plural cells, the breakdown resistance of at least one second cell, which is other than a first cell disposed at each end, is higher than that of the first cell. It is possible to provide a semiconductor device that can reduce the deterioration of the breakdown resistance when flip-chip mounting is employed, as well as when face-up mounting is employed.
    Type: Application
    Filed: September 25, 2023
    Publication date: January 11, 2024
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Shigeki KOYA, Masao KONDO, Shaojun MA, Satoshi GOTO, Kenji SASAKI, Takayuki TSUTSUI, Kazuhito NAKAI
  • Patent number: 11869957
    Abstract: A compound semiconductor device comprises a heterojunction bipolar transistor including a plurality of unit transistors, a capacitor electrically connected between a RF input wire and a base wire for each unit transistor of the unit transistors, and a bump electrically connected to emitters of the unit transistors. The unit transistors are arranged in a first direction. The bump is disposed above the emitters of the unit transistors while extending in the first direction. The transistors include first and second unit transistors, the respective emitters of the first and second unit transistors being disposed on first and second sides, respectively, of a second direction, perpendicular to the first direction, with respect to a center line of the bump extending in the first direction. The capacitor is not covered by the bump, and respective lengths of the respective base wires connected respectively to the first and second unit transistors are different.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: January 9, 2024
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kenji Sasaki, Kingo Kurotani, Takashi Kitahara, Shigeki Koya
  • Patent number: 11871513
    Abstract: A cavity elongated in one direction is formed in a protective film covering the conductive pattern of the topmost conductive layer of a multilayer wiring substrate. The cavity exposes part of the conductive pattern. A first via-conductor extends downward from the conductive pattern of the topmost conductive layer at least until that of a second conductive layer. Second via-conductors extend downward from the conductive pattern of the second or third conductive layer at least until that of a conductive layer one below. As viewed from above, the first via-conductor and the cavity partially overlap each other. At least two second via-conductors are disposed to sandwich the cavity therebetween. The difference between the smallest gap between the cavity and the second via-conductor at one side and that between the cavity and the second via-conductor at the other side is smaller than the smallest gap between the cavity and the second via-conductors.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: January 9, 2024
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Masao Kondo, Shigeki Koya, Kenji Sasaki
  • Patent number: 11855051
    Abstract: A method is provided for the selective harvest of microLED devices from a carrier substrate. Defect regions are predetermined that include a plurality of adjacent defective microLED devices on a carrier substrate. A solvent-resistant binding material is formed overlying the predetermined defect regions and exposed adhesive is dissolved with an adhesive dissolving solvent. Non-defective microLED devices located outside the predetermined defect regions are separated from the carrier substrate while adhesive attachment is maintained between the microLED devices inside the predetermined defect regions and the carrier substrate. Methods are also provided for the dispersal of microLED devices on an emissive display panel by initially optically measuring a suspension of microLEDs to determine suspension homogeneity and calculate the number of microLEDs per unit volume.
    Type: Grant
    Filed: February 3, 2022
    Date of Patent: December 26, 2023
    Assignee: eLux, Inc.
    Inventors: Kenji Sasaki, Kurt Ulmer, Paul J. Schuele, Jong-Jan Lee
  • Patent number: 11784245
    Abstract: An electrically conductive sub-collector layer is provided in a surface layer portion of a substrate. A collector layer, a base layer, and an emitter layer are located within the sub-collector layer when viewed in plan. The collector layer is connected to the sub-collector layer. An emitter electrode and a base electrode are long in a first direction when viewed in plan. The emitter electrode overlaps the emitter layer. The base electrode and the emitter electrode are discretely located away from each other in a second direction orthogonal to the first direction. A collector electrode is located on one side in the second direction with respect to the emitter electrode and is not located on the other side when viewed in plan. A base line is connected to the base electrode in a manner so as to adjoin a portion other than longitudinal ends of the base electrode.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: October 10, 2023
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kenji Sasaki, Yasunari Umemoto, Shigeki Koya, Shinnosuke Takahashi, Masao Kondo
  • Publication number: 20230314979
    Abstract: A conductive roller includes: a core member including an outer surface along and about an axial line thereof; and a surface layer arranged along the outer surface of the core member. The surface layer includes a conductive portion formed of a conductive resin composition, and a surface roughness imparting material in a form of particles dispersed in the conductive portion. An average particle size of the surface roughness imparting material is in a range of 6 micrometers or greater and 10 micrometers or less. The number of particles of the surface roughness imparting material per unit area of the surface layer is in a range of 1.0×104 particles per mm2 or greater and 2.0×106 particles per mm2 or less. An average thickness of the surface layer is in a range of 3.0 micrometers or greater and 15.0 micrometers or less.
    Type: Application
    Filed: May 10, 2021
    Publication date: October 5, 2023
    Applicant: NOK CORPORATION
    Inventors: Shogo SUZUKI, Atsushi IKEDA, Satoshi FUKUOKA, Kenji SASAKI
  • Patent number: 11769702
    Abstract: An amplifier IC mounted on a multilayer board includes input, output, and common terminals. The multilayer board includes common, input, and output terminals on board side. These terminals are connected to the corresponding terminals on device side via bumps. On the lower surface of the multilayer board, a lower surface common terminal is arranged at a location overlapping the common terminal in plan view. First, second, and third via conductors are sequentially arranged toward the lower surface common terminal from the common terminal. An input via conductor is connected to the input terminal on board side. In plan view, the area of the first common via conductor is larger than any one of the areas of the second and third common via conductors and the input via conductor. In plan view, the area of bump of the common terminal is larger than the area of bump of the input terminal.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: September 26, 2023
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Shigeki Koya, Yoshimitsu Takenouchi, Kenji Sasaki, Masao Kondo
  • Publication number: 20230299726
    Abstract: A semiconductor device includes first and second members. A second surface of the second member is opposite to a first surface of the first member. A radio-frequency amplifier circuit is included in the second member. The first and second members are bonded to each other by an electrically conductive bonding member between the first and second surfaces. The radio-frequency amplifier circuit includes at least one power stage transistor, an input wire that is connected to the power stage transistor and supplies an input signal to the power stage transistor, and an input-side circuit element that is connected to the input wire and that includes at least one of a passive element, an active element, and an external connection terminal. The bonding member includes a first conductor pattern covering the power stage transistor in plan view. The input-side circuit element is disposed outside the first conductor pattern in plan view.
    Type: Application
    Filed: February 8, 2023
    Publication date: September 21, 2023
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Satoshi Goto, Masayuki Aoike, Takayuki Tsutsui, Kenji Sasaki
  • Patent number: 11762306
    Abstract: An electroconductive roll includes a core member, a rubber base material disposed around the core member, and a surface layer disposed around the rubber base material. The arithmetic mean peak curvature Spc of a surface of the surface layer is equal to or greater than 1,880 (1/mm), and is equal to or less than 14,024 (1/mm).
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: September 19, 2023
    Inventors: Kousuke Oura, Shogo Suzuki, Satoshi Fukuoka, Kenji Sasaki
  • Publication number: 20230288835
    Abstract: A conductive roller includes a base including an outer surface along and about an axial line thereof, and a surface layer arranged on the outer surface of the base. The surface layer includes particles. The ten-point height of irregularities Rz of the outer surface of the base is greater than or equal to 6.0 micrometers and less than or equal to 8.0 micrometers. A ten-point height of irregularities Rz of an outer surface of the surface layer is greater than or equal to 5.5 micrometers and less than or equal to 8.5 micrometers. The base included in the conductive roller preferably includes a core member and a conductive elastic layer arranged between the core member and the surface layer. The surface layer preferably includes a conductive portion including a resin material and a conductive agent.
    Type: Application
    Filed: May 10, 2021
    Publication date: September 14, 2023
    Applicant: NOK CORPORATION
    Inventors: Shogo SUZUKI, Satoshi FUKUOKA, Kenji SASAKI
  • Publication number: 20230288834
    Abstract: A conductive roller includes: a core member including an outer surface along and about an axial line thereof; and a surface layer arranged along the outer surface of the core member. The surface layer includes a conductive portion, and a surface roughness imparting material in a form of particles dispersed in the conductive portion. An average particle size of the surface roughness imparting material is in a range of 6 micrometers or greater and less than 10 micrometers. The number of particles of the surface roughness imparting material per unit area of the surface layer is in a range of 3.5×105 particles per mm2 or greater and 7.5×105 particles per mm2 or less. An average thickness of the surface layer is in a range of 0.2 micrometers or greater and 5.5 micrometers or less.
    Type: Application
    Filed: May 10, 2021
    Publication date: September 14, 2023
    Applicant: NOK CORPORATION
    Inventors: Shogo SUZUKI, Atsushi IKEDA, Satoshi FUKUOKA, Kenji SASAKI
  • Publication number: 20230281772
    Abstract: An imaging system includes an imaging device, a lighting device, a control part, and an output part. The imaging device images an object. The lighting device irradiates the object with light. The control part controls the lighting device so as to irradiate the object with light from irradiation directions in which directions of irradiating the object with light are different from one another, and causes the imaging device to image the object in each of the mutually different irradiation directions. The output part outputs the plurality of captured images captured by the imaging device to image processing device having a synthesis function of generating a composite image with reduced halation using the plurality of captured images.
    Type: Application
    Filed: June 17, 2021
    Publication date: September 7, 2023
    Inventors: TAKUTO ICHIKAWA, MASAAKI OCHI, KAZUMA HARAGUCHI, KENJI SASAKI
  • Patent number: 11731575
    Abstract: An airbag apparatus attachment mechanism includes a holder, a supporting member, an urging member, and a functional member. The holder is fastened to a metal core with a fastening member. The supporting member protrudes further forward than an airbag apparatus and is inserted into the holder. The urging member urges the airbag apparatus rearward. The functional member is attached to a part of the supporting member that is inserted in the holder. The functional member includes a spring portion that is thinner than a gap between the supporting member and the holder. The spring portion is disposed in the gap. The functional member is configured such that the spring portion is elastically deformed in a radial direction of the supporting member due to vibration of the airbag apparatus, thereby suppressing the vibration.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: August 22, 2023
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Kenji Sasaki, Kento Saito
  • Publication number: 20230261153
    Abstract: A method is provided for fabricating an encapsulated emissive element. Beginning with a growth substrate, a plurality of emissive elements is formed. The growth substrate top surface is conformally coated with an encapsulation material. The encapsulation material may be photoresist, a polymer, a light reflective material, or a light absorbing material. The encapsulant is patterned to form fluidic assembly keys having a profile differing from the emissive element profiles. In one aspect, prior to separating the emissive elements from the handling substrate, a fluidic assembly keel or post is formed on each emissive element bottom surface. In one variation, the emissive elements have a horizontal profile. The fluidic assembly key has horizontal profile differing from the emissive element horizontal profile useful in selectively depositing different types of emissive elements during fluidic assembly.
    Type: Application
    Filed: August 4, 2020
    Publication date: August 17, 2023
    Inventors: Kenji Sasaki, Paul J. Schuele
  • Publication number: 20230253377
    Abstract: A microLED mass transfer stamping system includes a stamp substrate with an array of trap sites, each configured with a columnar-shaped recess to temporarily secure a keel extended from a bottom surface of a microLED. In the case of surface mount microLEDs, the keel is electrically nonconductive. In the case of vertical microLEDs, the keel is an electrically conductive second electrode. The stamping system also includes a fluidic assembly carrier substrate with an array of wells having a pitch separating adjacent wells that matches the pitch separating the stamp substrate trap sites. A display substrate includes an array of microLED pads with the same pitch as the trap sites. The stamp substrate top surface is pressed against the display substrate, with each trap site interfacing a corresponding microLED site, and the microLEDs are transferred. Fluidic assembly stamp substrates are also presented for use with microLEDs having keels or axial leads.
    Type: Application
    Filed: April 20, 2023
    Publication date: August 10, 2023
    Inventors: Paul J Schuele, Kenji Sasaki, Kurt Ulmer, Jong-Jan Lee
  • Publication number: 20230244154
    Abstract: A developing roll used in an electrophotographic image forming apparatus has a metal core member, an elastic layer made of a rubber disposed around the core member, and a surface layer disposed around the elastic layer. The texture aspect ratio of the surface Str of the surface layer is equal to or greater than 0.55.
    Type: Application
    Filed: April 2, 2021
    Publication date: August 3, 2023
    Applicant: NOK CORPORATION
    Inventors: Kosuke OURA, Atsushi IKEDA, Kenji SASAKI
  • Patent number: 11715788
    Abstract: At least one transistor is arranged on a substrate. A collector layer and a base layer of the transistor compose a collector mesa having a substantially mesa shape and the collector mesa has side faces tilting with respect to the substrate so that the dimension of a top face in a first direction of a plane of the substrate is smaller than the dimension of a bottom face therein. A first insulating film covering the transistor is arranged on the substrate. A first-layer emitter line that extends from an area overlapped with the top face of the collector mesa to areas overlapped with at least part of the tilting side faces of the collector mesa in a plan view is arranged on the first insulating film. A second-layer emitter line and an emitter bump are arranged on the first-layer emitter line.
    Type: Grant
    Filed: August 11, 2021
    Date of Patent: August 1, 2023
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Kenji Sasaki
  • Patent number: 11714364
    Abstract: An electroconductive roll includes a core member, a rubber base material disposed around the core member, and a surface layer disposed around the rubber base material. The arithmetic mean peak curvature Spc of a surface of the surface layer is equal to or greater than 1,880 (1/mm), and is equal to or less than 14,024 (1/mm) The density of peaks Spd of the surface of the surface layer is equal to or greater than 93,406 (1/mm2), and is equal to or less than 151,476 (1/mm2). The surface area of the surface layer per unit projected area is equal to or greater than 1.255, and is equal to or less than 5.132.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: August 1, 2023
    Inventors: Kosuke Oura, Shogo Suzuki, Satoshi Hukuoka, Kenji Sasaki
  • Patent number: 11710735
    Abstract: On a single-crystal semiconductor substrate with an upper surface including a first direction in which an inverted mesa step extends and a second direction in which a forward mesa step extends in response to anisotropic etching in which an etching rate depends on crystal plane orientation, a bipolar transistor including a collector layer, a base layer, and an emitter layer that are epitaxially grown, and a base wire connected to the base layer are arranged. A step is provided at an edge of the base layer, and the base wire is extended from inside to outside of the base layer in a direction intersecting the first direction in a plan view. An intersection of the edge of the base layer and the base wire has a disconnection prevention structure that makes it difficult for step-caused disconnection of the base wire to occur.
    Type: Grant
    Filed: January 6, 2021
    Date of Patent: July 25, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kenji Sasaki, Yasuhisa Yamamoto