Patents by Inventor Kenji Harada
Kenji Harada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230154267Abstract: Entrance and exit of a person is efficiently managed by simple authentication and registration of entrance and exit using a communication terminal carried by the person.Type: ApplicationFiled: January 12, 2023Publication date: May 18, 2023Applicant: NEC CorporationInventors: Tomoaki NAKAO, Yukie HASEGAWA, Kenji HARADA, Kenichi URASAWA
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Publication number: 20230102420Abstract: A dispersion liquid contains a metal oxide particle surface-modified with a silane compound and a silicone compound, when a transmission spectrum of the metal oxide particles that are obtained by vacuum-drying the dispersion liquid is measured in a wavenumber range of 800 cm?1 or more and 3800 cm?1 or less with FT-IR, IA/IB?3.5 is satisfied (IA is a spectrum value at 3,500 cm?1 and IB is a spectrum value at 1,100 cm?1), and, when the dispersion liquid and methyl phenyl silicone are mixed such that a mass ratio of a total mass of the metal oxide particles and the surface-modifying material to a mass of methyl phenyl silicone becomes 30:70 and the hydrophobic solvent is removed, a viscosity is 9 Pa·s or less.Type: ApplicationFiled: March 24, 2021Publication date: March 30, 2023Applicant: SUMITOMO OSAKA CEMENT CO., LTD.Inventors: Tomomi ITO, Kenji HARADA, Takeshi OTSUKA
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Patent number: 11605257Abstract: Entrance and exit of a person is efficiently managed by simple authentication and registration of entrance and exit using a communication terminal carried by the person.Type: GrantFiled: June 10, 2021Date of Patent: March 14, 2023Assignee: NEC CORPORATIONInventors: Tomoaki Nakao, Yukie Hasegawa, Kenji Harada, Kenichi Urasawa
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Publication number: 20230073999Abstract: An object of the present invention is to provide a polynucleotide having a modification site in a translated region with translation activity retained. The object can be achieved by a polynucleotide containing a translated region from a start codon to a stop codon, in which the translated region contains n codons, and the n is a positive integer of 2 or more, each of the n codons contains first, second and third nucleotides, and the first nucleotides in at least two codons of the n codons are sugar modified nucleotides.Type: ApplicationFiled: December 25, 2020Publication date: March 9, 2023Applicants: National University Corporation Tokai National Higher Education and Research System, Kyowa Kirin Co., Ltd.Inventors: Hiroshi ABE, Hiroto IWAI, Masakazu HOMMA, Kana ASANO, Kenji HARADA, Junichiro YAMAMOTO, Fumikazu SHINOHARA, Keiichi MOTOSAWA, Yasuaki KIMURA, Kosuke NAKAMOTO
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Patent number: 11495678Abstract: A semiconductor device includes a semiconductor substrate, a transistor region, a diode region, a boundary trench gate, and a carrier control region. The boundary trench gate is provided in a boundary portion between the transistor region and the diode region. The carrier control region is provided as a surface layer of the semiconductor substrate at a position closer to the boundary trench gate than the source layer located between the boundary trench gate and the trench gate. A concentration of first conductivity type impurities contained in the carrier control region is higher than a concentration of the first conductivity type impurities contained in the source layer or a concentration of second conductivity type impurities contained in the carrier control region is lower than a concentration of the second conductivity type impurities contained in the source layer.Type: GrantFiled: May 12, 2021Date of Patent: November 8, 2022Assignee: Mitsubishi Electric CorporationInventors: Kenji Harada, Kakeru Otsuka, Hirofumi Oki
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Publication number: 20220352269Abstract: According to one embodiment, a display device comprising a base, a first insulating layer, a first lower electrode, a second lower electrode, a first wiring, a second insulating layer disposed on the first wiring, a first organic layer disposed on the first lower electrode, a second organic layer disposed on the second lower electrode, a first separation wall disposed on the second insulating layer, and an upper wiring disposed continuously on the first organic layer, the second organic layer, and the first separation wall, wherein the upper wiring is electrically connected to the first wiring via a contact hole that penetrates the first separation wall and the second insulating layer.Type: ApplicationFiled: April 5, 2022Publication date: November 3, 2022Applicant: Japan Display Inc.Inventors: Tetsuo MORITA, Sho YANAGISAWA, Kenji HARADA, Hiroshi TABATAKE, Hideyuki TAKAHASHI
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Publication number: 20220338013Abstract: An unauthorized communication detection method detects an unauthorized communication message on an in-facility network over which at least two devices including a first device and a second device are communicably connected, and includes: receiving, from the first device, a communication message transmitted from the first device to the second device; obtaining, when the communication message is received from the first device, first information indicating a state of at least one of (a) a person in a facility and (b) the at least two devices, and determining whether to execute processing pertaining to a device control command that controls the second device when the communication message received from the first device is a communication message including the device control command, the determining being performed based on the first information; and executing the processing pertaining to the device control command when the determining determines to execute the processing.Type: ApplicationFiled: June 24, 2022Publication date: October 20, 2022Applicant: Panasonic Intellectual Property Corporation of AmericaInventors: Manabu MAEDA, Tomoyuki HAGA, Yuji UNAGAMI, Naohisa NISHIDA, Masashi HISAI, Hitoshi TAHARA, Kenji HARADA, Takashi KURANO
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Publication number: 20220320261Abstract: According to one embodiment, a display device includes a first power line located at a first end portion of a non-display region, a second power line located at a second end portion, a first auxiliary line disposed at a corner portion of a display region, and a second auxiliary line disposed on a center portion side of the display region, wherein the first auxiliary line includes a first resistance adjustment portion that adjusts resistance of the first auxiliary line, the second auxiliary line includes a second resistance adjustment portion that adjusts resistance of the second auxiliary line, and a first length of the first resistance adjustment portion is longer than a second length of the second resistance adjustment portion.Type: ApplicationFiled: March 30, 2022Publication date: October 6, 2022Applicant: Japan Display Inc.Inventor: Kenji HARADA
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Publication number: 20220310003Abstract: A bootstrap circuit includes a first transistor including a gate electrode, a first and a second electrodes, a capacitor connected between the gate electrode and the second electrode, and a second transistor connected to the gate electrode. In a first period, the second transistor is turned on and the gate electrode is supplied with a first analog voltage, the first transistor is turned on, and the second electrode is supplied with a precharge voltage smaller than the first analog voltage from the first electrode. In a second period, the second transistor is turned off, the first electrode is supplied with a second analog voltage, the capacitor supplies a third analog voltage to the gate electrode in response to the first analog voltage and the second analog voltage, and the second electrode is supplied with the second analog voltage from the first electrode.Type: ApplicationFiled: March 17, 2022Publication date: September 29, 2022Applicant: Japan Display Inc.Inventors: Kenji HARADA, Tetsuo MORITA
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Publication number: 20220271115Abstract: According to one embodiment, a display device including a first lower electrode, a second lower electrode, a first wiring that is disposed between the first lower electrode and the second lower electrode, a second insulation layer that is disposed on the first wiring, a first organic layer that is disposed on the first lower electrode, a second organic layer that is disposed on the second lower electrode, a first upper electrode that is disposed on the first organic layer, a second upper electrode that is disposed on the second organic layer, and a second wiring that is disposed on the second insulation layer, opposed to the first wiring, and forms a capacitance between the first wiring and the second wiring.Type: ApplicationFiled: February 10, 2022Publication date: August 25, 2022Applicant: Japan Display Inc.Inventor: Kenji HARADA
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Publication number: 20220238513Abstract: An IGBT region includes: an n-type carrier accumulation layer provided to be in contact with the n?-type drift layer on the first main surface side of the n?-type drift layer and having a higher n-type impurity concentration than the n?-type drift layer, a p-type base layer provided between the n-type carrier accumulation layer and the first main surface, an n+-type emitter layer selectively provided in a surface layer portion of the p-type base layer, and a gate electrode provided to face the n+-type emitter layer and the p-type base layer with an interposition of an insulating film. A diode region includes a p-type anode layer provided between the n?-type drift layer and the first main surface and provided to a position deeper from the first main surface than a boundary between the n-type carrier accumulation layer and the n?-type drift layer.Type: ApplicationFiled: November 10, 2021Publication date: July 28, 2022Applicant: Mitsubishi Electric CorporationInventors: Munenori IKEDA, Tetsuya NITTA, Kenji HARADA
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Publication number: 20220231100Abstract: According to one embodiment, a display device includes a base, a first insulating layer, first and second lower electrodes, a second insulating layer including a first opening, a second opening, and a first trench, an organic layer including a light-emitting layer and an upper electrode, and the first trench includes a bottom surface and first and second side surfaces, an interval between the first side surface and the second side surface in an upper portion of the first trench is smaller than that in the bottom surface, and the organic layer includes a first portion covering the first lower electrode, a second portion covering the second lower electrode and a third portion disposed on the bottom surface.Type: ApplicationFiled: January 19, 2022Publication date: July 21, 2022Applicant: Japan Display Inc.Inventor: Kenji HARADA
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Publication number: 20220195202Abstract: Provided is a method for surface-modifying inorganic particles having a mixing step of mixing at least a surface-modifying material and the inorganic particles to obtain a liquid mixture and a dispersion step of dispersing the inorganic particles in the liquid mixture, in which a content of the inorganic particles in the liquid mixture is 10% by mass or more and 49% by mass or less, and a total content of the surface-modifying material and the inorganic particles in the liquid mixture is 65% by mass or more and 98% by mass or less.Type: ApplicationFiled: March 24, 2020Publication date: June 23, 2022Applicant: SUMITOMO OSAKA CEMENT CO., LTD.Inventors: Tomomi ITO, Kenji HARADA, Takeshi OTSUKA
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Patent number: 11359072Abstract: Provided is a dispersion liquid for sealing a light-emitting element containing metal oxide particles having a refractive index of 1.7 or higher and a surface-modifying material at least partially attached to the metal oxide particles, in which a particle diameter D50 of the metal oxide particles when a cumulative percentage of a scattering intensity distribution obtained by a dynamic light scattering method is 50% is 30 nm or more and 100 nm or less, and a value D50/D90 obtained by dividing the particle diameter D50 of the metal oxide particles when the cumulative percentage of the scattering intensity distribution is 50% by a particle diameter D90 of the metal oxide particles when the cumulative percentage of the scattering intensity distribution is 90% is 0.20 or more.Type: GrantFiled: August 1, 2018Date of Patent: June 14, 2022Assignee: SUMITOMO OSAKA CEMENT CO., LTD.Inventors: Kenji Harada, Takeshi Otsuka
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Publication number: 20220177709Abstract: A dispersion liquid according to the present invention is a dispersion liquid containing metal oxide particles which have been surface-modified with a silane compound and a silicone compound, in which, when the dispersion liquid is dried by vacuum drying to separate the metal oxide particles, and a transmission spectrum of the separated metal oxide particles is measured in a wavenumber range from 800 cm?1 to 3800 cm?1 with a Fourier transform infrared spectrophotometer, Formula (1) below: IA/IB?3.5 is satisfied (in the formula, “IA” represents a spectrum value at 3500 cm?1 and “IB” represents a spectrum value at 1100 cm?1).Type: ApplicationFiled: March 24, 2020Publication date: June 9, 2022Applicant: SUMITOMO OSAKA CEMENT CO., LTD.Inventors: Tomomi ITO, Kenji HARADA, Takeshi OTSUKA
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Publication number: 20220157900Abstract: According to one embodiment, a display device includes a base, a first insulating layer, a first pixel electrode on the first insulating layer in a pixel, a second pixel electrode on the first insulating layer in a dummy pixel, a second insulating layer on the first insulating layer, a first organic layer in the pixel and in contact with the first pixel electrode, a second organic layer in the dummy pixel, a partition wall on the second insulating layer and between the organic layers and a common electrode covering the organic layers and the partition wall. An end portion of the first organic layer is in contact with a side surface of the partition wall.Type: ApplicationFiled: November 16, 2021Publication date: May 19, 2022Applicant: Japan Display Inc.Inventors: Sho YANAGISAWA, Tetsuo MORITA, Kenji HARADA, Hiroshi TABATAKE, Hideyuki TAKAHASHI
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Publication number: 20220157899Abstract: According to one embodiment, a display device includes a substrate, first and second insulating layers, first and second pixel electrodes, first and second organic layers, first and second feed lines, first and second partitions, and a common electrode including first and second parts covering the first and second organic layers. The first organic layer is between the partitions. The second feed line and the second partition are located between the organic layers. The partitions are shaped such that a width of an upper part is greater than a width of a lower part. The first part is in contact with the first feed line between the first partition and the first organic layer.Type: ApplicationFiled: October 20, 2021Publication date: May 19, 2022Applicant: Japan Display Inc.Inventors: Sho YANAGISAWA, Tetsuo MORITA, Kenji HARADA, Hiroshi TABATAKE, Hideyuki TAKAHASHI
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Publication number: 20220109061Abstract: In plan view of an RC-IGBT, a boundary region has an occupancy rate of an n+-type source layer per unit area, the occupancy rate being smaller than an occupancy rate of the n+-type source layer per unit area in an IGBT region, and the boundary region has an occupancy rate of a p+-type contact layer per unit area, the occupancy rate being smaller than an occupancy rate of the p+-type contact layer per unit area in an IGBT region.Type: ApplicationFiled: July 16, 2021Publication date: April 7, 2022Applicant: Mitsubishi Electric CorporationInventors: Shinya SONEDA, Kenji HARADA, Kakeru OTSUKA
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Patent number: 11276773Abstract: A semiconductor device includes: first diode trench gates extending along a first main surface from a first end side of a cell region toward a second end side thereof opposite to the first end side, the first diode trench gates being disposed adjacent to each other at a first spacing; a boundary trench gate connected to end portions of the first diode trench gates and extending in a direction intersecting a direction of extension of the first diode trench gates; and second diode trench gates having end portions connected to the boundary trench gate and extending toward the second end side of the cell region.Type: GrantFiled: November 17, 2020Date of Patent: March 15, 2022Assignee: Mitsubishi Electric CorporationInventors: Shinya Soneda, Kenji Harada, Kakeru Otsuka
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Patent number: 11264245Abstract: Provided is a method for manufacturing a semiconductor device that improves the reliability of the semiconductor device under thermal stress and the assembly performance of the semiconductor device in manufacturing steps. The method includes the following: forming a first electrode by depositing a first conductive film onto one main surface of a semiconductor substrate and patterning the first conductive film; forming a first metal film corresponding to a pattern of the first electrode onto the first electrode; forming a second electrode by depositing a second conductive film onto the other main surface of the semiconductor substrate; forming a second metal film thinner than the first metal film onto the second electrode; and collectively forming a third metal film onto each of the first metal film and the second metal film by electroless plating.Type: GrantFiled: October 22, 2018Date of Patent: March 1, 2022Assignee: Mitsubishi Electric CorporationInventors: Shinya Soneda, Kenji Harada, Yosuke Nakata