Abstract: A display apparatus for a multidisk player including a memory for storing data of titles and disk kinds for a plurality of disks, and a controller for reading all the stored data and displaying the title and the disk kind of each disk on a display in accordance with the read data. Accordingly, a user can acknowledge the content of each disk at a glance without actually playing the disks. Furthermore, the user can conveniently distinguish an audio disk from a ROM disk and select a desired one of these disks.

Abstract: The object of the present invention is to provide a method for the manufacturing of a cutting material possessing excellent toughness and a high strength. The composition by weight of the Nickel alloy ingot, is chromium (Cr )14-23%, molybdenum (Mo) 14-20%, tungsten (W) 0.2-5%, iron (Fe) 0.2-7%, cobalt (Co) 0.2-2.5% with the remaining portion being made up of Ni and unavoidable impurities. After undergoing a solution heat treatment process, the Ni ingot undergoes plastic working, at a product ratio above 80%, followed by heating at a temperature of 500.degree.-600.degree. C. for longer than 30 minutes. Heating the alloy of the aforementioned composition at the above mentioned temperature promotes the precipitation of an intermetallic compound possessing a hardness greater than 57 on the HRC. The resulting superior cutting material is resistant to corrosion even when exposed to sea water.

Abstract: Liquid dentrifice compositions having an abrasive uniformly dispersed in aqueous medium have a low viscosity to maintain flow and stability with the lapse of time. The compositions contain 5-40% of silica or similar abrasive and an optional xanthan gum/polyacrylate binder such that they have a visocity of 20-180 poise at 25.degree.C. and a yield value of 1-60 Pa at 25.degree. C.

Abstract: In a single chip processor which can be provided with an extended program memory, a high-speed access can be executed without being restricted by the access time for the external program memory when an internal program memory is employed, by varying the effective instruction cycle, and thus a high-speed processing performance for a single chip processor of a stored program type can be attained.

Abstract: A plurality of external input information are added to a selecting circuit. The output of the selecting circuit is fed back as one of the external input information to the selecting circuit. The input signal groups are decoded, and are produced as control signals to specify the external input information in synchronism with clock signals. When the input select signal groups have the non-selection mode, the output that is fed back is necessarily selected.

Abstract: A semiconductor integrated circuit device includes a high voltage circuit and a high-speed signal processing circuit on the same chip. The high-speed signal processing circuit is made to have a stacked construction thereby to reduce the power consumption. It is also surrounded by ground potential lines so that it may be prevented from being adversely affected by a high voltage used in the high voltage circuit. Each of the high voltage elements composing the high voltage circuit has its principal surface formed at its base and collector regions with guard ring layers of the same conduction types as the respective ones of the high voltage elements. The guard ring layers extend over the elements and the semiconductor body and have lower impurity concentrations than the respective ones of the elements.

Abstract: A processor comprises first and second operation units, a first program memory which contains first microinstructions for controlling the first operation unit and second microinstructions for controlling at least the second operation units, a second program memory which contains microinstructions for controlling the second operation unit, first control means connected to the first program memory for controlling the first operation unit and the second operation unit, and second control means connected to the second program memory for controlling the second operation unit. In a normal mode, all operation units are under control of the first control means and in a multiprogram mode, the first operation unit is under control of the first control means and the second operation unit is under control of the second control means. These two mode operations are selected in accordance with the microinstructions stored in the first or second program memories.

Abstract: This invention relates to an information processing apparatus such as a digital signal processor and is applied particularly suitably to a digital filter.A plurality of data from initial value data till final value data relating to filtering coefficients of a digital filter are stored in a data memory, and are sequentially read out by an increment operation of an address arithmetic unit.A data arithmetic unit executes sequentially product and/or sum operations of a plurality of data that are sequentially read out and digital input signals that are sequentially inputted, to perform digital signal processing.The information processing apparatus is equipped particularly with means, which when an access address starts from an initial value, exceeds a final value and reaches a return address due to the increment operation, returns automatically the access address to the initial value. Therefore, a plurality of data stored in the data memory can be utilized repeatedly.

Abstract: A high-speed multiplier adapted to VLSI with a regularly arranged structure having a reduced number of addition stages. There is provided a carry save adder circuit wherein a time difference is imparted to signals input to full adders, in order to eliminate extra wait time in the signal propagation. That is, a carry signal of a full adder of two stages over is input with a speed increase of 1/2T.sub.FA.

Abstract: An LSI system is disclosed in which a plurality of status registers for indicating the internal status of the system are connected to each other so as to form a hierarchical structure and the contents of each of the remaining status registers other than one status register can be transferred to an output register through a bus, to make it possible to provide additional status registers in the system without increasing the number of address signals used and the number of pins connected to external address signal lines.

Abstract: A memory circuit is divided into a plurality of memory blocks, and an address register and a delay register are disposed in each memory block. Therefore, a read or write operation and a shifting operation of the address for storing data inside a memory matrix can be realized by a pipeline technique, and hence a memory circuit having a high processing speed is obtained.

Abstract: A video signal discriminating apparatus comprises a pulse width measuring part for measuring a pulse width of a vertical or horizontal synchronizing pulse within a composite synchronizing signal of a video signal, a period measuring part for measuring a period of the synchronizing pulse having the pulse width thereof measured in the pulse width measuring part, and a discriminating part for discriminating that the video signal exists when the measured pulse width and the measured period are within respective predetermined ranges and for discriminating that no video signal exists when the measured pulse width and the measured period are outside the respective predetermined ranges.

Abstract: An oral composition which comprises containing therein synthetic amorphous zirconosilicate containing 0.1 to 10 wt % of zirconium in terms of ZrO.sub.2 based on SiO.sub.2 and a fluoride compound. The fluoride compound is retained stable for a long period of time.

Abstract: An optical plummet mechanism for compensating an error due to an inclination of a surveying instrument comprises a first pendulum suspended in the instrument body interior, a second pendulum suspended in a perpendicular relation to the first pendulum, a first reflector provided on the first pendulum for reflecting light incident in the direction of a collimation axis of a collimation lens in the direction of a substantially horizontal collimation axis lying in the plane of swinging of the first pendulum, and a second reflector provided on the second pendulum and being a double reflecting surface reflector for reflecting light incident in the direction of a collimation axis lying the the plane of swinging of the first pendulum in the direction of a vertical collimation axis. Collimation errors due to inclination of the instrument body in two directions, i.e.

Abstract: A control program signal demodulating device comprises a control program demodulator for obtaining a demodulated output of a control program signal from a signal which is reproduced from a rotary recording medium which is recorded with at least the control program signal together with a video signal, where the control program signal indicates a control program including input and output commands and internal processing commands of an external device such as a computer which has a discriminating function and is coupled to a player which plays the rotary recording medium, a memory circuit for at least temporarily storing the demodulated output of the control program demodulator and producing the stored demodulated output, a selecting circuit for selectively producing data received from the memory circuit in response to a transmission request, an interface circuit for transmitting the data which is produced from the selecting circuit to the external device, and for receiving one or a plurality of control command

Abstract: A stable toothpaste composition which includes as an abrasive amorphous silica or silicate having a specific surface area of 5 to 100 m.sup.2 /g as measured by BET method with nitrogen adsorption and a specific surface area of 100 to 400 m.sup.2 /g as measured by BET method with water vapor adsorption.

Abstract: A thread-cutting device for a sewing machine comprises a cutter having a cutting edge and a thread guiding member which holds the cutter. The thread guiding member is formed with thread guiding edges which obliquely cross the cutting edge of the cutter, and leads the threads between its two parallel thread guiding edges and the cutting edge of the cutter. A crossing point between the thread guiding member and the cutting edge of the cutter is adjustable.

Abstract: A semiconductor memory having memory cells in each of which emitter terminals and first collector terminals of two IIL unit circuits are cross-connected to each other, injector regions and a common emitter region of the two IIL unit circuits are respectively connected to upper and lower word lines, and second collectors of the IIL unit circuits are respectively connected to a pair of bit lines that are respectively connected through load elements to a power source higher in voltage than the lower word line. This serves to hold the bit line potential higher than the lower word line potential to ensure that transistors formed by the second collectors, the emitters and the bases are inversely operated to prevent information loss during a read operation.

Abstract: A dentifrice composition having an excellent storage-stability which comprises a zirconium-bonded synthetic amorphous silicate (zirconosilicate) with a zirconium content of 0.1 to 10% by weight as ZrO.sub.2 based on SiO.sub.2 and a dentifrice vehicle containing water, humectant and flavor, and by adjusting the refractive index of the vehicle substantially identical with that of the silicate, the dentifrice composition can be made transparent.

Abstract: A semiconductor integrated circuit includes low voltage operation circuitries such as I.sup.2 L and high voltage operation circuitries operating at a higher voltage than the low voltage operation circuitries. Both of the low and high voltage operation circuitries are implemented in a single semiconductor chip in coexistence with each other. The low voltage operation circuitries are disposed in constant current paths in the high voltage operation circuitries so that the currents once used by the high voltage operation circuits are utilized again by the low voltage operation circuitries. Power dissipation of the whole integrated circuit is thus reduced significantly.