Patents by Inventor Kenji Kobae

Kenji Kobae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020037363
    Abstract: A resin coating method for applying resin to a predetermined region of a wiring board includes the steps of imaging an external appearance of the resin extruded from a resin application device; and automatically adjusting an amount of the resin extruded from the resin application device based on the external appearance of the resin obtained in the imaging step.
    Type: Application
    Filed: March 20, 2001
    Publication date: March 28, 2002
    Inventors: Shunji Baba, Takatoyo Yamakami, Norio Kainuma, Kenji Kobae, Hidehiko Kira, Hiroshi Kobayashi
  • Publication number: 20010040298
    Abstract: A wafer receiving conductive input/output bumps on the upward front side is placed on a platen. An underfill material sheet, adhered to the surface of the thin film tape, is superposed on the front side of the wafer. The underfill material sheet is forced to soften. When the underfill material sheet is urged against the wafer, the input/output bumps is allowed to penetrate through the underfill material sheet. After the underfill material is hardened, the thin film tape is peeled off from the hardened underfill material sheet. The underfill material can thus be supplied commonly to a large number of individual semiconductor chips included in the wafer. As compared with the case where the underfill material is supplied separately to the individual semiconductor chips, the working time can greatly be shortened.
    Type: Application
    Filed: January 4, 2001
    Publication date: November 15, 2001
    Inventors: Shunji Baba, Takatoyo Yamakami, Norio Kainuma, Kenji Kobae, Hidehiko Kira, Hiroshi Kobayashi
  • Publication number: 20010011774
    Abstract: A method of mounting a semiconductor device having bumps on a board having pads so that each of the bumps is joined to a corresponding one of the pads is provided. Adhesive to be hardened by heat is provided between the semiconductor device and the board. The method includes the steps of pressing the bumps of the semiconductor device on the pads of the board, and heating a portion in which each of the bumps and a corresponding one of the pads are in contact with each other. A pressure of the bumps to the pads reaches a predetermined value before a temperature of the adhesive to which heat is supplied in the above step reaches a temperature at which the adhesive is hardened.
    Type: Application
    Filed: March 14, 2001
    Publication date: August 9, 2001
    Applicant: Fujitsu Limited
    Inventors: Kazuhisa Tsunoi, Hidehiko Kira, Shunji Baba, Akira Fujii, Toshihiro Kusagaya, Kenji Kobae, Norio Kainuma, Naoki Ishikawa, Satoshi Emoto
  • Patent number: 6240634
    Abstract: In a method of production of a multichip package module, rough-pitch bare chips are positioned at first locations on a printed-circuit board, and the rough-pitch bare chips are temporarily attached to the board at the first locations. The rough-pitch bare chips are mounted on the board at the same time by applying heat and pressure to the rough-pitch bare chips simultaneously. A respective one of fine-pitch bare chips is positioned at a respective one of second locations on the board other than the first locations, and the respective one of the fine-pitch bare chips is mounted on the board by applying heat and pressure to the fine-pitch bare chips individually, in order to produce the multichip package module.
    Type: Grant
    Filed: December 14, 1999
    Date of Patent: June 5, 2001
    Assignee: Fujitsu Limited
    Inventors: Hidehiko Kira, Kenji Kobae, Norio Kainuma, Naoki Ishikawa, Satoshi Emoto
  • Patent number: 6122823
    Abstract: In a method of production of a multichip package module, rough-pitch bare chips are positioned at first locations on a printed-circuit board, and the rough-pitch bare chips are temporarily attached to the board at the first locations. The rough-pitch bare chips are mounted on the board at the same time by applying heat and pressure to the rough-pitch bare chips simultaneously. A respective one of fine-pitch bare chips is positioned at a respective one of second locations on the board other than the first locations, and the respective one of the fine-pitch bare chips is mounted on the board by applying heat and pressure to the fine-pitch bare chips individually, in order to produce the multichip package module.
    Type: Grant
    Filed: September 23, 1999
    Date of Patent: September 26, 2000
    Assignee: Fujitsu Limited
    Inventors: Hidehiko Kira, Kenji Kobae, Norio Kainuma, Naoki Ishikawa, Satoshi Emoto
  • Patent number: 6006426
    Abstract: In a method of production of a multichip package module, rough-pitch bare chips are positioned at first locations on a printed-circuit board, and the rough-pitch bare chips are temporarily attached to the board at the first locations. The rough-pitch bare chips are mounted on the board at the same time by applying heat and pressure to the rough-pitch bare chips simultaneously. A respective one of fine-pitch bare chips is positioned at a respective one of second locations on the board other than the first locations, and the respective one of the fine-pitch bare chips is mounted on the board by applying heat and pressure to the fine-pitch bare chips individually, in order to produce the multichip package module.
    Type: Grant
    Filed: February 19, 1998
    Date of Patent: December 28, 1999
    Assignee: Fujitsu Limited
    Inventors: Hidehiko Kira, Kenji Kobae, Norio Kainuma, Naoki Ishikawa, Satoshi Emoto