Abstract: According to one embodiment, a memory device includes: a first layer stack provided in a first area of a substrate; second and third layer stacks provided in a second area of the substrate; a memory cell provided in the first layer stack; a first mark portion provided in the second layer stack; a second mark portion provided in the third layer stack; and a first portion provided between the second layer stack and the third layer stack.

Abstract: According to one embodiment, a memory device includes: a first layer stack provided in a first area of a substrate; second and third layer stacks provided in a second area of the substrate; a memory cell provided in the first layer stack; a first mark portion provided in the second layer stack; a second mark portion provided in the third layer stack; and a first portion provided between the second layer stack and the third layer stack.

Abstract: According to one embodiment, there is provided a measurement method. The method includes acquiring layer information related to a plurality of layers to be superimposed for each of a plurality of shot regions on a substrate. The method includes dividing the plurality of shot regions into a plurality of groups corresponding to a layer attribute based on the acquired layer information. The method includes deciding a measurement condition of a measuring apparatus for each of the plurality of groups. The plurality of layers are sequentially stacked on the substrate to manufacture a semiconductor device.

Abstract: According to one embodiment, there is provided a measurement method. The method includes acquiring layer information related to a plurality of layers to be superimposed for each of a plurality of shot regions on a substrate. The method includes dividing the plurality of shot regions into a plurality of groups corresponding to a layer attribute based on the acquired layer information. The method includes deciding a measurement condition of a measuring apparatus for each of the plurality of groups. The plurality of layers are sequentially stacked on the substrate to manufacture a semiconductor device.

Abstract: According to one embodiment, a mold includes a base, a first concave pattern, a second concave pattern, and a third concave pattern. The base includes a first surface and a pedestal projecting from the first surface. The pedestal includes a first region and a second region disposed outside the first region. The first concave pattern is formed in the first region. The second concave pattern is formed in the second region. The third concave pattern extends from the first region to the second region.

Abstract: According to one embodiment, there is provided a manufacturing method of a semiconductor device. The method includes forming a first guard ring around a first chip region on a semiconductor wafer. The method includes forming a second guard ring around a second chip region on the semiconductor wafer. The method includes mechanically connecting the first guard ring with the second guard ring through a joist structure.

Abstract: According to one embodiment, an inscribed figure as circle or an oval inscribed in a rectangular pattern of designed layout data is calculated, a difference in area between a lithographic shape corresponding to the rectangular pattern and the inscribed figure is calculated, and it is determined whether the difference in area satisfies a predetermined specification.

Abstract: According to one embodiment, there is provided a manufacturing method of a semiconductor device. The method includes forming a first guard ring around a first chip region on a semiconductor wafer. The method includes forming a second guard ring around a second chip region on the semiconductor wafer. The method includes mechanically connecting the first guard ring with the second guard ring through a joist structure.

Abstract: A manufacturing method of a semiconductor device that can reduce warpage during wafer processing. The method includes forming a first guard ring around a first chip region on a semiconductor wafer. The method includes forming a second guard ring around a second chip region on the semiconductor wafer. The method includes mechanically connecting the first guard ring with the second guard ring through a joist structure.

Abstract: According to one embodiment, an inscribed figure as circle or an oval inscribed in a rectangular pattern of designed layout data is calculated, a difference in area between a lithographic shape corresponding to the rectangular pattern and the inscribed figure is calculated, and it is determined whether the difference in area satisfies a predetermined specification.

Abstract: According to one embodiment, there is provided a manufacturing method of a semiconductor device. The method includes forming a first guard ring around a first chip region on a semiconductor wafer. The method includes forming a second guard ring around a second chip region on the semiconductor wafer. The method includes mechanically connecting the first guard ring with the second guard ring through a joist structure.

Abstract: A steering system including a steering member provided in a vehicle and configured to be rotated, an adjustment apparatus configured to adjust a rotary direction vibration of the steering member, and a steering control apparatus configured to control the adjustment apparatus, in accordance with an operating condition of the vehicle, so as to adjust the vibration.

Abstract: According to one embodiment, a mold includes a base, a first concave pattern, a second concave pattern, and a third concave pattern. The base includes a first surface and a pedestal projecting from the first surface. The pedestal includes a first region and a second region disposed outside the first region. The first concave pattern is formed in the first region. The second concave pattern is formed in the second region. The third concave pattern extends from the first region to the second region.

Abstract: In a method for forming a pattern according to an embodiment, a first guide pattern and a second guide pattern for induced self organization of a DSA material are formed on substrate. On a first DSA condition, a first phase-separated pattern having regularity with respect to the first guide pattern is formed, and a first pattern is formed by processing the lower layer side. Subsequently, on a second DSA condition, a second phase-separated pattern having regularity with respect to the second guide pattern is formed, and a second pattern is formed by processing the lower layer side.

Abstract: In a method for forming a pattern according to an embodiment, a first guide pattern and a second guide pattern for induced self organization of a DSA material are formed on substrate. On a first DSA condition, a first phase-separated pattern having regularity with respect to the first guide pattern is formed, and a first pattern is formed by processing the lower layer side. Subsequently, on a second DSA condition, a second phase-separated pattern having regularity with respect to the second guide pattern is formed, and a second pattern is formed by processing the lower layer side.

Abstract: The disclosed aspects relate to controlling density of photomasks. One or more unprintable auxiliary patterns can be placed near a mask feature as well as onto a location of a feature of the main pattern. If a density is measured and is not within an acceptable density range, one or more printable auxiliary patterns can be replaced with unprintable auxiliary patterns and/or one or more unprintable auxiliary patterns can be replaced with printable auxiliary patterns. The disclosed aspects can be utilized to create a photomask and/or a semiconductor device, such as a large scale integrated circuit device, that comprises the photomask.

Abstract: A steering system including a steering member provided in a vehicle and configured to be rotated, an adjustment apparatus configured to adjust a rotary direction vibration of the steering member, and a steering control apparatus configured to control the adjustment apparatus, in accordance with an operating condition of the vehicle, so as to adjust the vibration.

Abstract: A pattern data generation method according to an example of the present invention includes based on design pattern data of a circuit including a plurality of MIS transistors having the same gate size, identifying types of the plurality of MIS transistors, setting size specs for gate patterns of the plurality of MIS transistors, the size specs being different for different types of the MIS transistors, and verifying whether gate patterns of the MIS transistors predicted by simulation using mask pattern data for forming the MIS transistors satisfy the size specs.

Abstract: A specification of a layout of a layout pattern arranged on a layer is set based on three-dimensional structures of layers of a semiconductor integrated circuit. It is verified whether a layout pattern formed on a wafer based on design layout data subjected to proximity correction satisfies the specification.

Abstract: A system and method of leveling the topography of a semiconductor wafer surface is presented. The system may induce low-order lens aberration to control the focal plane dynamically. The system may include a leveling sensor which measures the changes in topography on the surface, as well as an analyzer to determine the aberration to be induced. In addition, the system may include a controller that dynamically adjusts at least one lens to induce such aberration. In another arrangement, the system may control the focal plane by dividing the exposure slit into smaller slits. In this arrangement, the analyzer may be used to determine the appropriate number of divisions to make to produce a focal plane that closely matches the surface of the wafer. In addition, the controller may adjust the stage height and tilt for each division to produce such a focal plane.