Patents by Inventor Kenji Kozakai

Kenji Kozakai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7283408
    Abstract: A nonvolatile memory apparatus which need not compare an access address with a faulty address every time for rescuing from any fault is to be provided. The apparatus has memory arrays, data registers for inputting and outputting data to and from the memory arrays, and control circuits. The control circuits, after transferring a plurality of sets of data from the memory arrays to the data registers in response to an instruction to read data, take out rescuing data out of the plurality of sets of data transferred to the data registers, and perform processing to replace with the taken-out rescuing data corresponding faulty addresses on the data register to enable the data on the data register to be supplied to the outside. When any faulty data in the read data are to be replaced with rescuing data on any data register to which data have been transferred from any memory array, read access addresses need not be checked whether or not they are faulty every time an access address is supplied from outside.
    Type: Grant
    Filed: June 23, 2005
    Date of Patent: October 16, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Tsutomu Nakajima, Satoshi Noda, Kenji Kozakai, Atsushi Tokairin
  • Publication number: 20070206418
    Abstract: For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate.
    Type: Application
    Filed: May 8, 2007
    Publication date: September 6, 2007
    Inventors: Kenji Kozakai, Takeshi Nakamura, Tatsuya Ishii, Motoyasu Tsunoda, Shinya Iguchi, Junichi Maruyama
  • Patent number: 7230859
    Abstract: For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate.
    Type: Grant
    Filed: January 12, 2006
    Date of Patent: June 12, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Kenji Kozakai, Takeshi Nakamura, Tatsuya Ishii, Motoyasu Tsunoda, Shinya Iguchi, Junichi Maruyama
  • Patent number: 7116578
    Abstract: In a card storage device containing a non-volatile memory and a buffer memory, the buffer memory includes a plurality of banks. Data is transferred sequentially from a host CPU to the banks of the buffer memory, data is transferred to the non-volatile memory from a bank that becomes full, a write operation is started when one unit of data to be written into the non-volatile memory at a time has been transferred and, without waiting for the data to be written, the next write data is transferred from the host CPU to a bank from which write data has been transferred.
    Type: Grant
    Filed: March 11, 2004
    Date of Patent: October 3, 2006
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Motoki Kanamori, Takayuki Tamura, Kenji Kozakai, Atsushi Shikata, Shinsuke Asari
  • Publication number: 20060114726
    Abstract: For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate.
    Type: Application
    Filed: January 12, 2006
    Publication date: June 1, 2006
    Inventors: Kenji Kozakai, Takeshi Nakamura, Tatsuya Ishii, Motoyasu Tsunoda, Shinya Iguchi, Junichi Maruyama
  • Patent number: 7012845
    Abstract: For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: March 14, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Kenji Kozakai, Takeshi Nakamura, Tatsuya Ishii, Motoyasu Tsunoda, Shinya Iguchi, Junichi Maruyama
  • Publication number: 20060039230
    Abstract: An object of the present invention is to provide a semiconductor memory device capable of preventing a defect caused by falling of a word line and deterioration in patterning precision due to disturbance of the pitch of word lines at an end of a memory block. Plural dummy word lines are disposed at an end of a memory block, a word driver is mounted for the dummy word line to control the threshold voltage of a dummy memory cell formed below the dummy word line. Also at the time of operating a memory area for storing data from the outside, a bias is applied to the dummy word line. The invention can prevent a defect caused by falling of a word line and deterioration in patterning precision due to disturbance of the pitches of word lines at an end of a memory block, and realize high yield and reliably operation.
    Type: Application
    Filed: July 14, 2005
    Publication date: February 23, 2006
    Inventors: Hideaki Kurata, Yoshihiro Ikeda, Masahiro Shimizu, Kenji Kozakai, Satoshi Noda
  • Patent number: 7002853
    Abstract: A memory card (1) includes an electrically rewritable non-volatile memory (4), a data processor (3) having a function of executing instructions, and managing the allocation of file data in the non-volatile memory, an interface control circuit (2) having a function of establishing an external interface, for controlling the execution of instructions by the data processor in response to external commands and for controlling access to the non-volatile memory and a buffer memory (7) for temporarily storing the file data. The interface control circuit includes command control means for decoding a first command externally supplied and for instructing the data processor to fetch an instruction from the buffer memory and to operate.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: February 21, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Kenji Kozakai, Yuusuke Jono, Motoki Kanamori, Kazunori Furusawa, Atsushi Shikata, Yosuke Yukawa
  • Publication number: 20060026489
    Abstract: To provide a technique which enables a load on a controller to be reduced by rapidly detecting n-bit errors during writing/erasing on a chip in ECC in a nonvolatile memory. A flash memory of the present invention, which is a nonvolatile memory that includes plural electrically erasable and writable nonvolatile memory cells and performs write-and-verify processing in a write operation on the nonvolatile memory cells, includes an ECC determination circuit that counts the number of bits of write error detected in the write-and-verify processing, and outputs the information, and a status register for holding pass/fail information of the write operation and the information about the number of bits of write error outputted from the ECC determination circuit.
    Type: Application
    Filed: July 18, 2005
    Publication date: February 2, 2006
    Inventors: Satoshi Noda, Kenji Kozakai, Toru Matsushita, Yusuke Jono
  • Publication number: 20060023554
    Abstract: A read command having designated a bank, can be inputted from outside. A read command having designated a bank can be inputted from outside while an operation for reading from a memory array to a data buffer is being performed at the bank. Further, a read command having designated a bank is inputted from outside, and a buffer read command having designated a bank is inputted from outside while an operation for reading from a memory array to a data buffer is being performed at the bank, whereby reading from the data buffer of the bank to the outside is enabled.
    Type: Application
    Filed: June 28, 2005
    Publication date: February 2, 2006
    Inventors: Toru Matsushita, Kenji Kozakai, Hajime Tanabe, Takashi Horii
  • Publication number: 20060002199
    Abstract: A nonvolatile memory apparatus which need not compare an access address with a faulty address every time for rescuing from any fault is to be provided. The apparatus has memory arrays, data registers for inputting and outputting data to and from the memory arrays, and control circuits. The control circuits, after transferring a plurality of sets of data from the memory arrays to the data registers in response to an instruction to read data, take out rescuing data out of the plurality of sets of data transferred to the data registers, and perform processing to replace with the taken-out rescuing data corresponding faulty addresses on the data register to enable the data on the data register to be supplied to the outside. When any faulty data in the read data are to be replaced with rescuing data on any data register to which data have been transferred from any memory array, read access addresses need not be checked whether or not they are faulty every time an access address is supplied from outside.
    Type: Application
    Filed: June 23, 2005
    Publication date: January 5, 2006
    Inventors: Tsutomu Nakajima, Satoshi Noda, Kenji Kozakai, Atsushi Tokairin
  • Publication number: 20050262292
    Abstract: A memory card (1) includes an electrically rewritable non-volatile memory (4), a data processor (3) having a function of executing instructions, and managing the allocation of file data in the non-volatile memory, an interface control circuit (2) having a function of establishing an external interface, for controlling the execution of instructions by the data processor in response to external commands and for controlling access to the non-volatile memory and a buffer memory (7) for temporarily storing the file data. The interface control circuit includes command control means for decoding a first command externally supplied and for instructing the data processor to fetch an instruction from the buffer memory and to operate.
    Type: Application
    Filed: July 18, 2005
    Publication date: November 24, 2005
    Inventors: Kenji Kozakai, Yuusuke Jono, Motoki Kanamori, Kazunori Furusawa, Atsushi Shikata, Yosuke Yukawa
  • Publication number: 20050141300
    Abstract: For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate.
    Type: Application
    Filed: February 9, 2005
    Publication date: June 30, 2005
    Inventors: Kenji Kozakai, Takeshi Nakamura, Tatsuya Ishii, Motoyasu Tsunoda, Shinya Iguchi, Junichi Maruyama
  • Patent number: 6868032
    Abstract: For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate.
    Type: Grant
    Filed: August 10, 2004
    Date of Patent: March 15, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Kenji Kozakai, Takeshi Nakamura, Tatsuya Ishii, Motoyasu Tsunoda, Shinya Iguchi, Junichi Maruyama
  • Publication number: 20050007860
    Abstract: For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate.
    Type: Application
    Filed: August 10, 2004
    Publication date: January 13, 2005
    Inventors: Kenji Kozakai, Takeshi Nakamura, Tatsuya Ishii, Motoyasu Tsunoda, Shinya Iguchi, Junichi Maruyama
  • Publication number: 20040236910
    Abstract: A memory card (1) includes an electrically rewritable non-volatile memory (4), a data processor (3) having a function of executing instructions, and managing the allocation of file data in the non-volatile memory, an interface control circuit (2) having a function of establishing an external interface, for controlling the execution of instructions by the data processor in response to external commands and for controlling access to the non-volatile memory and a buffer memory (7) for temporarily storing the file data. The interface control circuit includes command control means for decoding a first command externally supplied and for instructing the data processor to fetch an instruction from the buffer memory and to operate.
    Type: Application
    Filed: June 24, 2004
    Publication date: November 25, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Kenji Kozakai, Yuusuke Jono, Motoki Kanamori, Kazunori Furusawa, Atsushi Shikata, Yosuke Yukawa
  • Publication number: 20040174742
    Abstract: In a card storage device containing a non-volatile memory and a buffer memory, the buffer memory includes a plurality of banks. Data is transferred sequentially from a host CPU to the banks of the buffer memory, data is transferred to the non-volatile memory from a bank that becomes full, a write operation is started when one unit of data to be written into the non-volatile memory at a time has been transferred and, without waiting for the data to be written, the next write data is transferred from the host CPU to a bank from which write data has been transferred.
    Type: Application
    Filed: March 11, 2004
    Publication date: September 9, 2004
    Applicants: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Motoki Kanamori, Takayuki Tamura, Kenji Kozakai, Atsushi Shikata, Shinsuke Asari
  • Patent number: 6788575
    Abstract: For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate. The nonvolatile memory is provided with a replacing function to replace a group of memory cells including defective memory cells which are incapable of normal writing or erasion with a group of memory cells including no defective memory cell, a numbers of rewrites averaging function to grasp the number of data rewrites in each group of memory cells and to so perform replacement of memory cell groups that there may arise no substantial difference in the number of rewrites among a plurality of memory cell groups, and an error correcting function to detect and correct any error in data stored in the memory array.
    Type: Grant
    Filed: September 23, 2003
    Date of Patent: September 7, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Kenji Kozakai, Takeshi Nakamura, Tatsuya Ishii, Motoyasu Tsunoda, Shinya Iguchi, Junichi Maruyama
  • Patent number: 6731537
    Abstract: In a card storage device containing a non-volatile memory and a buffer memory, the buffer memory includes a plurality of banks. Data is transferred sequentially from a host CPU to the banks of the buffer memory, data is transferred to the non-volatile memory from a bank that becomes full, a write operation is started when one unit of data to be written into the non-volatile memory at a time has been transferred and, without waiting for the data to be written, the next write data is transferred from the host CPU to a bank from which write data has been transferred.
    Type: Grant
    Filed: February 26, 2002
    Date of Patent: May 4, 2004
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Motoki Kanamori, Takayuki Tamura, Kenji Kozakai, Atsushi Shikata, Shinsuke Asari
  • Publication number: 20040057316
    Abstract: For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate.
    Type: Application
    Filed: September 23, 2003
    Publication date: March 25, 2004
    Applicant: Renesas Technology Corp.
    Inventors: Kenji Kozakai, Takeshi Nakamura, Tatsuya Ishii, Motoyasu Tsunoda, Shinya Iguchi, Junichi Maruyama