Patents by Inventor Kenji Nanba

Kenji Nanba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8610269
    Abstract: [Problem] A semiconductor device which achieves a fine pitch, a high throughput and a high connection reliability, especially in flip-chip mounting is provided. A method for manufacturing the semiconductor device and a circuit device using the semiconductor device are also provided. [Means for solving the problem] The semiconductor device has: an electrode; an insulating part having an opening on the electrode; a protruding part formed on the electrode; a protecting part which is formed at the periphery of the protruding part and electrically isolates the protruding part; and a bonding part which is formed on the protecting part by being spaced apart from the protruding part. An upper surface of the protruding part, an upper surface of the protecting part, and an upper surface of the bonding part form the same plane.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: December 17, 2013
    Assignee: NEC Corporation
    Inventor: Kenji Nanba
  • Publication number: 20120104602
    Abstract: [Problem] A semiconductor device which achieves a fine pitch, a high throughput and a high connection reliability, especially in flip-chip mounting is provided. A method for manufacturing the semiconductor device and a circuit device using the semiconductor device are also provided. [Means for solving the problem] The semiconductor device has: an electrode; an insulating part having an opening on the electrode; a protruding part formed on the electrode; a protecting part which is formed at the periphery of the protruding part and electrically isolates the protruding part; and a bonding part which is formed on the protecting part by being spaced apart from the protruding part. An upper surface of the protruding part, an upper surface of the protecting part, and an upper surface of the bonding part form the same plane.
    Type: Application
    Filed: June 23, 2010
    Publication date: May 3, 2012
    Inventor: Kenji Nanba
  • Publication number: 20090219797
    Abstract: Pulses that are generated from multiple analog input signals are sampled, and signal elements contained in the analog signals are extracted accurately using the said sampling pulses. Binarization circuits where analog input signals A, B, C, and D are converted into pulse signals; a logic operation circuit that generates a sampling pulse upon receiving the input of the 4 pulse signals; and a sample-and-hold circuit samples and holds an input RF signal based on the sampling pulse in order to extract accurately signal elements contained in said RF signal by means of sampling of the RF signal.
    Type: Application
    Filed: May 8, 2008
    Publication date: September 3, 2009
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Masayuki Tahara, Kenji Nanba, Tetsuya Nishiyama
  • Publication number: 20030210956
    Abstract: A method for purifying a layer of contaminated soil is provided, including the following steps: (a) preparing an injection well for injecting a fluid which has a purification capability utilizing one of physical action, chemical reaction, metabolism of microbes and promotion thereof and highly pressurized washing into the layer and (b) injecting the fluid under a high pressure at which one of the physical action, chemical reaction, metabolism of microbes and promotion thereof and highly pressurized washing can be controlled, through injection nozzles provided on a first wall or a first bottom of the injection well. The method has features that the injected fluid stirs and washes the layer to separate or decompose contaminants and the contaminants are eliminated by collecting the fluid containing an undecomposed portion of the contaminants in the layer through a plurality of collection wells.
    Type: Application
    Filed: January 7, 2003
    Publication date: November 13, 2003
    Applicant: TANAKA KANKYO-KAIHATSU CO.
    Inventors: Takeshi Tanaka, Hisashi Nirei, Kenji Nanba, Mio Takeuchi, Asuka Takahashi, Masato Owaki
  • Patent number: 4356564
    Abstract: In a digital signal transmission system in which interleaved sequences of digital words are transmitted on respective channels, the words in each sequence are added bit-by-bit in a first modulo-two adder to produce a first parity signal, the latter and selected ones of the sequences of digital words have imparted thereto different respective delay times, and then the sequences of digital words and the first parity signal are added bit-by-bit in a second modulo-two adder to produce a second parity signal. The second parity signal is delayed a predetermined amount and fed back to the first modulo-two adder. Then, the interleaved sequences of digital words and the first and second parity signals are serially transmitted on a transmission medium, which can be a video tape. The transmission system is capable of correcting burst errors occurring in more than three successive digital words.
    Type: Grant
    Filed: February 22, 1980
    Date of Patent: October 26, 1982
    Assignee: Sony Corporation
    Inventors: Toshitada Doi, Shunsuke Furukawa, Kenji Nanba