Patents by Inventor Kenji Ohsawa
Kenji Ohsawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 6514847Abstract: In a semiconductor device, a plurality of wiring films are formed on a front surface of a base comprising an insulating resin and having electrode-forming holes, the surfaces of the wiring films and the surface of the base being positioned on the same plane and at least parts of the wiring films overlapping with the electrode-forming holes; a conductive material is embedded into the electrode-forming holes to form external electrodes on the back surface, away from the wiring films, of the base; a semiconductor element is positioned on the front surface of the base with an insulating film therebetween, the back surface of the semiconductor element being bonded to said front surface of the base; wires bond the electrodes of the semiconductor element to the corresponding wiring films; and a resin seals the wiring films and the wires.Type: GrantFiled: July 25, 2000Date of Patent: February 4, 2003Assignee: Sony CorporationInventors: Kenji Ohsawa, Tomoshi Ohde
-
Patent number: 6465279Abstract: A lead frame comprises: outer leads formed by a metal base member; first interconnection film portions formed by a metal plating layer, each of which is disposed inside the outer leads in such a manner as to be connected to an inner end of one principal plane of the corresponding one of the outer leads, and at least one second interconnection film portion formed by the metal plating layer, which is disposed inside the outer leads in such a manner as not to be connected to the outer leads; and an insulating film formed to cover planes, opposed to the outer leads, of the first and second interconnection film portions, thereby holding the first and second interconnection film portions; wherein planes, opposed to the insulating film, of the first and second interconnection film portions are taken as semiconductor element mounting planes.Type: GrantFiled: August 29, 2001Date of Patent: October 15, 2002Assignee: Sony CorporationInventors: Kenji Ohsawa, Hidetoshi Kusano
-
Patent number: 6403402Abstract: To enable readily forming the etching stop layer of a lead frame with multilayer structure by plating without using a large-scale device, enhance adhesive strength between the etching stop layer and an adjacent metal layer and prevent peeling caused by deterioration caused by the invasion of a chemical between the etching stop layer and each adjacent metal layer from occurring, an etching stop layer is formed by nickel or a nickel alloy in a method of manufacturing a lead frame at least provided with an etching process for selectively etching metal layers using an etching stop layer as an etching stopper in a state in which a thick metal layer is formed on one side of the etching stop layer as an intermediate layer and a thin metal layer is formed on the other side and a process for etching the etching stop layer using the metal layers on both sides as a mask.Type: GrantFiled: October 31, 2000Date of Patent: June 11, 2002Assignee: Sony CorporationInventors: Kenji Ohsawa, Hidetoshi Kusano
-
Patent number: 6391684Abstract: In a lead frame, leads are formed on a surface of protective insulation film having a device hole. Protruding electrodes (solder balls) are farmed on the surface of the leads opposite the surface closer to the protective insulation film. A reinforcement plate is also formed on the rear surface of the protective insulation film.Type: GrantFiled: October 8, 1999Date of Patent: May 21, 2002Assignee: Sony CorporationInventor: Kenji Ohsawa
-
Patent number: 6369441Abstract: To enable readily forming the etching stop layer of a lead frame with multilayer structure by plating without using a large-scale device, enhance adhesive strength between the etching stop layer and an adjacent metal layer and prevent peeling caused by deterioration caused by the invasion of a chemical between the etching stop layer and each adjacent metal layer from occurring, an etching stop layer is formed by nickel or a nickel alloy in a method of manufacturing a lead frame at least provided with an etching process for selectively etching metal layers using an etching stop layer as an etching stopper in a state in which a thick metal layer is formed on one side of the etching stop layer as an intermediate layer and a thin metal layer is formed on the other side and a process for etching the etching stop layer using the metal layers on both sides as a mask.Type: GrantFiled: October 31, 2000Date of Patent: April 9, 2002Assignee: Sony CorporationInventors: Kenji Ohsawa, Hidetoshi Kusano
-
Publication number: 20020031862Abstract: A lead frame comprises: outer leads formed by a metal base member; first interconnection film portions formed by a metal plating layer, each of which is disposed inside the outer leads in such a manner as to be connected to an inner end of one principal plane of the corresponding one of the outer leads, and at least one second interconnection film portion formed by the metal plating layer, which is disposed inside the outer leads in such a manner as not to be connected to the outer leads; and an insulating film formed to cover planes, opposed to the outer leads, of the first and second interconnection film portions, thereby holding the first and second interconnection film portions; wherein planes, opposed to the insulating film, of the first and second interconnection film portions are taken as semiconductor element mounting planes.Type: ApplicationFiled: August 29, 2001Publication date: March 14, 2002Inventors: Kenji Ohsawa, Hidetoshi Kusano
-
Patent number: 6351025Abstract: To enable readily forming the etching stop layer of a lead frame with multilayer structure by plating without using a large-scale device, enhance adhesive strength between the etching stop layer and an adjacent metal layer and prevent peeling caused by deterioration caused by the invasion of a chemical between the etching stop layer and each adjacent metal layer from occurring, an etching stop layer is formed by nickel or a nickel alloy in a method of manufacturing a lead frame at least provided with an etching process for selectively etching metal layers using an etching stop layer as an etching stopper in a state in which a thick metal layer is formed on one side of the etching stop layer as an intermediate layer and a thin metal layer is formed on the other side and a process for etching the etching stop layer using the metal layers on both sides as a mask.Type: GrantFiled: October 31, 2000Date of Patent: February 26, 2002Assignee: Sony CorporationInventors: Kenji Ohsawa, Hidetoshi Kusano
-
Patent number: 6340840Abstract: A lead frame comprises: outer leads formed by a metal base member; first interconnection film portions formed by a metal plating layer, each of which is disposed inside the outer leads in such a manner as to be connected to an inner end of one principal plane of the corresponding one of the outer leads, and at least one second interconnection film portion formed by the metal plating layer, which is disposed inside the outer leads in such a manner as not to be connected to the outer leads; and an insulating film formed to cover planes, opposed to the outer leads, of the first and second interconnection film portions, thereby holding the first and second interconnection film portions; wherein planes, opposed to the insulating film, of the first and second interconnection film portions are taken as semiconductor element mounting planes.Type: GrantFiled: December 8, 2000Date of Patent: January 22, 2002Assignee: Sony CorporationInventors: Kenji Ohsawa, Hidetoshi Kusano
-
Publication number: 20010014491Abstract: In a lead frame, leads are formed on a surface of protective insulation film having a device hole. Protruding electrodes (solder balls) are formed on the surface of the leads opposite the surface closer to the protective insulation film. A reinforcement plate is also formed on the rear surface of the protective insulation film.Type: ApplicationFiled: October 8, 1999Publication date: August 16, 2001Inventor: KENJI OHSAWA
-
Patent number: 6258631Abstract: A semiconductor package provided with a reinforcing plate on the side of the lead joined face of which a chip housing concave portion is formed, a semiconductor chip housed and fixed in the chip housing concave portion of this reinforcing plate, a plurality of leads joined and held on the lead joined face of the reinforcing plate, the inner lead section of which is joined to the semiconductor chip via a bump and in the outer lead section of which a protruded electrode is formed, a solder resist film formed on the lead except the bump formed area and the electrode formed area of this lead and a polyimide film formed on the side of the inner lead section of the lead on the solder resist film and the manufacturing method are disclosed and hereby, the quality of the semiconductor package with ultra-multipin structure is stabilized.Type: GrantFiled: September 29, 1999Date of Patent: July 10, 2001Assignee: Sony CorporationInventors: Makoto Ito, Kenji Ohsawa
-
Publication number: 20010005050Abstract: In a semiconductor device, a plurality of wiring films are formed on a front surface of a base comprising an insulating resin and having electrode-forming holes, the surfaces of the wiring films and the surface of the base being positioned on the same plane and at least parts of the wiring films overlapping with the electrode-forming holes; a conductive material is embedded into the electrode-forming holes to form external electrodes on the back surface, away from the wiring films, of the base; a semiconductor element is positioned on the front surface of the base with an insulating film therebetween, the back surface of the semiconductor element being bonded to said front surface of the base; wires bond the electrodes of the semiconductor element to the corresponding wiring films; and a resin seals the wiring films and the wires.Type: ApplicationFiled: November 25, 1998Publication date: June 28, 2001Inventors: KENJI OHSAWA, TOMOSHI OHDE
-
Patent number: 6240632Abstract: According a method of manufacturing a lead frame of the present invention, a plurality of leads each having an inner lead portion and an outer lead portion are formed on a metal base having on its surface a nickel layer by copper plating. An insulative holding film for holding each of the leads is formed. A projecting electrode is formed on the outer lead portion. Respective leads are separated by selectively removing the metal base by etching.Type: GrantFiled: September 19, 1996Date of Patent: June 5, 2001Assignee: Sony CorporationInventors: Makoto Ito, Kenji Ohsawa
-
Patent number: 6194778Abstract: In a semiconductor chip, electrode pads are formed in a peripheral portion of the chip front surface and the inside of the pad forming region is made an effective device region. An insulating, thick-film protective layer is laminated on the effective device region of the semiconductor chip. Leads are constituted of outer leads that are protected by an insulating film and inner leads that are integral with and extend from the outer leads. External connection terminals are formed on the outer leads, and the tips of the inner leads are connected to the electrode pads of the semiconductor chip. A reinforcement plate is provided so as to surround the semiconductor chip. A peripheral space of the semiconductor chip is charged with a sealing resin. According to a second aspect of the invention, a semiconductor chip has electrode pads on the chip front surface and disposed inside a conductive outer ring. A film circuit is disposed on the chip front surface side.Type: GrantFiled: August 13, 1997Date of Patent: February 27, 2001Assignee: Sony CorporationInventors: Kenji Ohsawa, Kazuhiro Sato, Makoto Ito
-
Patent number: 6140153Abstract: To enable readily forming the etching stop layer of a lead frame with multilayer structure by plating without using a large-scale device, enhance adhesive strength between the etching stop layer and an adjacent metal layer and prevent peeling caused by deterioration caused by the invasion of a chemical between the etching stop layer and each adjacent metal layer from occurring, an etching stop layer is formed by nickel or a nickel alloy in a method of manufacturing a lead frame at least provided with an etching process for selectively etching metal layers using an etching stop layer as an etching stopper in a state in which a thick metal layer is formed on one side of the etching stop layer as an intermediate layer and a thin metal layer is formed on the other side and a process for etching the etching stop layer using the metal layers on both sides as a mask.Type: GrantFiled: May 26, 1998Date of Patent: October 31, 2000Assignee: Sony CorporationInventors: Kenji Ohsawa, Hidetoshi Kusano
-
Patent number: 6114755Abstract: A semiconductor package provided with a reinforcing plate on the side of the lead joined face of which a chip housing concave portion is formed, a semiconductor chip housed and fixed in the chip housing concave portion of this reinforcing plate, a plurality of leads joined and held on the lead joined face of the reinforcing plate, the inner lead section of which is joined to the semiconductor chip via a bump and in the outer lead section of which a protruded electrode is formed, a solder resist film formed on the lead except the bump formed area and the electrode formed area of this lead and a polyimide film formed on the side of the inner lead section of the lead on the solder resist film and the manufacturing method are disclosed and hereby, the quality of the semiconductor package with ultra-multipin structure is stabilized.Type: GrantFiled: May 23, 1997Date of Patent: September 5, 2000Assignee: Sony CorporationInventors: Makoto Ito, Kenji Ohsawa
-
Patent number: 6104091Abstract: A semiconductor package provided with a reinforcing plate on the side of the lead joined face of which a chip housing concave portion is formed, a semiconductor chip housed and fixed in the chip housing concave portion of this reinforcing plate, a plurality of leads joined and held on the lead joined face of the reinforcing plate, the inner lead section of which is joined to the semiconductor chip via a bump and in the outer lead section of which a protruded electrode is formed, a solder resist film formed on the lead except the bump formed area and the electrode formed area of this lead and a polyimide film formed on the side of the inner lead section of the lead on the solder resist film and the manufacturing method are disclosed and hereby, the quality of the semiconductor package with ultra-multipin structure is stabilized.Type: GrantFiled: April 2, 1998Date of Patent: August 15, 2000Assignee: Sony CorporationInventors: Makoto Ito, Kenji Ohsawa
-
Patent number: 6093970Abstract: An improved semiconductor device and method of manufacturing employs interconnecting films on film circuit as ground lines which extend to the periphery of the film circuit where there is a further connection to a conductive reinforcing plate 25. Advantageously, the conductive reinforcing plate reduces electrical noise from interfering with the semiconductor device and prevents the semiconductor device from radiating undesired signals. The interconnecting films also reduce cross-talk between signal lines of the semiconductor device.Type: GrantFiled: July 27, 1999Date of Patent: July 25, 2000Assignee: Sony CorporationInventors: Kenji Ohsawa, Makoto Ito, Yasushi Otsuka, Kazuhiro Sato
-
Patent number: 6078097Abstract: In a lead frame, leads are formed on a surface of protective insulation film having a device hole. Protruding electrodes (solder balls) are formed on the surface of the leads opposite the surface closer to the protective insulation film. A reinforcement plate is also formed on the rear surface of the protective insulation film.Type: GrantFiled: January 21, 1997Date of Patent: June 20, 2000Assignee: Sony CorporationInventor: Kenji Ohsawa
-
Patent number: 6074898Abstract: A lead frame includes a plurality of leads held by an insulative holding film and each formed of an inner lead portion for being bonded to a semiconductor chip and an outer lead portion, a pad portion formed at an end portion of the outer lead portion, an insulating film formed in a pattern so as to insulate the adjacent leads, a ground film formed on the pad portion and partially on the insulating film and having a wider area as compared with that of the pad portion, and a projecting electrode formed on the ground film.Type: GrantFiled: January 25, 1999Date of Patent: June 13, 2000Assignee: Sony CorporationInventors: Kenji Ohsawa, Makoto Ito
-
Patent number: 6054773Abstract: An adhesive sheet which has rigidity and a portion which adheres to the back surface of the outside portion of the film circuit is used. Specifically, there is used the adhesive sheet which is obtained by forming cushioning adhesive sheet layers on both the surfaces of the rigid sheet layer formed of stainless or the like. Further, the rigid sheet layer is also used for electrostatic shield. The co-planarity of external terminals (soldering balls) is enhanced without vainly increasing the weight of a semiconductor device, and further the resistance to high-frequency noses in the semiconductor device is enhanced.Type: GrantFiled: March 27, 1998Date of Patent: April 25, 2000Assignee: Sony CorporationInventors: Kenji Ohsawa, Kazuhiro Sato, Hiroyuki Shigeta