Patents by Inventor Kenji Sakata
Kenji Sakata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12112780Abstract: A recording medium includes a recording layer. The recording layer includes an aliphatic polymer, and a multiphoton absorption compound containing at least one bond selected from the group consisting of a carbon-carbon double bond, a carbon-nitrogen double bond, and a carbon-carbon triple bond, and having a multiphoton absorption characteristic. When the thickness of the recording layer is 100 ?m, the transmittance of the recording layer in the thickness direction with respect to light having a wavelength of 405 nm is greater than or equal to 80%.Type: GrantFiled: November 10, 2023Date of Patent: October 8, 2024Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Kota Ando, Masako Yokoyama, Naoya Sakata, Kenji Tagashira, Hidekazu Arase
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Publication number: 20240309112Abstract: Provided is an anti-PAD4 antibody or an antibody fragment thereof, wherein HCDR1 comprises an amino acid sequence of SEQ ID NO: 1, HCDR2 comprises an amino acid sequence of SEQ ID NO: 2, HCDR3 comprises an amino acid sequence of SEQ ID NO: 3, LCDR1 comprises an amino acid sequence of SEQ ID NO: 4, LCDR2 comprises an amino acid sequence of SEQ TD NO: 5, and LCDR3 comprises an amino acid sequence of SEQ ID NO: 6.Type: ApplicationFiled: February 18, 2022Publication date: September 19, 2024Applicants: MITSUBISHI TANABE PHARMA CORPORATION, PHARMA FOODS INTERNATIONAL CO., LTD.Inventors: Yuya MIYAMOTO, Koichi WADA, Yuichi IMURA, Kenji SAITO, Tomoko SAKATA, Takanari SHIGEMITSU
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Patent number: 12040733Abstract: Provided is an encoder, which is provided in a driving apparatus comprising a motor section configured to drive a first displacement section, which is connected to a fixed section via an elastic body, and a transmission section configured to convert a displacement of the first displacement section and transmit the displacement to the second displacement section, comprising: a first detector configured to detect first displacement information of the first displacement section; a second detector configured to detect second displacement information of the second displacement section; a third detector configured to detect third displacement information of the motor section relative to the fixed section; and a computing section configured to obtain information related to a driving amount of the motor section using the first displacement information and the second displacement information, and obtain information of a load on the motor section using the third displacement information.Type: GrantFiled: March 24, 2021Date of Patent: July 16, 2024Assignee: NIKON CORPORATIONInventors: Kenji Omata, Koichi Sakata
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Publication number: 20230411368Abstract: Reliability of a semiconductor device is improved. The semiconductor device includes a wiring substrate, a semiconductor chip and a capacitor mounted on the upper surface of the wiring substrate, and a lid formed of a metallic plate covering the semiconductor chip and the wire in substrate. The semiconductor chip is bonded to the lid via a conductive adhesive layer, and the capacitor, which is thicker than the thickness of the semiconductor chip, is disposed in the cut off portion provided in the lid, and is exposed from the lid.Type: ApplicationFiled: September 6, 2023Publication date: December 21, 2023Inventors: Toshihiko AKIBA, Kenji SAKATA, Nobuhiro KINOSHITA, Yosuke KATSURA
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Patent number: 11784173Abstract: Reliability of a semiconductor device is improved. The semiconductor device PKG1 includes a wiring substrate SUB1, a semiconductor chip CHP1 and a capacitor CDC mounted on the upper surface 2t of the wiring substrate SUB1, and a lid LD formed of a metallic plate covering the semiconductor chip CHP1 and the wiring substrate SUB1. The semiconductor chip CHP1 is bonded to the lid LD via a conductive adhesive layer, and the capacitor CDC, which is thicker than the thickness of the semiconductor chip CHP1, is disposed in the cut off portion 4d1 provided in the lid LD, and is exposed from the lid LD.Type: GrantFiled: September 27, 2021Date of Patent: October 10, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Toshihiko Akiba, Kenji Sakata, Nobuhiro Kinoshita, Yosuke Katsura
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Patent number: 11764658Abstract: An electric motor and a method for manufacturing an electric motor capable of improving rotation balance of an armature and realizing effective brake braking with a simple configuration are provided. In an electric motor including an armature core having a plurality of teeth and teeth within a yoke, a winding wound between the slots, and a commutator having and a plurality of segments to which the winding is connected, the winding has a main winding that applies a rotational force to the armature core and a brake winding that applies a braking force to the armature core, and an H bridge circuit is built between the winding and a power supply, and the main winding and the brake winding of the winding are disposed at positions for adjusting balance when the armature core rotates.Type: GrantFiled: April 6, 2021Date of Patent: September 19, 2023Assignee: MITSUBA CorporationInventors: Kenji Sakata, Akihiro Kaihatsu
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Publication number: 20220013508Abstract: Reliability of a semiconductor device is improved. The semiconductor device PKG1 includes a wiring substrate SUB1, a semiconductor chip CHP1 and a capacitor CDC mounted on the upper surface 2t of the wiring substrate SUB1, and a lid LD formed of a metallic plate covering the semiconductor chip CHP1 and the wiring substrate SUB1. The semiconductor chip CHP1 is bonded to the lid LD via a conductive adhesive layer, and the capacitor CDC, which is thicker than the thickness of the semiconductor chip CHP1, is disposed in the cut off portion 4d1 provided in the lid LD, and is exposed from the lid LD.Type: ApplicationFiled: September 27, 2021Publication date: January 13, 2022Inventors: Toshihiko AKIBA, Kenji SAKATA, Nobuhiro KINOSHITA, Yosuke KATSURA
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Patent number: 11158617Abstract: Reliability of a semiconductor device is improved. The semiconductor device PKG1 includes a wiring substrate SUB1, a semiconductor chip CHP1 and a capacitor CDC mounted on the upper surface 2t of the wiring substrate SUB1, and a lid LD formed of a metallic plate covering the semiconductor chip CHP1 and the wiring substrate SUB1. The semiconductor chip CHP1 is bonded to the lid LD via a conductive adhesive layer, and the capacitor CDC, which is thicker than the thickness of the semiconductor chip CHP1, is disposed in the cut off portion 4d1 provided in the lid LD, and is exposed from the lid LD.Type: GrantFiled: June 18, 2019Date of Patent: October 26, 2021Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Toshihiko Akiba, Kenji Sakata, Nobuhiro Kinoshita, Yosuke Katsura
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Publication number: 20210320579Abstract: An electric motor and a method for manufacturing an electric motor capable of improving rotation balance of an armature and realizing effective brake braking with a simple configuration are provided. In an electric motor including an armature core having a plurality of teeth and teeth within a yoke, a winding wound between the slots, and a commutator having and a plurality of segments to which the winding is connected, the winding has a main winding that applies a rotational force to the armature core and a brake winding that applies a braking force to the armature core, and an H bridge circuit is built between the winding and a power supply, and the main winding and the brake winding of the winding are disposed at positions for adjusting balance when the armature core rotates.Type: ApplicationFiled: April 6, 2021Publication date: October 14, 2021Applicant: MITSUBA CorporationInventors: KENJI SAKATA, AKIHIRO KAIHATSU
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Patent number: 11063009Abstract: There is a need to improve reliability of the semiconductor device. A semiconductor device includes a printed circuit board and a semiconductor chip mounted over the printed circuit board. The semiconductor chip includes a pad, an insulation film including an opening to expose part of the pad, and a pillar electrode formed over the pad exposed from the opening. The printed circuit board includes a terminal and a resist layer including an opening to expose part of the terminal. The pillar electrode of the semiconductor chip and the terminal of the printed circuit board are coupled via a solder layer. Thickness h1 of the pillar electrode is measured from the upper surface of the insulation film. Thickness h2 of the solder layer is measured from the upper surface of the resist layer. Thickness h1 is greater than or equal to a half of thickness h2 and is smaller than or equal to thickness h2.Type: GrantFiled: February 5, 2018Date of Patent: July 13, 2021Assignee: Renesas Electronics CorporationInventors: Kenji Sakata, Toshihiko Akiba, Takuo Funaya, Hideaki Tsuchiya, Yuichi Yoshida
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Patent number: 10890243Abstract: The motor with deceleration mechanism includes: a motor shaft (11), which is accommodated in a motor case (21) and in which an axial end portion (11a) is formed into a spherical shape; a worm, arranged on the motor shaft (11); a worm wheel, accommodated in a gear frame and engaging with the worm; a radial bearing (41), rotatably supporting the motor shaft (11); and a first thrust bearing (42), which is disposed inside the motor case (21), and in which a shaft facing surface (42s) facing the axial end portion (11a) of the motor shaft (11) and a counter shaft facing surface (42c) on the opposite side are respectively formed spherically; an average sliding radius between the first thrust bearing (42) and the motor case (21) is larger than an average sliding radius between the first thrust bearing (42) and the motor shaft (11).Type: GrantFiled: April 19, 2019Date of Patent: January 12, 2021Assignee: MITSUBA CorporationInventors: Kenji Sakata, Hiroyuki Yoshida, Satoru Yoshida
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Publication number: 20200006303Abstract: Reliability of a semiconductor device is improved. The semiconductor device PKG1 includes a wiring substrate SUB1, a semiconductor chip CHP1 and a capacitor CDC mounted on the upper surface 2t of the wiring substrate SUB1, and a lid LD formed of a metallic plate covering the semiconductor chip CHP1 and the wiring substrate SUB1. The semiconductor chip CHP1 is bonded to the lid LD via a conductive adhesive layer, and the capacitor CDC, which is thicker than the thickness of the semiconductor chip CHP1, is disposed in the cut off portion 4d1 provided in the lid LD, and is exposed from the lid LD.Type: ApplicationFiled: June 18, 2019Publication date: January 2, 2020Inventors: Toshihiko AKIBA, Kenji SAKATA, Nobuhiro KINOSHITA, Yosuke KATSURA
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Publication number: 20190331208Abstract: The motor with deceleration mechanism includes: a motor shaft (11), which is accommodated in a motor case (21) and in which an axial end portion (11a) is formed into a spherical shape; a worm, arranged on the motor shaft (11); a worm wheel, accommodated in a gear frame and engaging with the worm; a radial bearing (41), rotatably supporting the motor shaft (11); and a first thrust bearing (42), which is disposed inside the motor case (21), and in which a shaft facing surface (42s) facing the axial end portion (11a) of the motor shaft (11) and a counter shaft facing surface (42c) on the opposite side are respectively formed spherically; an average sliding radius between the first thrust bearing (42) and the motor case (21) is larger than an average sliding radius between the first thrust bearing (42) and the motor shaft (11).Type: ApplicationFiled: April 19, 2019Publication date: October 31, 2019Applicant: MITSUBA CorporationInventors: KENJI SAKATA, HIROYUKI YOSHIDA, SATORU YOSHIDA
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Patent number: 10312199Abstract: A manufacturing method of a semiconductor device includes preparing a wiring substrate including a first surface, a plurality of first terminals formed on the first surface, and a second surface opposite to the first surface, arranging a first adhesive on the first surface of the wiring substrate, and after the arranging of the first adhesive, mounting a first semiconductor chip, which includes a first front surface, a plurality of first front electrodes formed on the first front surface, a first rear surface opposite to the first front surface, a plurality of first rear electrodes formed on the first rear surface, and a plurality of through electrodes electrically connecting the plurality of first front electrodes to the plurality of first rear electrodes, on the first surface of the wiring substrate via the first adhesive.Type: GrantFiled: March 30, 2018Date of Patent: June 4, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Shinji Watanabe, Tsuyoshi Kida, Yoshihiro Ono, Kentaro Mori, Kenji Sakata, Yusuke Yamada
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Patent number: 10229392Abstract: A group supporting apparatus and related computer readable recording medium to execute a process including: collecting input contents, which are input by participants via terminals, from the terminals; arranging the collected input contents into input content groups based on groups to which the participants belong; setting a representative flag on each of representative input contents selected from the respective input content groups; extracting the representative input contents and matching input contents, which match a predetermined extracting condition and are different from the representative input contents, from the collected input contents; and displaying a list of the representative input contents and the matching input contents on a display device that all the participants are able to view at a same time.Type: GrantFiled: August 10, 2016Date of Patent: March 12, 2019Assignee: FUJITSU LIMITEDInventors: Hidehiko Mayumi, Toshio Tanaka, Takeaki Kobayashi, Takehiro Nabae, Kenji Sakata
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Patent number: 10141273Abstract: In a semiconductor device according to an embodiment, a second semiconductor chip is mounted on a first rear surface of a first semiconductor chip. Also, the first rear surface of the first semiconductor chip includes a first region in which a plurality of first rear electrodes electrically connected to the second semiconductor chip via a protrusion electrode are formed and a second region which is located on a peripheral side relative to the first region and in which a first metal pattern is formed. In addition, a protrusion height of the first metal pattern with respect to the first rear surface is smaller than a protrusion height of each of the plurality of first rear electrodes with respect to the first rear surface.Type: GrantFiled: April 14, 2014Date of Patent: November 27, 2018Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Shinji Watanabe, Tsuyoshi Kida, Yoshihiro Ono, Kentaro Mori, Kenji Sakata, Yusuke Yamada
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Publication number: 20180294239Abstract: There is a need to improve reliability of the semiconductor device. A semiconductor device includes a printed circuit board and a semiconductor chip mounted over the printed circuit board. The semiconductor chip includes a pad, an insulation film including an opening to expose part of the pad, and a pillar electrode formed over the pad exposed from the opening. The printed circuit board includes a terminal and a resist layer including an opening to expose part of the terminal. The pillar electrode of the semiconductor chip and the terminal of the printed circuit board are coupled via a solder layer. Thickness h1 of the pillar electrode is measured from the upper surface of the insulation film. Thickness h2 of the solder layer is measured from the upper surface of the resist layer. Thickness h1 is greater than or equal to a half of thickness h2 and is smaller than or equal to thickness h2.Type: ApplicationFiled: February 5, 2018Publication date: October 11, 2018Inventors: Kenji SAKATA, Toshihiko AKIBA, Takuo FUNAYA, Hideaki TSUCHIYA, Yuichi YOSHIDA
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Publication number: 20180226362Abstract: A manufacturing method of a semiconductor device includes preparing a wiring substrate including a first surface, a plurality of first terminals formed on the first surface, and a second surface opposite to the first surface, arranging a first adhesive on the first surface of the wiring substrate, and after the arranging of the first adhesive, mounting a first semiconductor chip, which includes a first front surface, a plurality of first front electrodes formed on the first front surface, a first rear surface opposite to the first front surface, a plurality of first rear electrodes formed on the first rear surface, and a plurality of through electrodes electrically connecting the plurality of first front electrodes to the plurality of first rear electrodes, on the first surface of the wiring substrate via the first adhesive.Type: ApplicationFiled: March 30, 2018Publication date: August 9, 2018Inventors: Shinji Watanabe, Tsuyoshi Kida, Yoshihiro Ono, Kentaro Mori, Kenji Sakata, Yusuke Yamada
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Patent number: 9905529Abstract: A method for manufacturing a semiconductor device includes the steps of mounting a Si interposer over a printed wiring substrate, plasma-cleaning an upper surface of the Si interposer, disposing an NCF over the upper surface of the Si interposer, and mounting a semiconductor chip over the upper surface of the Si interposer through the NCF. Also, the method includes the step of electrically coupling each of plural electrodes of a second substrate and each of plural electrode pads of the semiconductor chip with each other through plural bump electrodes by reflow, and the surface of the Si interposer is plasma-cleaned before attaching the NCF to the Si interposer.Type: GrantFiled: March 2, 2016Date of Patent: February 27, 2018Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Kenji Sakata, Tsuyoshi Kida, Yoshihiro Ono
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Patent number: 9761149Abstract: A presenter selection support apparatus including: a display unit configured to display one or more opinions input from each of a plurality of terminals; a selection unit configured to select any one of opinions that belongs to a certain group based on a predetermined criterion when the certain group among at least one group formed by being classified from opinions displayed in the display unit is designated; and an instruction unit configured to instruct a terminal, in which an opinion other than the selected opinion is input, to display a screen in which each of a plurality of items related to relevancy to the selected opinion is selectable, wherein the predetermined criterion is a criterion used to specify any one terminal based on the number of times that one item among the plurality of items is selected in the past in each of the plurality of terminals.Type: GrantFiled: May 5, 2014Date of Patent: September 12, 2017Assignee: FUJITSU LIMITEDInventors: Hidehiko Mayumi, toshio tanaka, Takeaki Kobayashi, Kenji Sakata