Abstract: An impedance of a power supply wire is calculated based on design data of a semiconductor integrated circuit, a frequency characteristic of the calculated impedance is obtained, and a design of the semiconductor integrated circuit is changed based on the obtained frequency characteristic. As the above-described impedance, an impedance between power supplies that are different in potential such as a power supply and a ground may be calculated, or an impedance between power supplies that are substantially the same in potential such as a power supply and an N-well power supply may be calculated. By a design modification, a wiring method, the number of pads, separation of power supplies, a type of package, a characteristic of an inductance element, a substrate structure, a distance between wires, a decoupling capacitance, a length of a wire, and a characteristic of a resistance element, for example, are changed.

Abstract: Based on design data of a semiconductor integrated circuit, an impedance related to a power supply wire is calculated, and based on the calculated impedance, a frequency characteristic of power supply noise is analyzed. In calculation of an impedance, an impedance between power supplies which are different in potential, e.g., a main power supply and a ground, may be calculated. Alternatively, an impedance between power supplies which are substantially the same in potential, e.g., a main power supply and an N-well power supply, may be calculated. The calculated impedance includes a wire capacitance between power supply wires, a substrate resistance, an impedance of a package connected to the power supply wires, and so on. Thus, it is possible to provide a method for analyzing power supply noise of a semiconductor integrated circuit, which can be executed at an early stage of a design process with a small amount of calculation.

Abstract: A method of analyzing electromagnetic interference in which an amount of electromagnetic interference from an LSI is analyzed, wherein the method includes: an equivalent power source current information calculating step of calculating information of an equivalent power source current flowing in a power source current, from circuit information of the LSI chip; an estimating step of considering at least one of power source information of a power source for supplying a current to the LSI chip, package information of a package for the semiconductor chip, and measurement system information of a measurement system for measuring characteristics of the semiconductor chip, as analysis control information, and of estimating total information in which the analysis control information is reflected in the circuit information, as an equivalent circuit; and a total information analyzing step of performing analysis in accordance with the total information which is estimated in the estimating step.

Abstract: It is an object of the invention to effectively absorb a power noise and to implement the stable operation of a circuit. The invention provides a semiconductor device comprising a bypass capacitor including an MOS structure having a gate electrode formed to be extended from a power wiring region to a portion provided under an empty region which is adjacent to the power wiring region and has no other functional layer, and formed through a capacitive insulating film on a diffusion region having one conductivity type, and a substrate contact formed under a ground wiring region and fixing a substrate potential, wherein the bypass capacitor has a contact to come in contact with the power wiring which is formed on a surface of the gate electrode and has the diffusion region having the one conductivity type and a diffusion region of the substrate contact connected to each other.

Abstract: In substrate noise analysis for a semiconductor integrated circuit, it takes long to calculate the amount of current input to the substrate and substrate potential fluctuations in an analog circuit to which the current is propagated in combination with impedance/power supply resistance of the substrate including a large scale RC circuit network. The amount of calculation is reduced in calculating current passed to power supply/ground by adding triangles having areas corresponding to power consumption separately for rising/falling in logical changes in gate level simulation. The amount of calculation is reduced by summing current, interface capacitance, interface resistance, power supply resistance, ground resistance, power supply voltage fluctuations, and ground voltage fluctuations on a basis of block, instance or simultaneous operation. Since the calculation amount is reduced, it takes a shorter period to apply substrate noise analysis.

Abstract: There are contained the step of forming voltage waveform information by calculating a voltage waveform of each instance of a semiconductor integrated circuit at a power-supply terminal based on circuit information and analyzing the voltage waveform of each instance, the step of forming voltage abstraction information by abstracting the voltage waveform information, and the step of calculating a delay value of the instance based on the voltage abstraction information.

Abstract: A process for producing a carbon fiber sheet, which comprises allowing, as necessary, an oxidized polyacrylonitrile fiber sheet to contain 0.2 to 5% by mass of a resin, then subjecting the resin-containing oxidized polyacrylonitrile fiber sheet to a compression treatment in the thickness direction under the conditions of 150 to 300° C. and 5 to 100 MPa (10 to 100 MPa when no resin treatment is made) to obtain a compressed, oxidized fiber sheet having a bulk density of 0.40 to 0.80 g/cm3 and a compression ratio of 40 to 75%, and thereafter subjecting the compressed, oxidized fiber sheet to a carbonizing treatment, which carbon fiber sheet has a thickness of 0.15 to 1.0 mm, a bulk density of 0.15 to 0.45 g/cm3, a carbon fiber content of 95% by mass or more, a compression deformation ratio of 10 to 35%, an electric resistance of 6 m&OHgr; or less and a feeling of 5 to 70 g.

Abstract: An electromagnetic disturbance analysis method for analyzing an external noise to a semiconductor integrated circuit includes an impedance extraction step of extracting impedance information on the power wiring in the target semiconductor integrated circuit or the power wiring in the semiconductor integrated circuit and the external power wiring of the semiconductor integrated circuit, an equivalent circuit creating step of creating an equivalent circuit from the impedance information, and an analysis step of supplying a noise waveform externally and analyzing the influence of the noise on the semiconductor integrated circuit.

Abstract: A method for optimizing electromagnetic interference (EMI) comprising: an EMI analyzing step of analyzing a quantity of electromagnetic interference of an LSI by execution of simulation; a step of selecting an instance with a large quantity of noise in said EMI analyzing step; and a step of adjusting a driving capability of said instance so that it is lowered to an extent that a delay does not occur in a signal timing of said instance selected. In order to optimize the analyzed EMI, the portion for which optimizing is required is extracted, and such a measure as increasing the area where the decoupling capacitance is created is implemented for this portion in a necessary degree. Further, by changing the aspect ratio of the block, changing the block position or changing the cell line, the decoupling capacitance can be easily created at the most efficient inserting position.

Abstract: A method of analyzing an electromagnetic interference amount of an LSI includes an equivalent impedance information calculating step of calculating and estimating equivalent impedance information based on circuit information of an LSI chip and package information of the LSI chip, and an electromagnetic interference noise calculating step of calculating an electromagnetic interference noise based on the equivalent impedance information.

Abstract: A method of analyzing an electromagnetic interference amount of an LSI includes an equivalent impedance information calculating step of calculating and estimating equivalent impedance information based on circuit information of an LSI chip and package information of the LSI chip, and an electromagnetic interference noise calculating step of calculating an electromagnetic interference noise based on the equivalent impedance information.

Abstract: The present invention discloses a process for producing a carbon fiber sheet, which comprises allowing, as necessary, an oxidized polyacrylonitrile fiber sheet to contain 0.2 to 5% by mass of a resin, then subjecting the resin-containing oxidized polyacrylonitrile fiber sheet to a compression treatment in the thickness direction under the conditions of 150 to 300° C. and 5 to 100 MPa (10 to 100 MPa when no resin treatment is made) to obtain a compressed, oxidized fiber sheet having a bulk density of 0.40 to 0.80 g/cm3 and a compression ratio of 40 to 75%, and thereafter subjecting the compressed, oxidized fiber sheet to a carbonizing treatment. The carbon fiber sheet has a thickness of 0.15 to 1.0 mm, a bulk density of 0.15 to 0.45 g/cm3, a carbon fiber content of 95% by mass or more, a compression deformation ratio of 10 to 35%, an electric resistance of 6 m&OHgr; or less and a feeling of 5 to 70 g.

Abstract: An electromagnetic disturbance analysis method for analyzing an external noise to a semiconductor integrated circuit includes an impedance extraction step of extracting impedance information on the power wiring in the target semiconductor integrated circuit or the power wiring in the semiconductor integrated circuit and the external power wiring of the semiconductor integrated circuit, an equivalent circuit creating step of creating an equivalent circuit from the impedance information, and an analysis step of supplying a noise waveform externally and analyzing the influence of the noise on the semiconductor integrated circuit.

Abstract: A method of analyzing electromagnetic interference in which an amount of electromagnetic interference from an LSI is analyzed, wherein the method includes: an equivalent power source current information calculating step of calculating information of an equivalent power source current flowing in a power source current, from circuit information of the LSI chip; an estimating step of considering at least one of power source information of a power source for supplying a current to the LSI chip, package information of a package for the semiconductor chip, and measurement system information of a measurement system for measuring characteristics of the semiconductor chip, as analysis control information, and of estimating total information in which the analysis control information is reflected in the circuit information, as an equivalent circuit; and a total information analyzing step of performing analysis in accordance with the total information which is estimated in the estimating step.

Abstract: A method for optimizing electromagnetic interference (EMI) comprising: an EMI analyzing step of analyzing a quantity of electromagnetic interference of an LSI by execution of simulation; a step of selecting an instance with a large quantity of noise in said EMI analyzing step; and a step of adjusting a driving capability of said instance so that it is lowered to an extent that a delay does not occur in a signal timing of said instance selected. In order to optimize the analyzed EMI, the portion for which optimizing is required is extracted, and such a measure as increasing the area where the decoupling capacitance is created is implemented for this portion in a necessary degree. Further, by changing the aspect ratio of the block, changing the block position or changing the cell line, the decoupling capacitance can be easily created at the most efficient inserting position.

Abstract: This invention is characterized to include a discrete analysis frequency width change specifying process for specifying in a particular frequency range a change in the discrete high-speed Fourier transform (FFT) analysis frequency width and a modeling process for allocating different discrete FFT analysis frequency widths to the specified frequency range and to a frequency range other than the specified frequency range and performing modeling. The EMI analysis method of this invention reflects on the gate level power supply current calculation the influence of decoupling by resistance, capacitance and inductance of the power supply and ground, thereby making it possible to evaluate the EMI of LSIs in simulation in a realistic time and to provide efficient EMI countermeasures through supporting the identifying of the EMI causing locations.

Abstract: A method for calculating a power consumption library on a gate level in a large-scale transistor circuit. The method includes: dividing a circuit network into a partial circuit network by a gate terminal of a transistor, calculating a relation of an input logical value to an output logical value in a partial circuit; calculating a relation of an output logical value to an input logical change in an output wiring between partial circuits, based on a partial circuit connection and a relation of an input logical value to an output logical value in a partial circuit; measuring a partial circuit power consumption by using an input logical change in each partial circuit; and regarding the sum of a power consumption at each partial circuit corresponding to an input logical change as a power consumption in a circuit network. The method also provides for reuse when a current path is the same in a circuit input logical change.

Abstract: A friction material containing from about 0.5-29 wt % of carbonaceous fibers with a bond nitrogen content of from about 14 to 21 wt %, an auxiliary material and a thermosetting resin. The material has good wear and temperature resistance characteristics and can be used in power transmissions and brakes.

Abstract: Active carbon fibers derived from acrylic fibers and having a BET specific surface area (SA) of 800 to 2,000 m.sup.2 /g, a pore volume (Vp) to (SA) ratio, i.e., (Vp)/(SA), of from 5.times.10.sup.-4 to 14.5.times.10.sup.-4, and a methylene blue adsorption rate constant of not less than 5.times.10.sup.-1 sec.sup.-1, and a filter adsorption unit for water purification using said active carbon fibers; the unit is useful to remove compounds having a wide range of molecular weights from an aqueous liquid.

Abstract: Active carbon fibers derived from acrylic fibers and having a BET specific surface area (SA) of 800 to 2,000 m.sup.2 /g, a pore volume (Vp) to (SA) ratio, i.e., (Vp)/(SA), of from 5.times.10.sup.-4 to 14.5.times.10.sup.-4, and a methylene blue adsorption rate constant of not less than 5.times.10.sup.-1 sec.sup.-1, and a filter adsorption unit for water purification using said active carbon fibers; the unit is useful to remove compounds having a wide range of molecular weights from an aqueous liquid.