Abstract: Provided are a toilet seat device saving energy and accurately stabilizing the temperature of a seating section at a predetermined level in a short time, and a toilet apparatus having the same. A control section adjusts the temperature of a toilet seat section to 18° C. when a heating function is turned on, and during a standby period D1, the control section performs low electric power drive of a lamp heater provided at the toilet seat section. The control section starts 600 W drive of the lamp heater at time t1 after the control section detects user's entry into a room, and the control section maintains the 600 W drive during an inrush current reduction period D2. The control section starts 1200 W drive of the lamp heater at time t2 and maintains the 1200 W drive during a first temperature rise period D3.

Abstract: There is provided a semiconductor device supplied with internal power generated by an internal power generation circuit to perform a stable operation and, also, suppress power consumption. A control circuit, a row/column decoder and a sense amplifier are driven by an internal buck voltage. On the other hand, a data path with high power consumption is driven by an external power supply voltage. A level conversion circuit receives an address signal or a command signal having a voltage level of the external power supply voltage, converts the voltage level to the internal buck voltage, and outputs a resultant signal to the control circuit. A level conversion circuit receives a control signal having a voltage level of the internal buck voltage from the control circuit, converts the voltage level to the external power supply voltage, and outputs a resultant signal to the data path.

Abstract: A semiconductor integrated circuit device has a negative voltage generation circuit provided at each power supply circuit unit for six memory macros. Therefore, the response with respect to variation in a negative voltage is increased. In a standby mode, a negative voltage supply line for the six memory macros is connected by a switch circuit, and only a negative voltage generation circuit of one power supply circuit unit among six negative voltage generation circuits of the six power supply circuit units is rendered active. Thus, increase in standby current can be prevented.

Abstract: A semiconductor integrated circuit device has a negative voltage generation circuit provided at each power supply circuit unit for six memory macros. Therefore, the response with respect to variation in a negative voltage is increased. In a standby mode, a negative voltage supply line for the six memory macros is connected by a switch circuit, and only a negative voltage generation circuit of one power supply circuit unit among six negative voltage generation circuits of the six power supply circuit units is rendered active. Thus, increase in standby current can be prevented.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: A semiconductor integrated circuit device has a negative voltage generation circuit provided at each power supply circuit unit for six memory macros. Therefore, the response with respect to variation in a negative voltage is increased. In a standby mode, a negative voltage supply line for the six memory macros is connected by a switch circuit, and only a negative voltage generation circuit of one power supply circuit unit among six negative voltage generation circuits of the six power supply circuit units is rendered active. Thus, increase in standby current can be prevented.

Abstract: A semiconductor integrated circuit device has a negative voltage generation circuit provided at each power supply circuit unit for six memory macros. Therefore, the response with respect to variation in a negative voltage is increased. In a standby mode, a negative voltage supply line for the six memory macros is connected by a switch circuit, and only a negative voltage generation circuit of one power supply circuit unit among six negative voltage generation circuits of the six power supply circuit units is rendered active. Thus, increase in standby current can be prevented.

Abstract: Provided are a toilet seat device saving energy and accurately stabilizing the temperature of a seating section at a predetermined level in a short time, and a toilet apparatus having the same. A control section adjusts the temperature of a toilet seat section to 18° C. when a heating function is turned on, and during a standby period D1, the control section performs low electric power drive of a lamp heater provided at the toilet seat section. The control section starts 600 W drive of the lamp heater at time t1 after the control section detects user's entry into a room, and the control section maintains the 600 W drive during an inrush current reduction period D2. The control section starts 1200 W drive of the lamp heater at time t2 and maintains the 1200 W drive during a first temperature rise period D3.

Abstract: There is provided a semiconductor device supplied with internal power generated by an internal power generation circuit to perform a stable operation and, also, suppress power consumption. A control circuit, a row/column decoder and a sense amplifier are driven by an internal buck voltage. On the other hand, a data path with high power consumption is driven by an external power supply voltage. A level conversion circuit receives an address signal or a command signal having a voltage level of the external power supply voltage, converts the voltage level to the internal buck voltage, and outputs a resultant signal to the control circuit. A level conversion circuit receives a control signal having a voltage level of the internal buck voltage from the control circuit, converts the voltage level to the external power supply voltage, and outputs a resultant signal to the data path.

Abstract: A semiconductor device has a first operation mode and a second operation mode in which power supply with a higher voltage value than that in the first operation mode is provided. The semiconductor device includes a memory portion having memory cells for storing data and a power supply circuit portion supplying a first voltage and a second voltage to the memory portion. The memory portion writes or reads data to or from the memory cells based on the first voltage and the second voltage, and the power supply circuit portion provides a smaller voltage difference between the first voltage and the second voltage in the second operation mode as compared with the voltage difference in the first operation mode.

Abstract: There is provided a semiconductor device supplied with internal power generated by an internal power generation circuit to perform a stable operation and, also, suppress power consumption. A control circuit, a row/column decoder and a sense amplifier are driven by an internal buck voltage. On the other hand, a data path with high power consumption is driven by an external power supply voltage. A level conversion circuit receives an address signal or a command signal having a voltage level of the external power supply voltage, converts the voltage level to the internal buck voltage, and outputs a resultant signal to the control circuit. A level conversion circuit receives a control signal having a voltage level of the internal buck voltage from the control circuit, converts the voltage level to the external power supply voltage, and outputs a resultant signal to the data path.

Abstract: A semiconductor device has a first operation mode and a second operation mode in which power supply with a higher voltage value than that in the first operation mode is provided. The semiconductor device includes a memory portion having memory cells for storing data and a power supply circuit portion supplying a first voltage and a second voltage to the memory portion. The memory portion writes or reads data to or from the memory cells based on the first voltage and the second voltage, and the power supply circuit portion provides a smaller voltage difference between the first voltage and the second voltage in the second operation mode as compared with the voltage difference in the first operation mode.

Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

Abstract: A semiconductor integrated circuit device has a negative voltage generation circuit provided at each power supply circuit unit for six memory macros. Therefore, the response with respect to variation in a negative voltage is increased. In a standby mode, a negative voltage supply line for the six memory macros is connected by a switch circuit, and only a negative voltage generation circuit of one power supply circuit unit among six negative voltage generation circuits of the six power supply circuit units is rendered active. Thus, increase in standby current can be prevented.

Abstract: A semiconductor device has a first operation mode and a second operation mode in which power supply with a higher voltage value than that in the first operation mode is provided. The semiconductor device includes a memory portion having memory cells for storing data and a power supply circuit portion supplying a first voltage and a second voltage to the memory portion. The memory portion writes or reads data to or from the memory cells based on the first voltage and the second voltage, and the power supply circuit portion provides a smaller voltage difference between the first voltage and the second voltage in the second operation mode as compared with the voltage difference in the first operation mode.

Abstract: There is provided a semiconductor device supplied with internal power generated by an internal power generation circuit to perform a stable operation and, also, suppress power consumption. A control circuit, a row/column decoder and a sense amplifier are driven by an internal buck voltage. On the other hand, a data path with high power consumption is driven by an external power supply voltage. A level conversion circuit receives an address signal or a command signal having a voltage level of the external power supply voltage, converts the voltage level to the internal buck voltage, and outputs a resultant signal to the control circuit. A level conversion circuit receives a control signal having a voltage level of the internal buck voltage from the control circuit, converts the voltage level to the external power supply voltage, and outputs a resultant signal to the data path.

Abstract: An ink jet recording apparatus is provided which can perform high-quality recording without causing a backside smear of a recording medium even in frameless recording where an image is recorded in full size until reaching lengthwise and widthwise ends of the recording medium. In an ink jet recording apparatus for ejecting ink from an ink jet recording head to a recording medium to record an image, the apparatus includes a platen for supporting the recording medium in a position opposed to the ink jet recording head, an ink recovery section for recovering ink ejected outside an end of the recording medium, a common negative pressure chamber for generating a pressure in the ink recovery section lower than the atmospheric pressure, and an air stream passage for communicating the ink recovery section and the common negative pressure chamber with each other.

Abstract: An image forming apparatus having a recording head and a recording medium conveying apparatus for conveying the recording medium from one position to another position. The recording medium conveying apparatus includes a rotary body pair capable of holding the recording medium, a driving device for rotatably driving the rotary body pair, and a rotary body moving device for moving the rotary body from one position to another position. The rotary body moves to a first position for receiving the recording medium from the recording head in a first route and conveying it to a second route, and a second position for conveying the recording medium from the first route to a fixing section in a third route.

Abstract: A recording apparatus capable of securing the positional precision and flatness of a recording medium for the execution of high quality recording with the provision of the air passages which can adsorb the recording medium efficiently to the platen even if the recording medium is curled so as not to allow the adsorbing power to be reduced even when the opening of the platen is covered only partly by the recording medium.

Abstract: An ink jet recording apparatus is provided which can perform high-quality recording without causing a backside smear of a recording medium even in frameless recording where an image is recorded in full size until reaching lengthwise and widthwise ends of the recording medium. In an ink jet recording apparatus for ejecting ink from an ink jet recording head to a recording medium to record an image, the apparatus comprises a platen for supporting the recording medium in a position opposed to the ink jet recording head, an ink recovery section for recovering ink ejected outside an end of the recording medium, a common negative pressure chamber for generating a pressure in the ink recovery section lower than the atmospheric pressure, and an air stream passage for communicating the ink recovery section and the common negative pressure chamber with each other.