Patents by Inventor Kenneth J. Goodnow
Kenneth J. Goodnow has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9337173Abstract: An electrically conducting, vertically displacing microelectromechanical system (MEMS) is formed on a first integrated circuit chip. The first integrated circuit chip is physically connected to a three-dimensional packaging structure. The three-dimensional packaging structure maintains a fixed distance between the first integrated circuit chip and a second integrated circuit chip. A control circuit is operatively connected to the MEMS. The control circuit directs movement of the MEMS between a first position and a second position. The MEMS makes contact with a contact pad on the second integrated circuit chip when it is in the second position forming a conductive path and providing electrical communication between the first integrated circuit chip and the second integrated circuit chip. The MEMS avoids making contact with the contact pad on the second integrated circuit chip when it is in the first position.Type: GrantFiled: August 14, 2015Date of Patent: May 10, 2016Assignee: International Business Machines CorporationInventors: Kenneth J. Goodnow, Todd E. Leonard, Stephen G. Shuma, Peter A. Twombly
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Patent number: 9301424Abstract: A structure and method of using the structure. The structure including an integrated circuit chip having a set of micro-channels; an electro-rheological coolant fluid filling the micro-channels; first and second parallel channel electrodes on opposite sides of at least one micro-channel, the first channel electrode connected to an output of an auto-compensating temperature control circuit, the second channel electrode connected to ground; the auto-compensating temperature control circuit comprising a temperature stable current source connected between a positive voltage rail and the output and having a temperature sensitive circuit connected between ground and the output, a leakage current of the temperature stable current source being essentially insensitive to temperature and a leakage current of the temperature sensitive circuit increasing with temperature.Type: GrantFiled: October 14, 2015Date of Patent: March 29, 2016Assignee: International Business Machines CorporationInventors: Kerry Bernstein, Kenneth J. Goodnow, Clarence R. Ogilvie, John Sargis, Jr., Sebastian T. Ventrone, Charles S. Woodruff
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Patent number: 9264150Abstract: A reactive metal optical security device for implementation in an optical network and/or system to provide a mechanism for disrupting the optical network and/or system. The security device includes a mirror comprising a reactive metal stack and configured to reflect an optical signal and receive an electrical signal. The security device further includes a semiconductor chip configured to send the electrical signal to the mirror.Type: GrantFiled: March 28, 2012Date of Patent: February 16, 2016Assignee: GLOBALFOUNDRIES INC.Inventors: Kerry Bernstein, Kenneth J. Goodnow, Clarence R. Ogilvie, Charles S. Woodruff, Sebastian T. Ventrone
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Patent number: 9257366Abstract: A structure and method of using the structure. The structure including an integrated circuit chip having a set of micro-channels; an electro-rheological coolant fluid filling the micro-channels; first and second parallel channel electrodes on opposite sides of at least one micro-channel, the first channel electrode connected to an output of an auto-compensating temperature control circuit, the second channel electrode connected to ground; the auto-compensating temperature control circuit comprising a temperature stable current source connected between a positive voltage rail and the output and having a temperature sensitive circuit connected between ground and the output, a leakage current of the temperature stable current source being essentially insensitive to temperature and a leakage current of the temperature sensitive circuit increasing with temperature.Type: GrantFiled: October 31, 2013Date of Patent: February 9, 2016Assignee: International Business Machines CorporationInventors: Kerry Bernstein, Kenneth J. Goodnow, Clarence R. Ogilvie, John Sargis, Jr., Sebastian T. Ventrone, Charles S. Woodruff
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Publication number: 20160037682Abstract: A structure and method of using the structure. The structure including an integrated circuit chip having a set of micro-channels; an electro-rheological coolant fluid filling the micro-channels; first and second parallel channel electrodes on opposite sides of at least one micro-channel, the first channel electrode connected to an output of an auto-compensating temperature control circuit, the second channel electrode connected to ground; the auto-compensating temperature control circuit comprising a temperature stable current source connected between a positive voltage rail and the output and having a temperature sensitive circuit connected between ground and the output, a leakage current of the temperature stable current source being essentially insensitive to temperature and a leakage current of the temperature sensitive circuit increasing with temperature.Type: ApplicationFiled: October 14, 2015Publication date: February 4, 2016Inventors: Kerry Bernstein, Kenneth J. Goodnow, Clarence R. Ogilvie, John Sargis, JR., Sebastian T. Ventrone, Charles S. Woodruff
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Patent number: 9230940Abstract: Structures and methods for self-powered devices are disclosed herein. Specifically, disclosed herein is a stacked, three-dimensional integrated circuit including a power generation die including a power source. The integrated circuit also includes a functional system die including one or more functional components that are powered by power generated by the power source. The power generation die and the functional system die are stacked in a three-dimensional structure.Type: GrantFiled: September 13, 2013Date of Patent: January 5, 2016Assignee: GLOBALFOUNDRIES INC.Inventors: Kenneth J. Goodnow, Todd E. Leonard, Stephen G. Shuma, Peter A. Twombly
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Publication number: 20150348947Abstract: An electrically conducting, vertically displacing microelectromechanical system (MEMS) is formed on a first integrated circuit chip. The first integrated circuit chip is physically connected to a three-dimensional packaging structure. The three-dimensional packaging structure maintains a fixed distance between the first integrated circuit chip and a second integrated circuit chip. A control circuit is operatively connected to the MEMS. The control circuit directs movement of the MEMS between a first position and a second position. The MEMS makes contact with a contact pad on the second integrated circuit chip when it is in the second position forming a conductive path and providing electrical communication between the first integrated circuit chip and the second integrated circuit chip. The MEMS avoids making contact with the contact pad on the second integrated circuit chip when it is in the first position.Type: ApplicationFiled: August 14, 2015Publication date: December 3, 2015Inventors: Kenneth J. Goodnow, Todd E. Leonard, Stephen G. Shuma, Peter A. Twombly
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Patent number: 9123492Abstract: An electrically conducting, vertically displacing microelectromechanical system (MEMS) is formed on a first integrated circuit chip. The first integrated circuit chip is physically connected to a three-dimensional packaging structure. The three-dimensional packaging structure maintains a fixed distance between the first integrated circuit chip and a second integrated circuit chip. A control circuit is operatively connected to the MEMS. The control circuit directs movement of the MEMS between a first position and a second position. The MEMS makes contact with a contact pad on the second integrated circuit chip when it is in the second position forming a conductive path and providing electrical communication between the first integrated circuit chip and the second integrated circuit chip. The MEMS avoids making contact with the contact pad on the second integrated circuit chip when it is in the first position.Type: GrantFiled: December 19, 2012Date of Patent: September 1, 2015Assignee: International Business Machines CorporationInventors: Kenneth J. Goodnow, Todd E. Leonard, Stephen G. Shuma, Peter A. Twombly
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Publication number: 20150179557Abstract: A heat conductive layer is deposited on a first surface of a wafer of semiconductor chips. The heat conductive layer is etched to form vias that expose through-electrodes on the first surface of each semiconductor chip. Conductive bumps are deposited on the through-electrodes on a second surface of each semiconductor chip. The semiconductor chips are stacked, wherein the conductive bumps of a second one of the semiconductor chips electrically contact the through-electrodes of a first one of the semiconductor chips through the vias of the first semiconductor chip and the conductive bumps of a third one of the semiconductor chips electrically contact the through-electrodes of the second semiconductor chip through the vias of the second semiconductor chip.Type: ApplicationFiled: December 21, 2013Publication date: June 25, 2015Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kenneth J. Goodnow, Richard S. Graf, Clarence R. Ogilvie, Sebastian T. Ventrone, Charles S. Woodruff
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Patent number: 9052724Abstract: An integrated circuit chip having micro-channels formed in multiple regions of the integrated circuit chip and a method of cooling the integrated circuit chip. The method includes for any region of the multiple regions, allowing a coolant to flow through micro-channels of the region only when a temperature of the region exceed a first specified temperature and blocking the coolant from flowing through the micro-channels of the region when a temperature of the region is below a second specified temperature.Type: GrantFiled: August 7, 2012Date of Patent: June 9, 2015Assignee: International Business Machines CorporationInventors: Kerry Bernstein, Kenneth J. Goodnow, Clarence R. Ogilvie
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Publication number: 20150116939Abstract: A structure and method of using the structure. The structure including an integrated circuit chip having a set of micro-channels; an electro-rheological coolant fluid filling the micro-channels; first and second parallel channel electrodes on opposite sides of at least one micro-channel, the first channel electrode connected to an output of an auto-compensating temperature control circuit, the second channel electrode connected to ground; the auto-compensating temperature control circuit comprising a temperature stable current source connected between a positive voltage rail and the output and having a temperature sensitive circuit connected between ground and the output, a leakage current of the temperature stable current source being essentially insensitive to temperature and a leakage current of the temperature sensitive circuit increasing with temperature.Type: ApplicationFiled: October 31, 2013Publication date: April 30, 2015Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kerry Bernstein, Kenneth J. Goodnow, Clarence R. Ogilvie, John Sargis, Jr., Sebastian T. Ventrone, Charles S. Woodruff
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Publication number: 20150077173Abstract: Structures and methods for self-powered devices are disclosed herein. Specifically, disclosed herein is a stacked, three-dimensional integrated circuit including a power generation die including a power source. The integrated circuit also includes a functional system die including one or more functional components that are powered by power generated by the power source. The power generation die and the functional system die are stacked in a three-dimensional structure.Type: ApplicationFiled: September 13, 2013Publication date: March 19, 2015Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kenneth J. GOODNOW, Todd E. LEONARD, Stephen G. SHUMA, Peter A. TWOMBLY
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Publication number: 20140166461Abstract: An electrically conducting, vertically displacing microelectromechanical system (MEMS) is formed on a first integrated circuit chip. The first integrated circuit chip is physically connected to a three-dimensional packaging structure. The three-dimensional packaging structure maintains a fixed distance between the first integrated circuit chip and a second integrated circuit chip. A control circuit is operatively connected to the MEMS. The control circuit directs movement of the MEMS between a first position and a second position. The MEMS makes contact with a contact pad on the second integrated circuit chip when it is in the second position forming a conductive path and providing electrical communication between the first integrated circuit chip and the second integrated circuit chip. The MEMS avoids making contact with the contact pad on the second integrated circuit chip when it is in the first position.Type: ApplicationFiled: December 19, 2012Publication date: June 19, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kenneth J. Goodnow, Todd E. Leonard, Stephen G. Shuma, Peter A. Twombly
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Publication number: 20140043757Abstract: An integrated circuit chip having micro-channels formed in multiple regions of the integrated circuit chip and a method of cooling the integrated circuit chip. The method includes for any region of the multiple regions, allowing a coolant to flow through micro-channels of the region only when a temperature of the region exceed a first specified temperature and blocking the coolant from flowing through the micro-channels of the region when a temperature of the region is below a second specified temperature.Type: ApplicationFiled: August 7, 2012Publication date: February 13, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kerry Bernstein, Kenneth J. Goodnow, Clarence R. Ogilvie
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Patent number: 8575964Abstract: Localized logic regions of a circuit include a local comparator electrically connected to a local resistive voltage circuit, to a local resistive ground circuit, and to a local register structure. The local comparator supplies a clock pulse to the local register structures when the local reference voltage is below a local voltage threshold. Activity in the local combinatorial logic structure causes the local reference voltage to drop below the local reference voltage independently of changes in the global reference voltage causing the comparator to output the clock pulse (with sufficient delay to allow the logic results to be stored in the registers only after setup times have been met in the local logic devices). This eliminates the need for a clock distribution tree, thereby saving power when there is no activity in the local combinatorial logic structure.Type: GrantFiled: March 22, 2012Date of Patent: November 5, 2013Assignee: International Business Machines CorporationInventors: Kerry Bernstein, Kenneth J. Goodnow, Clarence R. Ogilvie, John Sargis, Jr., Sebastian T. Ventrone, Charles S. Woodruff
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Publication number: 20130259488Abstract: A reactive metal optical security device for implementation in an optical network and/or system to provide a mechanism for disrupting the optical network and/or system. The security device includes a mirror comprising a reactive metal stack and configured to reflect an optical signal and receive an electrical signal. The security device further includes a semiconductor chip configured to send the electrical signal to the mirror.Type: ApplicationFiled: March 28, 2012Publication date: October 3, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kerry BERNSTEIN, Kenneth J. GOODNOW, Clarence R. OGILVIE, Charles S. WOODRUFF, Sebastian T. VENTRONE
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Patent number: 8549335Abstract: Systems and methods for selectively utilizing secondary power sources during peak power times are provided for. The method includes receiving a notification of a peak power time, and discontinuing use of a primary power supply and beginning use of a secondary power supply based upon the notification.Type: GrantFiled: August 24, 2012Date of Patent: October 1, 2013Assignee: International Business Machines CorporationInventors: Kenneth J. Goodnow, Stephen G. Shuma, Peter A. Twombly
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Publication number: 20130249596Abstract: Localized logic regions of a circuit include a local comparator electrically connected to a local resistive voltage circuit, to a local resistive ground circuit, and to a local register structure. The local comparator supplies a clock pulse to the local register structures when the local reference voltage is below a local voltage threshold. Activity in the local combinatorial logic structure causes the local reference voltage to drop below the local reference voltage independently of changes in the global reference voltage causing the comparator to output the clock pulse (with sufficient delay to allow the logic results to be stored in the registers only after setup times have been met in the local logic devices). This eliminates the need for a clock distribution tree, thereby saving power when there is no activity in the local combinatorial logic structure.Type: ApplicationFiled: March 22, 2012Publication date: September 26, 2013Applicant: International Business Machines CorporationInventors: Kerry Bernstein, Kenneth J. Goodnow, Clarence R. Ogilvie, John Sargis, JR., Sebastian T. Ventrone, Charles S. Woodruff
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Patent number: 8513948Abstract: A MEMS component is monitored to determine its status. Sensors are deployed to sense the MEMS component and produce detection signals that are analyzed to determine the MEMS component state. An indicator device alerts a user of the status, particularly if the MEMS component has failed. Additionally, the MEMS component monitoring system may be practiced as a design structure encoded on computer readable storage media as part of a circuit design system.Type: GrantFiled: November 22, 2010Date of Patent: August 20, 2013Assignee: International Business Machines CorporationInventors: Jonathan P. Ebbers, Kenneth J. Goodnow, Stephen Gerard Shuma, Peter A. Twombly
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Patent number: 8452566Abstract: An integrated circuit (IC) including a warranty and enforcement system, and a related design structure and HDL design structure are disclosed. In one embodiment, an IC includes a parameter obtainer for obtaining a value of a parameter of the IC; a warranty data storage system for storing warranty limit data regarding the IC; a comparator for determining whether a warranty limit has been exceeded by comparing the value of the parameter to a corresponding warranty limit; and an action taker for taking a prescribed action in response to the warranty limit being exceeded.Type: GrantFiled: May 2, 2008Date of Patent: May 28, 2013Assignee: International Business Machines CorporationInventors: Kenneth J. Goodnow, Suzanne Granato, Eze Kamanu, Todd E. Leonard, Ramnath Ravindran, Kyle E. Schneider, Peter A. Twombly