Patents by Inventor Kensuke TAGUCHI

Kensuke TAGUCHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12057500
    Abstract: A power semiconductor device includes a termination region having a corner and an element region inside the termination region. An SiC substrate spans the element region and the termination region. An interlayer insulating film has an outer edge in the termination region. A source electrode is in contact with the SiC substrate in the element region, and has an outer edge on the interlayer insulating film in the termination region. An insulating protective film covers the outer edge of the interlayer insulating film and the outer edge of the source electrode, and has an inner edge on the source electrode. At the corner of the termination region, the outer edge of the interlayer insulating film has a radius of curvature R1, and the inner edge of the insulating protective film has a radius of curvature R2. The radius of curvature R2 is greater than the radius of curvature R1.
    Type: Grant
    Filed: February 5, 2020
    Date of Patent: August 6, 2024
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazunari Nakata, Kensuke Taguchi
  • Patent number: 12046459
    Abstract: A heater component has a substrate part and a thin coating heater which is equipped outside this substrate part and generates heat by power supply. The thin coating heater is formed of a thermal sprayed coating. The thin coating heater has a heater body and a heater extension part. The heater body is arranged on a first end face of the substrate part. The heater extension part is extended from the heater body to a second end face of the substrate part through a side surface of the substrate part. A tip part of the heater extension part is a heater power supplying part for supplying electric power to the heater body.
    Type: Grant
    Filed: November 18, 2022
    Date of Patent: July 23, 2024
    Assignee: TOCALO CO., LTD.
    Inventors: Shikou Abukawa, Kensuke Taguchi, Yu Asakimori, Ryutaro Kawamura
  • Patent number: 11935919
    Abstract: A method for manufacturing a semiconductor device includes forming, on first and second impurity layers on a termination region side, an insulating layer, forming a first metal film and a second metal film in this order on the insulating layer and a drift layer, performing dry etching on the first and second metal films all together so that a position of a first end of a metallized layer, which is a remaining part of the first metal film, in the interface region on the termination region side and a position of a second end of an electrode, which is a remaining part of the second metal film, in the interface region on the terminal region side are the same in plan view. The first and second ends are closer to the active region than an end of the second impurity layer on the termination region side in plan view.
    Type: Grant
    Filed: August 1, 2022
    Date of Patent: March 19, 2024
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoshinori Matsuno, Yasushi Takaki, Kensuke Taguchi, Kosuke Miyazaki
  • Patent number: 11915988
    Abstract: A first electrode film is electrically connected to a source region of a semiconductor substrate, and disposed over a main surface of the semiconductor substrate. A second electrode film is electrically connected to a gate electrode, and disposed over the main surface. A third electrode film is disposed over the main surface away from the first electrode film. A protective dielectric film is disposed over the main surface, covers only a portion of each of the first electrode film and the second electrode film and covers at least portion of the third electrode film, and is made of a thermosetting resin. The main surface has a peripheral region and an inner region enclosed by the peripheral region, and the protective dielectric film has a peripheral portion covering the peripheral region and has a first inner portion crossing the inner region and covering at least portion of the third electrode film.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: February 27, 2024
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Masahiro Yokogawa, Kensuke Taguchi
  • Publication number: 20240043982
    Abstract: There is provided a thermal spray coating which has excellent plasma erosion resistance, which protects members of a plasma etching device from plasma erosion over a long period of term, and which can contribute to the stable production of devices and a longer life of members. The thermal spray material which is one aspect of this invention contains a composite compound containing a rare earth fluoride in the proportion of 40 mol % or more and 80 mol % or less, a magnesium fluoride in the proportion of 10 mol % or more and 40 mol % or less, and a calcium fluoride in the proportion of 0 mol % or more and 40 mol % or less.
    Type: Application
    Filed: November 18, 2021
    Publication date: February 8, 2024
    Applicants: TOCALO Co., Ltd., FUJIMI INCORPORATED
    Inventors: Yasuhiro Shiojiri, Tatsuo Suidzu, Kensuke Taguchi, Hiroaki Mizuno, Takaya Masuda
  • Publication number: 20230177931
    Abstract: An information processing system 10 includes an imager 14 and a controller. The imager 14 generates an image by performing image capturing. The controller estimates an object contained in the image based on the image. The controller is able to estimate an object and a category of the object by performing recognition processing on the image. The controller generates an instruction regarding the object based on the estimated category of the object when estimation of the object fails in the recognition processing.
    Type: Application
    Filed: June 2, 2021
    Publication date: June 8, 2023
    Applicant: KYOCERA Corporation
    Inventors: Jaechul KIM, Kensuke TAGUCHI, Xiaoyan DAI
  • Patent number: 11631574
    Abstract: The heater component (1) has a substrate part (2), and a thin coating heater (4) which is equipped outside this substrate part (2) and generates heat by power supply. The thin coating heater (4) is formed of a thermal sprayed coating. The thin coating heater (4) has a heater body (10) and a heater extension part (11). The heater body (10) is arranged on a first end face (2a) of the substrate part (2). The heater extension part (11) is extended from the heater body (10) to a second end face (2b) of the substrate part (2) through a side surface (2c) of the substrate part (2). A tip part (11s) of the heater extension part (11) is a heater power supplying part (12) for supplying electric power to the heater body (10).
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: April 18, 2023
    Assignee: TOCALO CO., LTD.
    Inventors: Shikou Abukawa, Kensuke Taguchi, Yu Asakimori, Ryutaro Kawamura
  • Publication number: 20230079853
    Abstract: A heater component has a substrate part and a thin coating heater which is equipped outside this substrate part and generates heat by power supply. The thin coating heater is formed of a thermal sprayed coating. The thin coating heater has a heater body and a heater extension part. The heater body is arranged on a first end face of the substrate part. The heater extension part is extended from the heater body to a second end face of the substrate part through a side surface of the substrate part. A tip part of the heater extension part is a heater power supplying part for supplying electric power to the heater body.
    Type: Application
    Filed: November 18, 2022
    Publication date: March 16, 2023
    Inventors: Shikou ABUKAWA, Kensuke TAGUCHI, Yu ASAKIMORI, Ryutaro KAWAMURA
  • Publication number: 20220367613
    Abstract: A method for manufacturing a semiconductor device includes forming, on first and second impurity layers on a termination region side, an insulating layer, forming a first metal film and a second metal film in this order on the insulating layer and a drift layer, performing dry etching on the first and second metal films all together so that a position of a first end of a metallized layer, which is a remaining part of the first metal film, in the interface region on the termination region side and a position of a second end of an electrode, which is a remaining part of the second metal film, in the interface region on the terminal region side are the same in plan view. The first and second ends are closer to the active region than an end of the second impurity layer on the termination region side in plan view.
    Type: Application
    Filed: August 1, 2022
    Publication date: November 17, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoshinori MATSUNO, Yasushi TAKAKI, Kensuke TAGUCHI, Kosuke MIYAZAKI
  • Patent number: 11437465
    Abstract: A semiconductor device includes an insulating layer provided on a first impurity layer and a second impurity layer on a termination region side, a metallized layer provided on the first impurity layer and the second impurity layer exposed from the insulating layer and on the insulating layer, and an electrode provided on the metallized layer. A position of a first end of the metallized layer on the termination region side and a position of a second end of the electrode on the termination region side are the same in plan view.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: September 6, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoshinori Matsuno, Yasushi Takaki, Kensuke Taguchi, Kosuke Miyazaki
  • Patent number: 11437505
    Abstract: Even when a stress is applied due to energization or switching operation, a connection state of electrode layers can be appropriately maintained. A semiconductor device includes a semiconductor layer of first conductivity type, an upper surface structure formed on a surface layer of the semiconductor layer, and an upper surface electrode formed over the upper surface structure. The upper surface electrode includes a first electrode formed on an upper surface of the semiconductor layer, and a second electrode formed over an upper surface of the first electrode. The first concave portion is formed on the upper surface of the first electrode. A side surface of the first concave portion has a tapered shape. The second electrode is formed over the upper surface of the first electrode including an inside of the first concave portion.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: September 6, 2022
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazunari Nakata, Kensuke Taguchi
  • Publication number: 20220270351
    Abstract: An image recognition evaluation program is executed by an evaluation apparatus for evaluating recognition accuracy of an image recognition apparatus performing image segmentation. The evaluation apparatus is caused to perform image processing on an input image to be input to the image recognition apparatus, and generate a plurality of processed input images. Thereafter, the evaluation apparatus is caused to input the generated plurality of processed input images to the image recognition apparatus, and obtain a plurality of output images classified into classes by image segmentation being performed by the image recognition apparatus. Next, the evaluation apparatus is caused to calculate a variance value of each of the plurality of the output images, based on the obtained plurality of output images.
    Type: Application
    Filed: June 10, 2020
    Publication date: August 25, 2022
    Applicant: KYOCERA Corporation
    Inventors: Shun SUGAHARA, Kensuke TAGUCHI
  • Publication number: 20220208578
    Abstract: A temperature control unit has a temperature control unit body, a temperature control part provided inside the temperature control unit body, which raises and lowers a surface temperature of the temperature control unit body on a side where a temperature control object is located, and a thin coating temperature measuring resistance part composed of a thermal sprayed coating. The thin coating temperature measuring resistance part is formed over a certain range in a surface on the side where the temperature control object is located, and which is provided inside the temperature control unit body on a side closer to the temperature control object than the temperature control part. The thin coating temperature measuring resistance part can accurately measure an average temperature of a temperature control surface.
    Type: Application
    Filed: May 19, 2020
    Publication date: June 30, 2022
    Inventors: Ryutaro KAWAMURA, Kensuke TAGUCHI
  • Patent number: 11272579
    Abstract: Provided is a heat generating component of which volume resistivity hardly varies even if used repeatedly at a high temperature for a long period of time. Since a thin coating heater part (13) formed on a substrate part (12) is composed of a thermal sprayed coating containing TixOy (wherein, 0<y/x<2.0 is satisfied), obtained is a heat generating component (11) having volume resistivity which is suitable for a heater and hardly varies even if prescribed temperature change and temperature keeping are repeated.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: March 8, 2022
    Assignee: TOCALO CO., LTD.
    Inventors: Shikou Abukawa, Kensuke Taguchi, Toru Moriyama, Yasuhiro Sato, Akira Kumagai, Yu Asakimori
  • Publication number: 20220059688
    Abstract: A power semiconductor device includes a termination region having a corner and an element region inside the termination region. An SiC substrate spans the element region and the termination region. An interlayer insulating film has an outer edge in the termination region. A source electrode is in contact with the SiC substrate in the element region, and has an outer edge on the interlayer insulating film in the termination region. An insulating protective film covers the outer edge of the interlayer insulating film and the outer edge of the source electrode, and has an inner edge on the source electrode. At the corner of the termination region, the outer edge of the interlayer insulating film has a radius of curvature R1, and the inner edge of the insulating protective film has a radius of curvature R2. The radius of curvature R2 is greater than the radius of curvature R1.
    Type: Application
    Filed: February 5, 2020
    Publication date: February 24, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kazunari NAKATA, Kensuke TAGUCHI
  • Patent number: 11217449
    Abstract: There is provided a technique for suppressing the operation of a parasitic transistor in a semiconductor device having a voltage sense structure. The semiconductor device includes: a semiconductor layer; a first impurity region; a second impurity region; a first semiconductor region; a second semiconductor region; a first electrode; a second electrode; and a third electrode. The second impurity region includes a low lifetime region at least under the second semiconductor region. The low lifetime region is a region having a defect density higher than that in a surface layer of the second impurity region or a region in which a heavy metal is diffused.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: January 4, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventors: Tomohide Terashima, Yasuhiro Kagawa, Kensuke Taguchi
  • Patent number: 11183386
    Abstract: There is provided a technique for suppressing the operation of a parasitic transistor in a semiconductor device having a voltage sense structure. The semiconductor device includes: a semiconductor layer; a first impurity region; a second impurity region; a first semiconductor region; a second semiconductor region; a first electrode; a second electrode; and a third electrode. The second impurity region includes a low lifetime region at least under the second semiconductor region. The low lifetime region is a region having a defect density higher than that in a surface layer of the second impurity region or a region in which a heavy metal is diffused.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: November 23, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventors: Tomohide Terashima, Yasuhiro Kagawa, Kensuke Taguchi
  • Publication number: 20210166984
    Abstract: A first electrode film is electrically connected to a source region of a semiconductor substrate, and disposed over a main surface of the semiconductor substrate. A second electrode film is electrically connected to a gate electrode, and disposed over the main surface. A third electrode film is disposed over the main surface away from the first electrode film. A protective dielectric film is disposed over the main surface, covers only a portion of each of the first electrode film and the second electrode film and covers at least portion of the third electrode film, and is made of a thermosetting resin. The main surface has a peripheral region and an inner region enclosed by the peripheral region, and the protective dielectric film has a peripheral portion covering the peripheral region and has a first inner portion crossing the inner region and covering at least portion of the third electrode film.
    Type: Application
    Filed: April 26, 2019
    Publication date: June 3, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventors: Masahiro YOKOGAWA, Kensuke TAGUCHI
  • Publication number: 20210036141
    Abstract: Even when a stress is applied due to energization or switching operation, a connection state of electrode layers can be appropriately maintained. A semiconductor device includes a semiconductor layer of first conductivity type, an upper surface structure formed on a surface layer of the semiconductor layer, and an upper surface electrode formed over the upper surface structure. The upper surface electrode includes a first electrode formed on an upper surface of the semiconductor layer, and a second electrode formed over an upper surface of the first electrode. The first concave portion is formed on the upper surface of the first electrode. A side surface of the first concave portion has a tapered shape. The second electrode is formed over the upper surface of the first electrode including an inside of the first concave portion.
    Type: Application
    Filed: February 19, 2019
    Publication date: February 4, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kazunari NAKATA, Kensuke TAGUCHI
  • Publication number: 20200395439
    Abstract: A semiconductor device includes an insulating layer provided on a first impurity layer and a second impurity layer on a termination region side, a metallized layer provided on the first impurity layer and the second impurity layer exposed from the insulating layer and on the insulating layer, and an electrode provided on the metallized layer. A position of a first end of the metallized layer on the termination region side and a position of a second end of the electrode on the termination region side are the same in plan view.
    Type: Application
    Filed: April 10, 2020
    Publication date: December 17, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoshinori MATSUNO, Yasushi TAKAKI, Kensuke TAGUCHI, Kosuke MIYAZAKI