Abstract: A nonvolatile memory device has a memory cell including a resistance change layer, a first electrode, and a second electrode. The resistance change layer switches between high and low resistance states due to the transfer of metal ions from the first electrode in response to voltages applied between the electrodes. The first electrode is formed on a first side of the resistance change layer, and provides metal ions. The second electrode is formed on a second side of the resistance change layer. A memory cell region is formed between the first electrode and the second electrode with the resistance change layer. The memory device also includes a high permittivity layer with a higher dielectric constant than the resistance change layer.

Abstract: A non-volatile semiconductor memory includes a word line extending in a first direction, a first electrode connected to the word line electrically, an ion diffusion layer with connected to the first electrode electrically, a second electrode connected to the ion diffusion layer electrically and formed of a metal to be diffused into the ion diffusion layer when a positive voltage is supplied thereto, and a bit line extending in a second direction perpendicular to the first direction, the bit line connected to the second electrode electrically. The ion diffusion layer has a first region disposed on the first electrode and a second region disposed between the first region and the second electrode, and the metal is more difficult to diffuse into the second region than into the first region.

Abstract: A detecting apparatus includes a threshold detection circuit that detects by a switchable time constant, a threshold of a level of an input optical burst signal; an input detection circuit that detects input of the optical burst signal; a level detection circuit that detects a level of the optical burst signal; a switching circuit that switches the time constant when a period that corresponds to the level detected by the level detection circuit has elapsed after the input is detected by the input detection circuit; and an output circuit that outputs the threshold detected by the threshold detection circuit.

Abstract: A nonvolatile memory device has a memory cell including a resistance change layer, a first electrode, and a second electrode. The resistance change layer switches between high and low resistance states due to the transfer of metal ions from the first electrode in response to voltages applied between the electrodes. The first electrode is formed on a first side of the resistance change layer, and provides metal ions. The second electrode is formed on a second side of the resistance change layer. A memory cell region is formed between the first electrode and the second electrode with the resistance change layer. The memory device also includes a high permittivity layer with a higher dielectric constant than the resistance change layer.

Abstract: According to one embodiment, a nonvolatile memory device includes a word line interconnect layer, a bit line interconnect layer, and a pillar. The word line interconnect layer includes a plurality of word lines extending in a first direction. The bit line interconnect layer includes a plurality of bit lines extending in a second direction. The pillar is disposed between each of the word lines and each of the bit lines. The pillar includes a current selection film and a plurality of variable resistance films stacked on the current selection film. One variable resistance film includes a metal and either oxygen or nitrogen. Remainder of the variable resistance films include the metal, either oxygen or nitrogen, and a highly electronegative substance having electronegativity higher than electronegativity of the metal. A concentration of highly electronegative substance in the remainder of the variable resistance films is different among the variable resistance films.

Abstract: According to one embodiment, a nonvolatile memory device includes a first function layer. The first function layer includes a first electrode layer, a second electrode layer, and a variable resistance layer. The second electrode layer is opposed to the first electrode layer. The variable resistance layer is provided between the first electrode layer and the second electrode layer. Resistance state of the variable resistance layer is variable. The first function layer includes a first intermediate layer. The first intermediate layer is provided between the first electrode layer and the variable resistance layer. The first intermediate layer contacts the first electrode layer and the variable resistance layer.

Abstract: A resistance change element including: a lower electrode formed on at least one of a semiconductor and insulating substrate; a resistance change material layer formed on the lower electrode and including a transition metal oxide as a major component; and an upper electrode formed on the resistance change material layer. The resistance change material layer is formed of a nickel oxide containing nickel vacancy and having a higher oxygen concentration than a stoichiometric composition, and has a stacked structure with different composition ratios.

Abstract: According to one embodiment, a nonvolatile memory device includes a word line interconnect layer, a bit line interconnect layer, and a pillar. The word line interconnect layer includes a plurality of word lines extending in a first direction. The bit line interconnect layer includes a plurality of bit lines extending in a second direction. The pillar is disposed between each of the word lines and each of the bit lines. The pillar includes a current selection film and a plurality of variable resistance films stacked on the current selection film. One variable resistance film includes a metal and either oxygen or nitrogen. Remainder of the variable resistance films include the metal, either oxygen or nitrogen, and a highly electronegative substance having electronegativity higher than electronegativity of the metal. A concentration of highly electronegative substance in the remainder of the variable resistance films is different among the variable resistance films.

Abstract: A semiconductor memory device according to an embodiment includes: first lines provided on a substrate; second lines provided between the first lines and the substrate so as to intersect the first lines; and a first memory cell array including first memory cells, each of the first memory cells being provided at respective intersections of the first lines and the second lines and including a current rectifying element and a variable resistor connected in series. The variable resistor of the first memory cell includes a first recording layer and a second recording layer, the first recording layer being made of an oxide of a first metal material, the second recording layer being made of the first metal material and being formed so as to contact with the first recording layer. The second recording layer is closer to the first line than the first recording layer is.

Abstract: According to one embodiment, a nonvolatile memory device is provided, which includes a nonvolatile memory element in which an anode, a nonvolatile memory layer formed of a metal oxide film, and a cathode are stacked. The anode is formed of a metal nitride material and includes nitrogen more than a stoichiometric ratio of the metal nitride material. The cathode is formed of a metal material.

Abstract: According to one embodiment, a nonvolatile memory device including a nonvolatile memory layer is provided. The nonvolatile memory layer is formed of a metal oxide film that includes an element with a higher electronegativity compared with a metal element forming the metal oxide film in the metal oxide film at a concentration of 25 at % or less.

Abstract: A formation method of a metallic compound layer includes preparing, in a chamber, a substrate having a surface on which a semiconductor material of silicon, germanium, or silicon germanium is exposed, and forming a metallic compound layer, includes: supplying a raw material gas containing a metal for forming a metallic compound with the semiconductor material to the chamber; heating the substrate to a temperature at which the raw material gas is pyrolyzed; and forming a metallic compound layer by reaction of the metal with the semiconductor material so that no layer of the metal is deposited on the substrate. A manufacturing method of a semiconductor device employs this formation method of a metallic compound layer.

Abstract: A semiconductor memory device of an embodiment includes: a cathode electrode formed of a p-type semiconductor material; a resistance change film being in contact with the cathode electrode; and an anode electrode being contact with the resistance change film.

Abstract: A semiconductor device including a silicon substrate and a field effect transistor including a gate insulating film on the silicon substrate, a gate electrode on the gate insulating film, and source/drain regions formed in the substrate on opposite sides of the gate electrode, wherein the gate electrode includes a silicide layer containing an Ni3Si crystal phase, at least in a portion of the gate electrode, the portion including a lower surface thereof, and the transistor includes an adhesion layer containing a metal oxide component, between the gate insulating film and the gate electrode.

Abstract: A semiconductor device includes a gate electrode line provided to extend from an N-type area through a device isolation area to a P-type area, and source/drain diffused regions formed in N-type and P-type areas. The gate electrode line includes a first silicide region which configures a P-type MOSFET gate electrode and includes therein a silicide of metal M1, a second silicide region which configures an N-type MOSFET gate electrode and includes therein a silicide of metal M2, and an impurity-doped silicon region which is provided on a device isolation area and includes therein impurities at a higher concentration than both the gate electrodes.

Abstract: A variable resistance non-volatile memory device of the laminated structure of an upper electrode a variable resistance material a lower electrode includes an insulating film formed for being contacted with the variable resistance material and a reset electrode formed for being contacted with the insulating film without being contacted with the upper electrode or the lower electrode. The device is reset by applying a voltage to the reset electrode. A low resistance value for the set state and a high resistance value for the reset state may be obtained as the current during the reset operation of the device is reduced. A low reset current and a high resistance ratio between the resistance value for the set state and that for the reset state are simultaneously achieved.

Abstract: A resistance change element including: a lower electrode formed on at least one of a semiconductor and insulating substrate; a resistance change material layer formed on the lower electrode and including a transition metal oxide as a major component; and an upper electrode formed on the resistance change material layer. The resistance change material layer is formed of a nickel oxide containing nickel vacancy and having a higher oxygen concentration than a stoichiometric composition, and has a stacked structure with different composition ratios.

Abstract: There is provided a semiconductor device having excellent device characteristics and reliability in which Vth values of an nMOS transistor and a pMOS transistor are controlled to be values necessary for a low-power device. The semiconductor device includes a pMOS transistor and an nMOS transistor formed by using an SOI substrate. The pMOS transistor is a fully depleted MOS transistor including a first gate electrode comprising at least one type of crystalline phase selected from the group consisting of a WSi2 crystalline phase, an MoSi2 crystalline phase, an NiSi crystalline phase, and an NiSi2 crystalline phase as silicide region (1). The nMOS transistor is a fully depleted MOS transistor comprising at least one type of crystalline phase selected from the group consisting of a PtSi crystalline phase, a Pt2Si crystalline phase, an IrSi crystalline phase, an Ni2Si crystalline phase, and an Ni3Si crystalline phase as silicide region (2).

Abstract: A semiconductor device includes a gate electrode line provided to extend from an N-type area through a device isolation area to a P-type area, and source/drain diffused regions formed in N-type and P-type areas. The gate electrode line includes a first silicide region which configures a P-type MOSFET gate electrode and includes therein a silicide of metal M1, a second silicide region which configures an N-type MOSFET gate electrode and includes therein a silicide of metal M2, and an impurity-doped silicon region which is provided on a device isolation area and includes therein impurities at a higher concentration than both the gate electrodes.

Abstract: A variable resistance element includes: a first electrode; a variable resistance material layer formed on the first electrode; and a second electrode formed on this variable resistance material layer. The variable resistance material layer is made of an uncrystallized material including a transition metal oxide, which is an oxide of a transition metal M1, the transition metal oxide containing an oxide of a nontransition metal element M2.