Patents by Inventor Kenta Hirose

Kenta Hirose has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11979226
    Abstract: A wavelength cross-connect device performs relay processing, the relay processing being such that wavelength multiplexed signal lights, which are multiband transmitted from a plurality of routes, are demultiplexed into different wavelength bands, and for each route, respective optical signals of the different wavelength bands are amplified, then subject to route change by WSSs and outputted to output side routes M. The device includes C-band WXC units that are the same in total number as the wavelength bands of the optical signals of the respective wavelength bands and perform relay processing on optical signals of a specific wavelength band of the different wavelength bands.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: May 7, 2024
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Hiroki Kawahara, Takeshi Seki, Sachio Suda, Kohei Saito, Kenta Hirose
  • Patent number: 11824583
    Abstract: A cyclic wavelength band permutation device (31) includes as many wavelength band converters (32a to 32c) as the wavelength bands of optical signals (S1, C1, and L1), and the wavelength band converters are individually connected to the output terminals of corresponding optical amplifiers among a plurality of optical amplifiers (17a to 17c) connected to an optical fiber (16) in an inserted manner. When a wavelength-multiplexed signal beam obtained by multiplexing optical signals in different wavelength bands is multiband-transmitted through an optical fiber while being amplified by the plurality of optical amplifiers, each wavelength band converter performs a cyclic permutation process of transitioning or converting an optical signal allocated to the shorter wavelength band side in the bands of the optical fiber to the longer wavelength band side, and also transitioning or converting an optical signal allocated to the longest wavelength band to the shortest wavelength band.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: November 21, 2023
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Hiroki Kawahara, Takeshi Seki, Sachio Suda, Kohei Saito, Kenta Hirose
  • Publication number: 20230268998
    Abstract: Provided is an optical transmission system that includes: a transponder having a transmitter and a receiver; a loopback path that directly couples a signal of the transmitter to the receiver; and a server that calculates, based on a signal transmitted using the loopback path, a compensation value to compensate for frequency characteristics of a signal transmitted from the transmitter.
    Type: Application
    Filed: July 2, 2020
    Publication date: August 24, 2023
    Inventors: Kohei SAITO, Takeshi SEKI, Sachio SUDA, Hiroki KAWAHARA, Kenta HIROSE, Hideki MAEDA
  • Publication number: 20230244025
    Abstract: A multi-core fiber (23) connects an optical transmitter device (10) and an optical receiver device (30) to each other. The multi-core fiber (23) includes cores each having a wavelength dispersion characteristic different from a wavelength dispersion characteristic of another adjacent core of the cores. In an optical transport system (100), the optical transmitter device (10) and the optical receiver device (30) are connected in series by the plurality of multi-core fibers (23).
    Type: Application
    Filed: June 29, 2020
    Publication date: August 3, 2023
    Inventors: Kenta HIROSE, Kohei SAITO, Hiroki KAWAHARA, Sachio SUDA, Takeshi SEKI
  • Publication number: 20230074213
    Abstract: A cyclic wavelength band permutation device (31) includes as many wavelength band converters (32a to 32c) as the wavelength bands of optical signals (S1, C1, and L1), and the wavelength band converters are individually connected to the output terminals of corresponding optical amplifiers among a plurality of optical amplifiers (17a to 17c) connected to an optical fiber (16) in an inserted manner. When a wavelength-multiplexed signal beam obtained by multiplexing optical signals in different wavelength bands is multiband-transmitted through an optical fiber while being amplified by the plurality of optical amplifiers, each wavelength band converter performs a cyclic permutation process of transitioning or converting an optical signal allocated to the shorter wavelength band side in the bands of the optical fiber to the longer wavelength band side, and also transitioning or converting an optical signal allocated to the longest wavelength band to the shortest wavelength band.
    Type: Application
    Filed: February 4, 2020
    Publication date: March 9, 2023
    Inventors: Hiroki Kawahara, Takeshi SEKI, Sachio Suda, Kohei Saito, Kenta Hirose
  • Publication number: 20230067932
    Abstract: A wavelength cross-connect device (20A) performs relay processing, the relay processing being such that wavelength multiplexed signal lights (1a to 1m), which are multiband transmitted from a plurality of routes M(1), are demultiplexed into different wavelength bands (S band, C band, and L band), and for each route, respective optical signals of the different wavelength bands (S band, C band, and L band) are amplified, then subject to rout change by WSSs and outputted to output side routes M(2). The device includes C-band WXC units 22 that are the same in total number as the wavelength bands of the optical signals of the respective wavelength bands and perform relay processing on optical signals of a specific wavelength band (C band) of the different wavelength bands.
    Type: Application
    Filed: February 4, 2020
    Publication date: March 2, 2023
    Inventors: Hiroki Kawahara, Takeshi SEKI, Sachio Suda, Kohei Saito, Kenta Hirose
  • Patent number: 10566457
    Abstract: Provided is a thin film transistor comprising an oxide semiconductor thin film layer and has a threshold voltage that does not change much due to light, a bias stress or the like, thereby exhibiting excellent stress stability. A thin film transistor of the present invention is provided with: a gate electrode; an oxide semiconductor layer that is used as a channel layer; and a gate insulator film that is arranged between the gate electrode and the channel layer. The oxide semiconductor layer is configured of at least one metal element that is selected from the group consisting of In, Ga, Zn and Sn (excluding the cases where the oxide semiconductor layer is constituted of metal elements Sn, and at least one of In and Zn). The hydrogen concentration in the gate insulator film, which is in direct contact with the oxide semiconductor layer, is controlled to 4 atomic % or less.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: February 18, 2020
    Assignee: Kabushiki Kaisha Kobe Seiko Sho (Kobe Steel, Ltd.)
    Inventors: Aya Miki, Shinya Morita, Hiroshi Goto, Toshihiro Kugimiya, Hiroaki Tao, Kenta Hirose
  • Patent number: 10515787
    Abstract: An oxide sintered body is obtained by sintering indium oxide, gallium oxide and tin oxide. The oxide sintered body has a relative density of 90% or more and an average grain size of 10 ?m or less. In the oxide sintered body, the relations 30 atomic %?[In]?50 atomic %, 20 atomic %?[Ga]?30 atomic % and 25 atomic %?[Sn]?45 atomic % are satisfied. [In], [Ga] and [Sn] are ratios of contents (atomic %) of indium gallium and tin, respectively, to all metal elements contained in the oxide sintered body. The oxide sintered body has an InGaO3 phase which satisfies the relation [InGaO3]?0.05.
    Type: Grant
    Filed: November 28, 2014
    Date of Patent: December 24, 2019
    Assignees: KOBELCO RESEARCH INSTITUTE, INC., KOBE STEEL, LTD.
    Inventors: Yuki Tao, Kenta Hirose, Norihiro Jiko, Mototaka Ochi
  • Patent number: 9647126
    Abstract: Provided is an oxide semiconductor configured to be used in a thin film transistor having high field-effect mobility; a small shift in threshold voltages against light and bias stress; excellent stress resistance. The oxide semiconductor has also excellent resistance to a wet-etchant for patterning of a source-drain electrode. The oxide semiconductor comprises In, Zn, Ga, Sn and O, and satisfies the requirements represented by expressions (1) to (4) shown below, wherein [In], [Zn], [Ga], and [Sn] represent content (in atomic %) of each of the elements relative to the total content of all the metal elements other than oxygen in the oxide. (1.67×[Zn]+1.67×[Ga])?100??(1) {([Zn]/0.95)+([Sn]/0.40)+([In]/0.
    Type: Grant
    Filed: May 28, 2013
    Date of Patent: May 9, 2017
    Assignee: Kobe Steel, Ltd.
    Inventors: Shinya Morita, Kenta Hirose, Aya Miki, Toshihiro Kugimiya
  • Patent number: 9343586
    Abstract: Provided is a thin film transistor having an oxide semiconductor layer that has high mobility, excellent stress resistance, and good wet etching property. The thin film transistor comprises at least, a gate electrode, a gate insulating film, an oxide semiconductor layer, source-drain electrode and a passivation film, in this order on a substrate. The oxide semiconductor layer is a laminate comprising a first oxide semiconductor layer (IGZTO) and a second oxide semiconductor layer (IZTO). The second oxide semiconductor layer is formed on the gate insulating film, and the first oxide semiconductor layer is formed between the second oxide semiconductor layer and the passivation film. The contents of respective metal elements relative to the total amount of all the metal elements other than oxygen in the first oxide semiconductor layer are as follows; Ga: 5% or more; In: 25% or less (excluding 0%); Zn: 35 to 65%; and Sn: 8 to 30%.
    Type: Grant
    Filed: June 6, 2013
    Date of Patent: May 17, 2016
    Assignee: Kobe Steel, Ltd.
    Inventors: Hiroshi Goto, Aya Miki, Tomoya Kishi, Kenta Hirose, Shinya Morita, Toshihiro Kugimiya
  • Patent number: 9324882
    Abstract: A thin film transistor containing at least, a gate electrode, a gate insulating film, an oxide semiconductor layer, source-drain electrode and a passivation film, in this order on a substrate. The oxide semiconductor layer is a laminate containing a first oxide semiconductor layer (IGZTO) and a second oxide semiconductor layer (IZTO). The second oxide semiconductor layer is formed on the gate insulating film, and the first oxide semiconductor layer is formed between the second oxide semiconductor layer and the passivation film. The contents of respective metal elements relative to the total amount of all the metal elements other than oxygen in the first oxide semiconductor layer are as follows; Ga: 8% or more and 30% or less; In: 25% or less, excluding 0%; Zn: 35% or more to 65% or less; and Sn: 5% or more to 30% or less.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: April 26, 2016
    Assignees: Kobe Steel, Ltd., Samsung Display Co., Ltd.
    Inventors: Hiroshi Goto, Aya Miki, Tomoya Kishi, Kenta Hirose, Shinya Morita, Toshihiro Kugimiya, Byung Du Ahn, Gun Hee Kim, Yeon Hong Kim
  • Publication number: 20160111264
    Abstract: An oxide sintered body is obtained by sintering indium oxide, gallium oxide and tin oxide. The oxide sintered body has a relative density of 90% or more and an average grain size of 10 ?m or less. In the oxide sintered body, the relations 30 atomic %?[In]?50 atomic %, 20 atomic %?[Ga]?30 atomic % and 25 atomic %?[Sn]?45 atomic % are satisfied. [In], [Ga] and [Sn] are ratios of contents (atomic %) of indium gallium and tin, respectively, to all metal elements contained in the oxide sintered body. The oxide sintered body has an InGaO3 phase which satisfies the relation [InGaO3]?0.05.
    Type: Application
    Filed: November 28, 2014
    Publication date: April 21, 2016
    Applicants: KOBELCO RESEARCH INSTITUTE, INC., KABUSHIKI KAISHA KOBE SEIKO SHO (KOBE STEEL, LTD.)
    Inventors: Yuki TAO, Kenta HIROSE, Norihiro JIKO, Mototaka OCHI
  • Publication number: 20160099357
    Abstract: Provided is a thin film transistor having an oxide semiconductor layer that has high mobility, excellent stress resistance, and good wet etching property. The thin film transistor comprises at least, a gate electrode, a gate insulating film, an oxide semiconductor layer, source-drain electrode and a passivation film, in this order on a substrate. The oxide semiconductor layer is a laminate comprising a first oxide semiconductor layer (IGZTO) and a second oxide semiconductor layer (IZTO). The second oxide semiconductor layer is formed on the gate insulating film, and the first oxide semiconductor layer is formed between the second oxide semiconductor layer and the passivation film. The contents of respective metal elements relative to the total amount of all the metal elements other than oxygen in the first oxide semiconductor layer are as follows; Ga: 5% or more; In: 25% or less (excluding 0%); Zn: 35 to 65%; and Sn: 8 to 30%.
    Type: Application
    Filed: May 26, 2015
    Publication date: April 7, 2016
    Applicant: KABUSHIKI KAISHA KOBE SEIKO SHO (KOBE STEEL, LTD.)
    Inventors: Hiroshi GOTO, Aya MIKI, Tomoya KISHI, Kenta HIROSE, Shinya MORITA, Toshihiro KUGIMIYA
  • Patent number: 9202926
    Abstract: Provided is a thin film transistor having an oxide semiconductor layer that has high mobility, excellent stress resistance, and good wet etching property. The thin film transistor comprises at least, a gate electrode, a gate insulating film, an oxide semiconductor layer, source-drain electrode and a passivation film, in this order on a substrate. The oxide semiconductor layer is a laminate comprising a first oxide semiconductor layer (IGZTO) and a second oxide semiconductor layer (IGZO). The second oxide semiconductor layer is formed on the gate insulating film, and the first oxide semiconductor layer is formed between the second oxide semiconductor layer and the passivation film. The contents of respective metal elements relative to the total amount of all the metal elements other than oxygen in the first oxide semiconductor layer are as follows; In: 25% or less (excluding 0%); Ga: 5% or more; Zn: 30.0 to 60.0%; and Sn: 8 to 30%.
    Type: Grant
    Filed: June 6, 2013
    Date of Patent: December 1, 2015
    Assignee: Kobe Steel, Ltd.
    Inventors: Tomoya Kishi, Kenta Hirose, Shinya Morita, Toshihiro Kugimiya
  • Publication number: 20150318400
    Abstract: Provided is a back-channel etch (BCE) thin-film transistor (TFT) without an etch stopper layer, wherein an oxide semiconductor layer of the TFT has excellent resistance to an acid etchant used when forming a source-drain electrode, and has excellent stress stability. The TFT comprises a gate electrode, a gate insulator film, an oxide semiconductor layer, a source-drain electrode, and a passivation film which protects the source-drain electrode, on a substrate. The oxide semiconductor layer comprises one or more elements selected from a group consisting tin, indium, gallium and zinc; and oxygen; and a value in a cross-section in the lamination direction of the TFT, as determined by [100×(the thickness of the oxide semiconductor layer directly below a source-drain electrode end?the thickness in the center portion of the semiconductor layer)/the thickness of the semiconductor layer directly below the source-drain electrode end], is not more than 5%.
    Type: Application
    Filed: December 26, 2013
    Publication date: November 5, 2015
    Applicant: Kabushiki Kaisha Kobe Seiko Sho (Kobe Steel, Ltd.)
    Inventors: Shinya MORITA, Mototaka OCHI, Hiroshi GOTO, Toshihiro KUGIMIYA, Kenta HIROSE, Hiroaki TAO, Yasuyuki TAKANASHI
  • Publication number: 20150295058
    Abstract: Provided is a back-channel etch type thin-film transistor (TFT) without an etch stopper layer, wherein an oxide semiconductor of the TFT has excellent resistance to an acid etchant and stress stability. The oxide semiconductor layer is a laminate having a first layer comprising tin, indium, and gallium or zinc, and oxygen, and a second layer comprising one or more elements selected from a group consisting indium, zinc, tin and gallium; and oxygen. The TFT is formed, in the following order, a gate insulator film, the second semiconductor layer and the first semiconductor layer; and having a value in a cross section in the lamination direction of the TFT, as determined by [100×(the first layer thickness of directly below a source-drain electrode end?a center portion thickness of the first layer)/the first layer thickness of directly below the source-drain electrode end], of not more than 5%.
    Type: Application
    Filed: December 27, 2013
    Publication date: October 15, 2015
    Applicant: KABUSHIKI KAISHA KOBE SEIKO SHO (KOBE STEEL, LTD.)
    Inventors: Shinya Morita, Mototaka Ochi, Hiroshi Goto, Toshihiro Kugimiya, Kenta Hirose
  • Publication number: 20150255627
    Abstract: A thin film transistor containing at least, a gate electrode, a gate insulating film, an oxide semiconductor layer, source-drain electrode and a passivation film, in this order on a substrate. The oxide semiconductor layer is a laminate containing a first oxide semiconductor layer (IGZTO) and a second oxide semiconductor layer (IZTO). The second oxide semiconductor layer is formed on the gate insulating film, and the first oxide semiconductor layer is formed between the second oxide semiconductor layer and the passivation film. The contents of respective metal elements relative to the total amount of all the metal elements other than oxygen in the first oxide semiconductor layer are as follows; Ga: 8% or more and 30% or less; In: 25% or less, excluding 0%; Zn: 35% or more to 65% or less; and Sn: 5% or more to 30% or less.
    Type: Application
    Filed: May 26, 2015
    Publication date: September 10, 2015
    Inventors: Hiroshi GOTO, Aya MIKI, Tomoya KISHI, Kenta HIROSE, Shinya MORITA, Toshihiro KUGIMIYA
  • Publication number: 20150171221
    Abstract: Provided is a thin film transistor comprising an oxide semiconductor thin film layer and has a threshold voltage that does not change much due to light, a bias stress or the like, thereby exhibiting excellent stress stability. A thin film transistor of the present invention is provided with: a gate electrode; an oxide semiconductor layer that is used as a channel layer; and a gate insulator film that is arranged between the gate electrode and the channel layer. The oxide semiconductor layer is configured of at least one metal element that is selected from the group consisting of In, Ga, Zn and Sn (excluding the cases where the oxide semiconductor layer is constituted of metal elements Sn, and at least one of In and Zn). The hydrogen concentration in the gate insulator film, which is in direct contact with the oxide semiconductor layer, is controlled to 4 atomic % or less.
    Type: Application
    Filed: August 30, 2013
    Publication date: June 18, 2015
    Applicant: Kabushiki Kaisha Kobe Seiko Sho (Kobe Steel, Ltd.)
    Inventors: Aya Miki, Shinya Morita, Hiroshi Goto, Toshihiro Kugimiya, Hiroaki Tao, Kenta Hirose
  • Publication number: 20150123116
    Abstract: Provided is a thin film transistor having an oxide semiconductor layer that has high mobility, excellent stress resistance, and good wet etching property. The thin film transistor comprises at least, a gate electrode, a gate insulating film, an oxide semiconductor layer, source-drain electrode and a passivation film, in this order on a substrate. The oxide semiconductor layer is a laminate comprising a first oxide semiconductor layer (IGZTO) and a second oxide semiconductor layer (IZTO). The second oxide semiconductor layer is formed on the gate insulating film, and the first oxide semiconductor layer is formed between the second oxide semiconductor layer and the passivation film. The contents of respective metal elements relative to the total amount of all the metal elements other than oxygen in the first oxide semiconductor layer are as follows; Ga: 5% or more; In: 25% or less (excluding 0%); Zn: 35 to 65%; and Sn: 8 to 30%.
    Type: Application
    Filed: June 6, 2013
    Publication date: May 7, 2015
    Applicant: KABUSHIKI KAISHA KOBE SEIKO SHO (Kobe Steel, Ltd.)
    Inventors: Hiroshi Goto, Aya Miki, Tomoya Kishi, Kenta Hirose, Shinya Morita, Toshihiro Kugimiya
  • Publication number: 20150076488
    Abstract: Provided is a thin film transistor having an oxide semiconductor layer that has high mobility, excellent stress resistance, and good wet etching property. The thin film transistor comprises at least, a gate electrode, a gate insulating film, an oxide semiconductor layer, source-drain electrode and a passivation film, in this order on a substrate. The oxide semiconductor layer is a laminate comprising a first oxide semiconductor layer (IGZTO) and a second oxide semiconductor layer (IGZO). The second oxide semiconductor layer is formed on the gate insulating film, and the first oxide semiconductor layer is formed between the second oxide semiconductor layer and the passivation film. The contents of respective metal elements relative to the total amount of all the metal elements other than oxygen in the first oxide semiconductor layer are as follows; In: 25% or less (excluding 0%); Ga: 5% or more; Zn: 30.0 to 60.0%; and Sn: 8 to 30%.
    Type: Application
    Filed: June 6, 2013
    Publication date: March 19, 2015
    Applicant: KABUSHIKI KAISHA KOBE SEIKO SHO (Kobe Steel,Ltd.)
    Inventors: Tomoya Kishi, Kenta Hirose, Shinya Morita, Toshihiro Kugimiya