Patents by Inventor Kentaro Matsumoto

Kentaro Matsumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210269420
    Abstract: The present invention provides a heterocyclic compound having an orexin type 2 receptor agonist activity. A compound represented by the formula (I): wherein each symbol is as described in the specification, or a salt thereof has an orexin type 2 receptor agonist activity, and is useful as an agent for the prophylaxis or treatment of narcolepsy.
    Type: Application
    Filed: June 27, 2019
    Publication date: September 2, 2021
    Applicant: Takeda Pharmaceutical Company Limited
    Inventors: Tatsuhiko FUJIMOTO, Koichiro FUKUDA, Hiromichi SUGIMOTO, Kentaro RIKIMARU, Yoshihiro BANNO, Takahiro MATSUMOTO, Norihito TOKUNAGA, Yoshihide TOMATA, Yuji ISHICHI, Shogo MARUI, Tsuneo ODA, Tohru MIYAZAKI, Yasutaka HOASHI, Yasushi HATTORI, Yuichi KAJITA, Yuhei MIYANOHANA, Tatsuki KOIKE
  • Publication number: 20210272917
    Abstract: In a method of manufacturing a semiconductor device according to one embodiment, after a semiconductor wafer including a non-volatile memory, a bonding pad and an insulating film comprised of an organic material is provided, a probe needle is contacted to a surface of the bonding pad located in a second region, and a data is written to the non-volatile memory. Here, the insulating film is formed by performing a first heat treatment to the organic material. Also, after a second heat treatment is performed to the semiconductor wafer, and the non-volatile memory to which the data is written is checked, a barrier layer and a first solder material are formed on the surface of the bonding pad located in a first region by using an electroplating method. Further, a bump electrode is formed in the first region by performing a third heat treatment to the first solder material.
    Type: Application
    Filed: January 14, 2021
    Publication date: September 2, 2021
    Inventors: Yoshiaki SATO, Mitsunobu WANSAWA, Akira MATSUMOTO, Yoshinori DEGUCHI, Kentaro SAITO
  • Patent number: 11104821
    Abstract: The purpose of the present invention is to provide a receptive solution which can suppress the occurrence of odor from the receptive solution itself when the receptive solution is applied on a recording medium, and can also prevent the appearance of a printed surface from being deteriorated. The receptive solution for ink-jet recording ink contains polyvalent metal cations, an aqueous solvent, a resin, and anions, wherein the resin is contained as a resin emulsion, and the anions contained in the receptive solution contain anions of an organic substance which has an OV/IV value of 0.3-1.0, the OV/IV value being a ratio of an organic value to an inorganic value.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: August 31, 2021
    Assignee: DNP Fine Chemicals Co., Ltd.
    Inventors: Kentaro Otomo, Fumie Yamazaki, Naoki Shiraishi, Kisei Matsumoto, Yoshiya Maegawa
  • Publication number: 20210142932
    Abstract: Regarding a chip resistor including a resistor provided with a first trimming groove for coarse adjustment and a second trimming groove for fine adjustment, the steps of setting the length of a first lateral direction cut part of the first trimming groove after L-shaped direction turning to be a certain length, setting coordinates of a trimming start point of the second trimming groove at a position which is constantly separated from a first vertical direction cut part of the first trimming groove only by a certain distance, and irradiating with a laser light from the coordinates toward a direction orthogonal to a direction between the electrodes are performed to form the second trimming groove which faces the first trimming groove and is oriented in the direction opposite to the orientation of the first trimming groove.
    Type: Application
    Filed: March 13, 2018
    Publication date: May 13, 2021
    Inventors: Kentaro MATSUMOTO, Natsuki IGUCHI
  • Publication number: 20210097794
    Abstract: A gate system control device is a gate system control device configured to control a gate system having an exit gate, and includes a first sensor, a second sensor, and a controller. The first sensor senses that a passport of a person who is in the gate system is placed on a placement region. The second sensor senses that the person is moving. The controller controls the gate system. When the first sensor senses that the passport is placed on the placement region and the second sensor senses that the person is moving to the exit gate, the controller causes the gate system to execute processing for notifying the person.
    Type: Application
    Filed: December 14, 2020
    Publication date: April 1, 2021
    Inventors: Masanobu INOE, Yuki KOBAYASHI, Kentaro MATSUMOTO
  • Patent number: 10896563
    Abstract: A gate system control device is a gate system control device configured to control a gate system having an exit gate, and includes a first sensor, a second sensor, and a controller. The first sensor senses that a passport of a person who is in the gate system is placed on a placement region. The second sensor senses that the person is moving. The controller controls the gate system. When the first sensor senses that the passport is placed on the placement region and the second sensor senses that the person is moving to the exit gate, the controller causes the gate system to execute processing for notifying the person.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: January 19, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masanobu Inoe, Yuki Kobayashi, Kentaro Matsumoto
  • Publication number: 20200255010
    Abstract: A steering assist apparatus comprises a steering assist control means for performing a lane tracing assist control (LTA) and a lane changing assist control (LCA) and a non-holding determination means for determining whether or not a first non-holding condition that a non-holding duration time is more than or equal to a first time is satisfied and whether or not a second non-holding condition that the non-holding duration time is more than or equal to a second time shorter than the first time is satisfied. The steering assist control means raises a warning when the second non-holding condition becomes satisfied and stops the LTA when the first non-holding condition becomes satisfied while performing the LTA, and raises a waring when the second non-holding condition becomes satisfied whereas continues the LCA until a completion condition of the LCA becomes satisfied regardless of the non-holding while performing the LCA.
    Type: Application
    Filed: May 1, 2020
    Publication date: August 13, 2020
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Shota FUJII, Kentaro MATSUMOTO
  • Patent number: 10676086
    Abstract: A steering assist apparatus comprises a steering assist control means for performing a lane tracing assist control (LTA) and a lane changing assist control (LCA) and a non-holding determination means for determining whether or not a first non-holding condition that a non-holding duration time is more than or equal to a first time is satisfied and whether or not a second non-holding condition that the non-holding duration time is more than or equal to a second time shorter than the first time is satisfied. The steering assist control means raises a warning when the second non-holding condition becomes satisfied and stops the LTA when the first non-holding condition becomes satisfied while performing the LTA, and raises a warning when the second non-holding condition becomes satisfied whereas continues the LCA until a completion condition of the LCA becomes satisfied regardless of the non-holding while performing the LCA.
    Type: Grant
    Filed: June 4, 2018
    Date of Patent: June 9, 2020
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Shota Fujii, Kentaro Matsumoto
  • Publication number: 20190295341
    Abstract: A gate system control device is a gate system control device configured to control a gate system having an exit gate, and includes a first sensor, a second sensor, and a controller. The first sensor senses that a passport of a person who is in the gate system is placed on a placement region. The second sensor senses that the person is moving. The controller controls the gate system. When the first sensor senses that the passport is placed on the placement region and the second sensor senses that the person is moving to the exit gate, the controller causes the gate system to execute processing for notifying the person.
    Type: Application
    Filed: June 13, 2019
    Publication date: September 26, 2019
    Inventors: Masanobu INOE, Yuki KOBAYASHI, Kentaro MATSUMOTO
  • Patent number: 10410771
    Abstract: Provided is a chip resistor including: a rectangular parallelepiped insulating substrate 1 which is made of ceramics; a pair of front electrodes 2 which are provided on lengthwise opposite end portions in a front surface of the insulating substrate 1; a resistive element 3 which is provided between and connected to the two front electrodes 2; an insulating protective layer 4 which covers the whole of the front surface of the insulating substrate 1 including the resistive element 3 and the two front electrodes 2; and a pair of cap-shaped end-surface electrodes 5 which are provided on the lengthwise opposite end portions of the insulating substrate 1 to be connected to the front electrodes 2; wherein: the protective layer 4 is formed out of a semi-transparent resin material which is similar in color to the insulating substrate 1.
    Type: Grant
    Filed: September 20, 2016
    Date of Patent: September 10, 2019
    Assignee: KOA Corporation
    Inventor: Kentaro Matsumoto
  • Patent number: 10354370
    Abstract: An image processor includes a curve generator and a gradation correcting unit. Based on a predetermined correspondence relationship between average luminance of an image and a gradation correction curve, the curve generator generates, in accordance with average luminance of an input image, a common curve, i.e. a gradation correction curve used to correct a gradation of the input image. The gradation correcting unit uses in common the common curve generated by the curve generator for red, green, and blue color signals of the input image to correct gradations of the red, green, and blue color signals. Based on first average luminance, i.e. an average value of luminance of a first region in the input image, second average luminance, i.e. an average value of luminance of a predetermined-colored second region included in the first region, and an area of the second region, the curve generator generates a common curve.
    Type: Grant
    Filed: November 28, 2016
    Date of Patent: July 16, 2019
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventor: Kentaro Matsumoto
  • Patent number: 10336336
    Abstract: A vehicular control apparatus includes at least one electronic control unit. The at least one electronic control unit is configured to recognize a first preceding vehicle in a driving lane and to calculate a first target acceleration of the vehicle. The at least one electronic control unit is also configured to recognize a second preceding vehicle in an adjacent lane, and to calculate a second target acceleration of the vehicle. The at least one electronic control unit is configured to acquire lane change information of the vehicle, and to select the smaller of the first target acceleration and the second target acceleration as a target acceleration of the vehicle. The at least one electronic control unit is configured to control a speed of the vehicle in a lane change period by using the selected target acceleration.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: July 2, 2019
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Kentaro Matsumoto, Kazuaki Aso, Junichi Morimura
  • Patent number: 10276285
    Abstract: Provided is a chip resistor including: a rectangular parallelepiped insulating substrate which is made of ceramics; a pair of front electrodes which are provided on lengthwise opposite end portions in a front surface of the insulating substrate; a resistive element which is provided between and connected to the two front electrodes; a protective layer which is made of a resin and which entirely covers the front surface of the insulating substrate including the two front electrodes and the resistive element; and a pair of cap-shaped end-surface electrodes which are provided on the lengthwise opposite end portions of the insulating substrate to establish electrical continuity to the front electrodes respectively; wherein: a chip element assembly in which the insulating substrate and the protective layer are laminated on each other but the end-surface electrodes have not been formed yet has an external shape substantially like a square cylinder.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: April 30, 2019
    Assignee: KOA Corporation
    Inventor: Kentaro Matsumoto
  • Patent number: 10224132
    Abstract: A chip resistor including an insulating film covering a resistor making contact with a pair of electrodes formed on an upper surface of an insulating substrate and a method for manufacturing same are provided. Both electrodes include a main electrode layer that contains silver as a main metal component an 10 weight % or more of palladium as another metal component, and an auxiliary electrode layer lower in specific resistance than the main electrode layer, a laminate part where the auxiliary electrode layer and the main electrode layer are laminated in order on a single surface of the insulating substrate; and an exposed part of the auxiliary electrode layer where a part of the auxiliary electrode layer is not covered with the main electrode layer on a far side from the resistor, and part that extend from a near side to the far side with respect to the resistor.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: March 5, 2019
    Assignee: KOA Corporation
    Inventor: Kentaro Matsumoto
  • Patent number: 10192658
    Abstract: In order to provide a chip resistor which has wide and flat terminal electrodes in its front surface and which has high connection reliability between front electrodes and the terminal electrodes, a chip resistor according to the present invention includes: an insulating substrate 1 shaped like a cuboid; a pair of front electrodes 2 provided on lengthwise opposite edge portions of a front surface of the insulating substrate 1; a resistor body 3 provided between the front electrodes 2; an insulating protection layer 4 covering entire surfaces of the front electrodes 2 and the resistor body 3; and a pair of terminal electrodes 5 provided on lengthwise opposite end surfaces of the insulating substrate 1.
    Type: Grant
    Filed: March 8, 2016
    Date of Patent: January 29, 2019
    Assignee: KOA CORPORATION
    Inventors: Kentaro Matsumoto, Kotaro Kashiwagi
  • Publication number: 20180345964
    Abstract: A steering assist apparatus comprises a steering assist control means for performing a lane tracing assist control (LTA) and a lane changing assist control (LCA) and a non-holding determination means for determining whether or not a first non-holding condition that a non-holding duration time is more than or equal to a first time is satisfied and whether or not a second non-holding condition that the non-holding duration time is more than or equal to a second time shorter than the first time is satisfied. The steering assist control means raises a warning when the second non-holding condition becomes satisfied and stops the LTA when the first non-holding condition becomes satisfied while performing the LTA, and raises a Waring when the second non-holding condition becomes satisfied whereas continues the LCA until a completion condition of the LCA becomes satisfied regardless of the non-holding while performing the LCA.
    Type: Application
    Filed: June 4, 2018
    Publication date: December 6, 2018
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Shota FUJII, Kentaro MATSUMOTO
  • Patent number: 10109398
    Abstract: The invention is to provide a chip resistor suitable for lowering an initial resistance value. A chip resistor 1 according to the present invention is provided with: an insulating substrate 2; a pair of front electrodes 3 which are provided on a front surface of the insulating substrate 2 so as to face each other with a predetermined interval therebetween; a resistive element 4 which is provided so as to bridge the front electrodes 3; a pair of auxiliary electrodes 5 which are provided so as to cover the front electrodes 3 and overlap end portions of the resistive element 4; and the like. The chip resistor 1 is configured such that: the front electrodes 3 are formed of a material which contains 1 to 5 wt % Pd and the balance Ag; and the auxiliary electrodes 5 are formed of a material which contains 15 to 30 wt % Pd and a metal material (e.g. Au) lower in resistivity than Pd and the balance Ag.
    Type: Grant
    Filed: July 22, 2015
    Date of Patent: October 23, 2018
    Assignee: KOA Corporation
    Inventor: Kentaro Matsumoto
  • Patent number: 10096409
    Abstract: Provided is a chip resistor having wide and flat end-face electrodes on a surface thereof and having increased connection reliability between upper electrodes and the end-face electrodes.
    Type: Grant
    Filed: April 7, 2016
    Date of Patent: October 9, 2018
    Assignee: KOA Corporation
    Inventor: Kentaro Matsumoto
  • Publication number: 20180286541
    Abstract: Provided is a chip resistor including: a rectangular parallelepiped insulating substrate which is made of ceramics; a pair of front electrodes which are provided on lengthwise opposite end portions in a front surface of the insulating substrate; a resistive element which is provided between and connected to the two front electrodes; a protective layer which is made of a resin and which entirely covers the front surface of the insulating substrate including the two front electrodes and the resistive element; and a pair of cap-shaped end-surface electrodes which are provided on the lengthwise opposite end portions of the insulating substrate to establish electrical continuity to the front electrodes respectively; wherein: a chip element assembly in which the insulating substrate and the protective layer are laminated on each other but the end-surface electrodes have not been formed yet has an external shape substantially like a square cylinder.
    Type: Application
    Filed: September 26, 2016
    Publication date: October 4, 2018
    Inventor: Kentaro MATSUMOTO
  • Publication number: 20180277286
    Abstract: Provided is a chip resistor including: a rectangular parallelepiped insulating substrate 1 which is made of ceramics; a pair of front electrodes 2 which are provided on lengthwise opposite end portions in a front surface of the insulating substrate 1; a resistive element 3 which is provided between and connected to the two front electrodes 2; an insulating protective layer 4 which covers the whole of the front surface of the insulating substrate 1 including the resistive element 3 and the two front electrodes 2; and a pair of cap-shaped end-surface electrodes 5 which are provided on the lengthwise opposite end portions of the insulating substrate 1 to be connected to the front electrodes 2; wherein: the protective layer 4 is formed out of a semi-transparent resin material which is similar in color to the insulating substrate 1.
    Type: Application
    Filed: September 20, 2016
    Publication date: September 27, 2018
    Inventor: Kentaro MATSUMOTO