Patents by Inventor Kentaro Matsumoto

Kentaro Matsumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10109398
    Abstract: The invention is to provide a chip resistor suitable for lowering an initial resistance value. A chip resistor 1 according to the present invention is provided with: an insulating substrate 2; a pair of front electrodes 3 which are provided on a front surface of the insulating substrate 2 so as to face each other with a predetermined interval therebetween; a resistive element 4 which is provided so as to bridge the front electrodes 3; a pair of auxiliary electrodes 5 which are provided so as to cover the front electrodes 3 and overlap end portions of the resistive element 4; and the like. The chip resistor 1 is configured such that: the front electrodes 3 are formed of a material which contains 1 to 5 wt % Pd and the balance Ag; and the auxiliary electrodes 5 are formed of a material which contains 15 to 30 wt % Pd and a metal material (e.g. Au) lower in resistivity than Pd and the balance Ag.
    Type: Grant
    Filed: July 22, 2015
    Date of Patent: October 23, 2018
    Assignee: KOA Corporation
    Inventor: Kentaro Matsumoto
  • Patent number: 10096409
    Abstract: Provided is a chip resistor having wide and flat end-face electrodes on a surface thereof and having increased connection reliability between upper electrodes and the end-face electrodes.
    Type: Grant
    Filed: April 7, 2016
    Date of Patent: October 9, 2018
    Assignee: KOA Corporation
    Inventor: Kentaro Matsumoto
  • Publication number: 20180286541
    Abstract: Provided is a chip resistor including: a rectangular parallelepiped insulating substrate which is made of ceramics; a pair of front electrodes which are provided on lengthwise opposite end portions in a front surface of the insulating substrate; a resistive element which is provided between and connected to the two front electrodes; a protective layer which is made of a resin and which entirely covers the front surface of the insulating substrate including the two front electrodes and the resistive element; and a pair of cap-shaped end-surface electrodes which are provided on the lengthwise opposite end portions of the insulating substrate to establish electrical continuity to the front electrodes respectively; wherein: a chip element assembly in which the insulating substrate and the protective layer are laminated on each other but the end-surface electrodes have not been formed yet has an external shape substantially like a square cylinder.
    Type: Application
    Filed: September 26, 2016
    Publication date: October 4, 2018
    Inventor: Kentaro MATSUMOTO
  • Publication number: 20180277286
    Abstract: Provided is a chip resistor including: a rectangular parallelepiped insulating substrate 1 which is made of ceramics; a pair of front electrodes 2 which are provided on lengthwise opposite end portions in a front surface of the insulating substrate 1; a resistive element 3 which is provided between and connected to the two front electrodes 2; an insulating protective layer 4 which covers the whole of the front surface of the insulating substrate 1 including the resistive element 3 and the two front electrodes 2; and a pair of cap-shaped end-surface electrodes 5 which are provided on the lengthwise opposite end portions of the insulating substrate 1 to be connected to the front electrodes 2; wherein: the protective layer 4 is formed out of a semi-transparent resin material which is similar in color to the insulating substrate 1.
    Type: Application
    Filed: September 20, 2016
    Publication date: September 27, 2018
    Inventor: Kentaro MATSUMOTO
  • Patent number: 10043602
    Abstract: To provide a chip resistor in which a resistive element can be surely protected from an external environment and which is also excellent in corrosion resistance, a chip resistor 1 is configured to include an insulating substrate 2, a pair of front electrode 3 provided on opposite end portions of a front surface of the insulating substrate 2, a pair of back electrodes 7 provided on opposite end portions of a back surface of the insulating substrate 2, a resistive element 4 provided to extend onto the two front electrodes 3, a first insulating layer 5 covering the resistive element 4, a second insulating layer 6 made of a resin material to cover the first insulating layer 5, end surface electrodes 8 establishing electrical continuity between the front electrodes 3 and the back electrodes 7, plating layers 9 covering the end surface electrodes 8, etc.
    Type: Grant
    Filed: August 25, 2015
    Date of Patent: August 7, 2018
    Assignee: KOA Corporation
    Inventor: Kentaro Matsumoto
  • Publication number: 20180090247
    Abstract: In order to provide a chip resistor which has wide and flat terminal electrodes in its front surface and which has high connection reliability between front electrodes and the terminal electrodes, a chip resistor according to the present invention includes: an insulating substrate 1 shaped like a cuboid; a pair of front electrodes 2 provided on lengthwise opposite edge portions of a front surface of the insulating substrate 1; a resistor body 3 provided between the front electrodes 2; an insulating protection layer 4 covering entire surfaces of the front electrodes 2 and the resistor body 3; and a pair of terminal electrodes 5 provided on lengthwise opposite end surfaces of the insulating substrate 1.
    Type: Application
    Filed: March 8, 2016
    Publication date: March 29, 2018
    Inventors: Kentaro MATSUMOTO, Kotaro KASHIWAGI
  • Publication number: 20180075954
    Abstract: Provided is a chip resistor having wide and flat end-face electrodes on a surface thereof and having increased connection reliability between upper electrodes and the end-face electrodes.
    Type: Application
    Filed: April 7, 2016
    Publication date: March 15, 2018
    Inventor: Kentaro MATSUMOTO
  • Patent number: 9883162
    Abstract: A stereoscopic image inspection device configured to determine that a stereoscopic image or part of the stereoscopic image is horizontally reversed is provided. A depth obtaining unit obtains depth information of the stereoscopic image. An occlusion detection unit detects an occlusion area of the stereoscopic image. A determination unit evaluates image continuity between the occlusion area and adjacent areas adjacent to the occlusion area, and identifies a first area to which the occlusion area belongs among the adjacent areas based on the evaluated image continuity, and determines whether or not the stereoscopic image has a depth contradiction based on a depth position of the first area included in the depth information.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: January 30, 2018
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Kentaro Matsumoto, Yuki Kobayashi, Yuki Maruyama, Yasunobu Ogura
  • Publication number: 20170316853
    Abstract: To provide a chip resistor in which a resistive element can be surely protected from an external environment and which is also excellent in corrosion resistance, a chip resistor 1 is configured to include an insulating substrate 2, a pair of front electrode 3 provided on opposite end portions of a front surface of the insulating substrate 2, a pair of back electrodes 7 provided on opposite end portions of a back surface of the insulating substrate 2, a resistive element 4 provided to extend onto the two front electrodes 3, a first insulating layer 5 covering the resistive element 4, a second insulating layer 6 made of a resin material to cover the first insulating layer 5, end surface electrodes 8 establishing electrical continuity between the front electrodes 3 and the back electrodes 7, plating layers 9 covering the end surface electrodes 8, etc.
    Type: Application
    Filed: August 25, 2015
    Publication date: November 2, 2017
    Inventor: Kentaro MATSUMOTO
  • Publication number: 20170309378
    Abstract: The invention is to provide a chip resistor suitable for lowering an initial resistance value. A chip resistor 1 according to the present invention is provided with: an insulating substrate 2; a pair of front electrodes 3 which are provided on a front surface of the insulating substrate 2 so as to face each other with a predetermined interval therebetween; a resistive element 4 which is provided so as to bridge the front electrodes 3; a pair of auxiliary electrodes 5 which are provided so as to cover the front electrodes 3 and overlap end portions of the resistive element 4; and the like. The chip resistor 1 is configured such that: the front electrodes 3 are formed of a material which contains 1 to 5 wt % Pd and the balance Ag; and the auxiliary electrodes 5 are formed of a material which contains 15 to 30 wt % Pd and a metal material (e.g. Au) lower in resistivity than Pd and the balance Ag.
    Type: Application
    Filed: July 22, 2015
    Publication date: October 26, 2017
    Inventor: Kentaro MATSUMOTO
  • Publication number: 20170278282
    Abstract: An image processor includes a curve generator and a gradation correcting unit. Based on a predetermined correspondence relationship between average luminance of an image and a gradation correction curve, the curve generator generates, in accordance with average luminance of an input image, a common curve, i.e. a gradation correction curve used to correct a gradation of the input image. The gradation correcting unit uses in common the common curve generated by the curve generator for red, green, and blue color signals of the input image to correct gradations of the red, green, and blue color signals. Based on first average luminance, i.e. an average value of luminance of a first region in the input image, second average luminance, i.e. an average value of luminance of a predetermined-colored second region included in the first region, and an area of the second region, the curve generator generates a common curve.
    Type: Application
    Filed: November 28, 2016
    Publication date: September 28, 2017
    Inventor: KENTARO MATSUMOTO
  • Patent number: 9749506
    Abstract: An image processing method includes: (a) generating coefficients corresponding to pixels of a reduced image; (b) generating coefficients corresponding to pixels of an original image from the coefficients corresponding to the pixels of the reduced image, to expand the coefficients corresponding to the pixels of the reduced image to the coefficients corresponding to the pixels of the original image; and (c) multiplying pixel values by coefficients to correct the original image, wherein in step (b), the coefficients corresponding to the pixels of the original image are generated such that a spatial change of the coefficients corresponding to the pixels of the original image is caused according to a boundary between a bright portion and a dark portion, the spatial change occurring mainly on a dark side of the boundary.
    Type: Grant
    Filed: February 2, 2015
    Date of Patent: August 29, 2017
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventor: Kentaro Matsumoto
  • Publication number: 20170183013
    Abstract: A vehicular control apparatus includes at least one electronic control unit. The at least one electronic control unit is configured to recognize a first preceding vehicle in a driving lane and to calculate a first target acceleration of the vehicle. The at least one electronic control unit is also configured to recognize a second preceding vehicle in an adjacent lane, and to calculate a second target acceleration of the vehicle. The at least one electronic control unit is configured to acquire lane change information of the vehicle, and to select the smaller of the first target acceleration and the second target acceleration as a target acceleration of the vehicle. The at least one electronic control unit is configured to control a speed of the vehicle in a lane change period by using the selected target acceleration.
    Type: Application
    Filed: December 20, 2016
    Publication date: June 29, 2017
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Kentaro MATSUMOTO, Kazuaki ASO, Junichi MORIMURA
  • Patent number: 9679488
    Abstract: A drive assistance apparatus includes a target trajectory setting unit configured to set a target trajectory in a lane change assistance based on a movement time taken for a vehicle of which the direction indicator is continued to be in ON-state to move a lateral distance set in advance to the adjacent lane side from an operation start lateral position, and a lane change assistance unit configured to execute the lane change assistance for causing the vehicle to change lane along the target trajectory in a case where the lateral position of the vehicle of which the direction indicator is continued to be in ON-state reaches the assistance start lateral position set in advance in the travelling lane from the setting of the target trajectory by the target trajectory setting unit.
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: June 13, 2017
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Kentaro Matsumoto
  • Patent number: 9641821
    Abstract: An obtaining unit obtains, for the stereoscopic image signal, depth information indicating a depth value in each position in an image plane. A smoothing unit smoothes the depth information in the image plane. A correction unit corrects the depth information which has been smoothed and expands a range of an area having a depth value of a foreground in a boundary portion between the foreground and a background. An image generation unit generates, using the depth information which has been corrected, a new stereoscopic image from the stereoscopic image signal.
    Type: Grant
    Filed: October 3, 2013
    Date of Patent: May 2, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Kentaro Matsumoto
  • Publication number: 20170084364
    Abstract: Provided are: a chip resistor whose resistance value can be adjusted with high accuracy while maintaining high sulfurization resistance of electrodes of the chip resistor even in the case where the resistance value of the chip resistor is low; and a method for manufacturing this chip resistor. This chip resistor (1) includes: an insulating film that covers a resistor substance (4) formed so as to make contact with both of a pair of electrodes (3, 3) formed on an upper surface (2A) of an insulating substrate (2).
    Type: Application
    Filed: March 11, 2015
    Publication date: March 23, 2017
    Inventor: Kentaro MATSUMOTO
  • Patent number: 9602799
    Abstract: A 3D video processing device includes a disparity map generator which compares a first-perspective image from a first perspective with a second-perspective image from a second perspective, which are two images forming stereoscopic video, thereby generates a disparity map which represents disparity of the second-perspective image with respect to the first-perspective image, a first new image generator which rotates the first-perspective image based on rotation angle information which represents rotation statuses of the first- and the second-perspective images, thereby generates a new first-perspective image, and a second new image generator which generates a new second-perspective image, which is paired with the new first-perspective image to form stereoscopic video, based on the first-perspective image and on the disparity map.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: March 21, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yuki Kobayashi, Yuki Maruyama, Kentaro Matsumoto
  • Patent number: 9460498
    Abstract: An image processing method includes: (a) generating coefficients for a reduced image, using a predetermined relation; and (b) expanding the coefficients for the reduced image to coefficients for an original image, and correcting pixel values of the original image, wherein in step (b), expansion processing of expanding coefficients from coefficients corresponding to a first image to coefficients corresponding to a second image is performed on the coefficients corresponding to the reduced image, and step (b) further includes limiting, to a limit range according to the predetermined relation, at least one of a coefficient corresponding to the second image in the expansion processing or a corrected pixel value of the original image.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: October 4, 2016
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Kentaro Matsumoto, Haruo Yamashita
  • Publication number: 20160225261
    Abstract: A drive assistance apparatus includes a target trajectory setting unit configured to set a target trajectory in a lane change assistance based on a movement time taken for a vehicle of which the direction indicator is continued to be in ON-state to move a lateral distance set in advance to the adjacent lane side from an operation start lateral position, and a lane change assistance unit configured to execute the lane change assistance for causing the vehicle to change lane along the target trajectory in a case where the lateral position of the vehicle of which the direction indicator is continued to be in ON-state reaches the assistance start lateral position set in advance in the travelling lane from the setting of the target trajectory by the target trajectory setting unit.
    Type: Application
    Filed: February 1, 2016
    Publication date: August 4, 2016
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Kentaro MATSUMOTO
  • Publication number: 20160163433
    Abstract: The invention is to provide a chip-resistor manufacturing method in which chipping can be restrained from occurring in an intersection portion between each primary segmentation groove and each secondary segmentation groove. Primary segmentation grooves 21 each having an uneven depth are formed in one surface of a large substrate 20. Pairs of surface electrodes 3 extending across the primary segmentation grooves 21, resistive elements 5 each striding between the surface electrodes 3 paired with each other, etc. are formed in the one surface of the large substrate 20. Then, primary segmentation is performed on the large substrate 20 along the primary segmentation grooves 21 so as to open the surface side where the surface electrodes 3, the resistive elements 5, etc. are formed. Thus, a plurality of strip-like substrates 30 are obtained from the large substrate 20.
    Type: Application
    Filed: July 9, 2014
    Publication date: June 9, 2016
    Inventors: Yuya TAKEUE, Todaro UEGANE, Kentaro MATSUMOTO