Patents by Inventor Kentaro Watanabe

Kentaro Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100241373
    Abstract: An ESD protection verification apparatus of an aspect of the present invention including an element extraction unit which extracts one or more elements connected to a first pad included in design data for a semiconductor integrated circuit, a first and second element information checking/processing unit which checks connection information for the extracted element and which calculates a operating value based on design information for the extracted element, a first and second error detection unit which compares a reference value with the operating value to determine whether the element has a predetermined ESD withstand voltage.
    Type: Application
    Filed: March 2, 2010
    Publication date: September 23, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kentaro Watanabe
  • Patent number: 7750190
    Abstract: Produce the target substance, or a polynuclear poly(formylphenol) expressed by General Formula (2), in an industrial setting with ease and at high purity by causing a polynuclear poly(hydroxymethylphenol) or polynuclear poly(alkoxymethylphenol) to react with hexamethylene tetramine in the presence of an acid and then hydrolyzing the obtained reaction product.
    Type: Grant
    Filed: May 31, 2007
    Date of Patent: July 6, 2010
    Assignee: Honshu Chemical Industry Co., Ltd.
    Inventors: Akira Yoshitomo, Tatsuya Iwai, Kentaro Watanabe
  • Publication number: 20100162112
    Abstract: Provided is a reproduction processing method of reproducing user's operation of a computer system, the reproduction processing method comprising: storing contents of the user's operation; transmitting the stored contents of the user's operation; determining a reproduction unit of the at least one reproduction unit for executing a reproduction processing according to the contents of the user's operation; determining a schedule of executing the reproduction processing; transmitting the stored contents of the user's operation and the determined schedule; and executing the reproduction processing based on the contents of the user's operation and the schedule.
    Type: Application
    Filed: August 4, 2009
    Publication date: June 24, 2010
    Inventors: Kentaro WATANABE, Yoshimasa MASUOKA
  • Publication number: 20090300416
    Abstract: According to the invention, a managing server, using a snapshot-appended information table which stores management information for identifying snapshots of a virtual server, a setting change table which stores setting change information on the virtual server, and a policy table which stores policies to be met by the virtual server, acquires the setting change information from the setting change table, selects the setting change information items from the acquired setting change information matching policies stored in the policy table, acquires management information on the snapshots of the virtual server from the snapshot-appended information table, identifies a snapshot of the virtual server with reference to the acquired management information, changes the identified snapshot of the virtual server based on the selected setting change information items, and rolls back the virtual server according to the changed snapshot.
    Type: Application
    Filed: August 5, 2008
    Publication date: December 3, 2009
    Inventors: Kentaro WATANABE, Yoshimasa Masuoka
  • Patent number: 7570467
    Abstract: An electrostatic protection circuit being an integrated circuit on a semiconductor substrate and including a first power supply terminal having a predetermined potential VDD, a second power supply terminal having a lower potential VSS than the predetermined potential, and an input/output terminal for a signal, the electrostatic protection circuit including: a first and second diodes having the respective cathode electrodes thereof connected in series at a first common connection point between the first power supply terminal and input/output terminal; a third and fourth diodes having the respective anode electrodes thereof connected in series at a second common connection point between the second power supply terminal and input/output terminal; a first discharge element, connected between the first and second common connection points, for discharging excessive static electricity; and a second discharge element, connected between the first and second power supply terminals, for discharging excessive static elec
    Type: Grant
    Filed: September 27, 2005
    Date of Patent: August 4, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kentaro Watanabe, Hiroyuki Yoshinaga
  • Publication number: 20090182175
    Abstract: Produce the target substance, or a polynuclear poly(formylphenol) expressed by General Formula (2), in an industrial setting with ease and at high purity by causing a polynuclear poly(hydroxymethylphenol) or polynuclear poly(alkoxymethylphenol) to react with hexamethylene tetramine in the presence of an acid and then hydrolyzing the obtained reaction product.
    Type: Application
    Filed: May 31, 2007
    Publication date: July 16, 2009
    Inventors: Akira Yoshitomo, Tatsuya Iwai, Kentaro Watanabe
  • Publication number: 20090182866
    Abstract: In order to change a policy while alarm-monitoring a production environment, during a production-environment operation, a method of controlling a computer system is provided, in which a policy is temporarily changed, thereby performing setting change. An agent transmits a monitoring result based on a first monitoring condition. A management unit generates a second monitoring condition based on a received change request. The agent transmits a monitoring result based on the second monitoring condition. The management unit holds information for correlating the first and second monitoring conditions with each other. Upon reception of a confirmation request for confirming the second monitoring condition, the management unit specifies the first monitoring condition correlated with the second monitoring condition based on the information. The agent which has received the deletion request stops the transmission of the monitoring result based on the first monitoring condition.
    Type: Application
    Filed: April 25, 2008
    Publication date: July 16, 2009
    Inventors: Kentaro Watanabe, Yoshimasa Masuoka
  • Patent number: 7538999
    Abstract: This invention discloses a semiconductor device including a first buffer MOSFET of a first conductivity type, a second buffer MOSFET of a second conductivity type, an ESD protection circuit, an external input terminal, and a control circuit. The external input terminal capacitively couples to a terminal to which a second potential is applied, and receives the first potential or second potential in a normal operation mode. The control circuit includes a prebuffer which controls the gates of the first and second buffer MOSFETs on the basis of the potential of the external input terminal in the normal operation mode and fixes the external input terminal to the second or first potential by capacitive coupling upon ESD surge application, thereby fixing the gate of the second buffer MOSFET to the second or first potential and turning off the second buffer MOSFET.
    Type: Grant
    Filed: October 11, 2007
    Date of Patent: May 26, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kentaro Watanabe
  • Publication number: 20090097176
    Abstract: This disclosure concerns an ESD protection including logic gates connected between a first power input and a second power input, a second potential of the second power input lower than the first potential of the first power input, wherein in the logic gates, an output of the logic gate at a front stage are connected to an input of the logic gate at a rear stage, if a protection potential between the first and the second potentials is applied to a node connecting the output to the input when the logic gates respond to an ESD surge, a breakthrough current is carried to the logic gates from the first potential toward the second potential, and if the first and the second potentials are applied to the first power input and the second power input, logic values of the logic gates are kept in a constant state.
    Type: Application
    Filed: October 6, 2008
    Publication date: April 16, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kentaro Watanabe
  • Publication number: 20090086393
    Abstract: A discharge circuit holds the potential difference between a power supply terminal and reference potential terminal at a predetermined value. The gates of a first pMOSFET and first nMOSFET are connected to an input terminal. A second pMOSFET is connected between the first pMOSFET and power supply terminal, and has a gate to which a first signal is supplied. A second nMOSFET is connected between the first nMOSFET and reference potential terminal, and has a gate to which a second signal is supplied. A detection circuit outputs the first signal which turns on the second pMOSFET and the second signal which turns on the second nMOSFET, while the potential difference is held at the predetermined value. The detection circuit outputs the first signal which turns off the second pMOSFET and the second signal which turns off the second nMOSFET, while the potential difference deviates from the predetermined value.
    Type: Application
    Filed: September 23, 2008
    Publication date: April 2, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kentaro Watanabe
  • Publication number: 20080313591
    Abstract: An IC designing method includes planning placement of a first isolated-power supplied region operating between common ground and power bus lines during a normal operation, and second/third isolated-power supplied regions each operating between the common ground bus line and first/second isolated power lines and supplied with potentials different from the common power supply, planning placement of first electrostatic protection circuits connected between the common ground power bus lines and between the common ground bus line and the first/second isolated power lines, and second electrostatic protection circuits connected between the first/second isolated power lines and the common power bus lines, judging presence of a signal transmission between non-adjacent regions among the first to third isolated-power supplied regions, and amending the circuit to insert a buffer circuit powered by the common power bus line in a transmission path when the signal transmission is present.
    Type: Application
    Filed: June 10, 2008
    Publication date: December 18, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kentaro Watanabe
  • Publication number: 20080296627
    Abstract: In the nitride semiconductor device using the silicon substrate, the metal electrode formed on the silicon substrate has both ohmic contact property and adhesion, so that the nitride semiconductor device having excellent electric properties and reliability is obtained. The nitride semiconductor device includes a silicon substrate (2), a nitride semiconductor layer (10) formed on the silicon substrate (2), and metal electrodes (8, 8?) formed in contact with the silicon substrate (2). The metal electrodes (8, 8?) has first metal layers (4, 4?) which are formed in a shape of discrete islands and in contact with the silicon substrate (2), and second metal layers (6, 6?) which are in contact with the silicon substrate (2) exposed among the islands of the first metal layers (4, 4?) and are formed to cover the first metal layers (4, 4?).
    Type: Application
    Filed: May 29, 2008
    Publication date: December 4, 2008
    Inventors: Kentaro Watanabe, Shunsuke Minato, Giichi Marutsuki
  • Publication number: 20080295095
    Abstract: Provided are a method and an apparatus for monitoring performance of a virtual computer. In a method of controlling a computer system including a computer, the computer executes a virtualization program for causing logically divided resources of the computer to operate as first and second virtual computers, the first virtual computer executes a first OS, and the second virtual computer executes a second OS. In the method, information regarding the resources allocated to the first virtual computer and the second virtual computer by the virtualization program is obtained from the virtualization program, information indicating performance of the first virtual computer is obtained from the first OS, information indicating performance of the second virtual computer is obtained from the second OS, the obtained information and information indicating a time of obtainment of the information are stored in a storage system, and stored information is output.
    Type: Application
    Filed: September 19, 2007
    Publication date: November 27, 2008
    Inventors: Kentaro WATANABE, Yoshimasa Masuoka
  • Patent number: 7456323
    Abstract: A new 1,3-bis(3-formyl-4-hydroxyphenyl)adamantane, which provides a material offering excellent properties such as heat resistance and mechanical strength for use as an intermediate material for adamantanebisphenol derivatives or use in photosensitive resist materials, epoxy resins and other synthetic resins, thermosensitive recording materials, and the like, can be obtained through an industrial process in an easy manner at a good yield and high purity by producing a Schiff base from a 1,3-bis(4-hydroxyphenyl)adamantane by causing it to react with a hexamethylenetetramine or other substance in the presence of an acid, and then hydrolyzing the obtained Schiff base using an acid. A new polynuclear polyphenol is also provided that may be derived from the same.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: November 25, 2008
    Assignee: Honshu Chemical Industry Co., Ltd.
    Inventors: Akira Yoshitomo, Tatsuya Iwai, Kentaro Watanabe
  • Publication number: 20080242896
    Abstract: A new 1,3-bis(3-formyl-4-hydroxyphenyl)adamantane, which provides a material offering excellent properties such as heat resistance and mechanical strength for use as an intermediate material for adamantanebisphenol derivatives or use in photosensitive resist materials, epoxy resins and other synthetic resins, thermosensitive recording materials, and the like, can be obtained through an industrial process in an easy manner at a good yield and high purity by producing a Schiff base from a 1,3-bis(4-hydroxyphenyl)adamantane by causing it to react with a hexamethylenetetramine or other substance in the presence of an acid, and then hydrolyzing the obtained Schiff base using an acid. A new polynuclear polyphenol is also provided that may be derived from the same.
    Type: Application
    Filed: June 13, 2006
    Publication date: October 2, 2008
    Applicant: Honshu Chemical Industry Co., Ltd.
    Inventors: Akira Yoshitomo, Tatsuya Iwai, Kentaro Watanabe
  • Patent number: 7394631
    Abstract: An electrostatic protection circuit including: a first power supply terminal 110; a second power supply terminal 112; an input-output terminal 111 for an external connection; a P-type MOSFET for a buffer 108 for pulling up input and output to a high-level potential; an N-type MOSFET for the buffer 107 for pulling down the input and output to a low-level potential; a rectifying element 109 connected between the first and second power supply terminals; a detector 101 for comparing the potential of the input-output terminal 111 to the potential of the first power supply terminal 110 to detect whether or not an electrostatic surge is flowing in; and controllers 105 and 106, wherein the controllers 105 and 106 control a gate potential of the N-type MOSFET 107 for the buffer when the detector 101 detects inflow of the electrostatic surge and turn off the N-type MOSFET 107 for the buffer.
    Type: Grant
    Filed: August 29, 2006
    Date of Patent: July 1, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kentaro Watanabe, Koichi Sato, Takayuki Hiraoka
  • Publication number: 20080094767
    Abstract: This invention discloses a semiconductor device including a first buffer MOSFET of a first conductivity type, a second buffer MOSFET of a second conductivity type, an ESD protection circuit, an external input terminal, and a control circuit. The external input terminal capacitively couples to a terminal to which a second potential is applied, and receives the first potential or second potential in a normal operation mode. The control circuit includes a prebuffer which controls the gates of the first and second buffer MOSFETs on the basis of the potential of the external input terminal in the normal operation mode and fixes the external input terminal to the second or first potential by capacitive coupling upon ESD surge application, thereby fixing the gate of the second buffer MOSFET to the second or first potential and turning off the second buffer MOSFET.
    Type: Application
    Filed: October 11, 2007
    Publication date: April 24, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kentaro Watanabe
  • Publication number: 20070047162
    Abstract: An electrostatic protection circuit including: a first power supply terminal 110; a second power supply terminal 112; an input-output terminal 111 for an external connection; a P-type MOSFET for a buffer 108 for pulling up input and output to a high-level potential; an N-type MOSFET for the buffer 107 for pulling down the input and output to a low-level potential; a rectifying element 109 connected between the first and second power supply terminals; a detector 101 for comparing the potential of the input-output terminal 111 to the potential of the first power supply terminal 110 to detect whether or not an electrostatic surge is flowing in; and controllers 105 and 106, wherein the controllers 105 and 106 control a gate potential of the N-type MOSFET 107 for the buffer when the detector 101 detects inflow of the electrostatic surge and turn off the N-type MOSFET 107 for the buffer.
    Type: Application
    Filed: August 29, 2006
    Publication date: March 1, 2007
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kentaro Watanabe, Koichi Sato, Takayuki Hiraoka
  • Patent number: D535607
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: January 23, 2007
    Assignee: IHI Marine United Inc.
    Inventors: Yuji Awashima, Kentaro Watanabe, Kazuhiko Tsunoo
  • Patent number: D536297
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: February 6, 2007
    Assignee: IHI Marine United Inc.
    Inventors: Yuji Awashima, Kentaro Watanabe, Kazuhiko Tsunoo