Patents by Inventor Kenya Kobayashi

Kenya Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10847648
    Abstract: According to one embodiment, a semiconductor device includes first and second electrodes, first, second, and third semiconductor regions, a gate electrode, first, and second conductive parts. The first semiconductor region includes a first region and a second region. The second semiconductor region is provided on the first region. The third semiconductor region is provided on the second semiconductor region. The second electrode is provided on the third semiconductor region. The gate electrode opposes the second semiconductor region in a second direction. The first conductive part is provided on the second region and is provided in a plurality in a third direction. The first conductive parts are arranged with the gate electrode in the second direction. The second conductive part is provided on the second region, and arranged with the gate electrode and the first conductive parts in the third direction.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: November 24, 2020
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Saya Shimomura, Kenya Kobayashi
  • Patent number: 10840368
    Abstract: According to an embodiment, a semiconductor device includes a first electrode, a first semiconductor region, second semiconductor regions, third semiconductor regions, a first conductive portion, a gate electrode, and a second electrode. The gate electrode includes a first electrode portion and a second electrode portion. The first electrode portion opposes a portion of the first semiconductor region, one of the second semiconductor regions, and one of the third semiconductors in a first direction perpendicular to a second direction. The second electrode portion is located between the first electrode portion and another one of the third semiconductor regions in the first direction. The second electrode portion opposes another portion of the first semiconductor region, another one of the second semiconductor regions, and the other one of the third semiconductor regions. A second insulating portion including a void is provided between the first electrode portion and the second electrode portion.
    Type: Grant
    Filed: May 8, 2019
    Date of Patent: November 17, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tetsuya Ohno, Hiroaki Katou, Kenya Kobayashi, Toshifumi Nishiguchi, Saya Shimomura
  • Publication number: 20200273978
    Abstract: According to an embodiment, a semiconductor device includes a first electrode, a first semiconductor region, second semiconductor regions, third semiconductor regions, a first conductive portion, a gate electrode, and a second electrode. The gate electrode includes a first electrode portion and a second electrode portion. The first electrode portion opposes a portion of the first semiconductor region, one of the second semiconductor regions, and one of the third semiconductors in a first direction perpendicular to a second direction. The second electrode portion is located between the first electrode portion and another one of the third semiconductor regions in the first direction. The second electrode portion opposes another portion of the first semiconductor region, another one of the second semiconductor regions, and the other one of the third semiconductor regions. A second insulating portion including a void is provided between the first electrode portion and the second electrode portion.
    Type: Application
    Filed: May 8, 2019
    Publication date: August 27, 2020
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tetsuya Ohno, Hiroaki Katou, Kenya Kobayashi, Toshifumi Nishiguchi, Saya Shimomura
  • Publication number: 20200116714
    Abstract: To provide a device capable of cancer diagnosis with high sensitivity and specificity, a cancer diagnosis device (1) includes: an extracellular vesicle capturing section (16 to 18) including immobilization supports on which lectins are immobilized respectively, the lectins being each capable of binding specifically to a surface sugar chain included in an extracellular vesicle derived from a cancer cell, the immobilization supports corresponding respectively to one or more kinds of the surface sugar chain; and a detecting section configured to detect a microRNA included in the extracellular vesicle.
    Type: Application
    Filed: November 11, 2019
    Publication date: April 16, 2020
    Inventors: Kanji HORI, Makoto HIRAYAMA, Ikuro MARUYAMA, Yoshihiro TAGUCHI, Hiroshi KUROKAWA, Kenya KOBAYASHI, Hiroyoshi MINAKUCHI
  • Publication number: 20200075762
    Abstract: According to an embodiment, a semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of the first conductivity type, a first metal portion, a third semiconductor region of a second conductivity type, a first electrode, a fourth semiconductor region of the second conductivity type, and a second electrode. The first semiconductor region includes a first portion and a second portion. The second semiconductor region is provided on the first semiconductor region. The third semiconductor region is provided on part of the second semiconductor region. The first metal portion is provided in the first semiconductor region. The third semiconductor region is positioned on the first portion. The fourth semiconductor region is provided on another part of the second semiconductor region. The fourth semiconductor region is separated from the third semiconductor region. The fourth semiconductor region is positioned on the second portion.
    Type: Application
    Filed: March 15, 2019
    Publication date: March 5, 2020
    Inventor: Kenya Kobayashi
  • Patent number: 10566452
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor element and a control device. The semiconductor element includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a conductive portion, and a gate electrode. In a first operation, the control device changes a potential of the conductive portion from a first potential to a second potential. In a second operation, the control device changes a potential of the gate electrode from a third potential to a fourth potential. In a third operation, the control device changes the potential of the gate electrode from the fourth potential to the third potential. In a fourth operation, the control device changes the potential of the conductive portion from the second potential to the first potential after the third operation.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: February 18, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Kenya Kobayashi
  • Patent number: 10529805
    Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, first and second electrodes, second and third insulating units, and gate electrodes provided in the first semiconductor region and the second semiconductor region via a first insulating unit and extending in a first direction. The first electrode is provided on and electrically connected to the third semiconductor region. The second insulating unit is spaced apart from the gate electrodes in the first semiconductor region and extends in a second direction. The third insulating unit includes an insulating portion extending in the first direction and positioned between the gate electrodes and the second insulating unit in the second direction. The second electrode is electrically connected to the gate electrodes and provided on the second and third insulating units.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: January 7, 2020
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Saya Shimomura, Hiroaki Katou, Kenya Kobayashi
  • Patent number: 10453957
    Abstract: A semiconductor device includes a first semiconductor region, a second semiconductor region between a first gate electrode and a second gate electrode that is disposed apart from the first gate electrode in a first direction, third and fourth semiconductor regions provided on respective portions of the second semiconductor region, an insulating region provided between the third semiconductor region and the fourth semiconductor region, and an electrode provided on the third semiconductor region and the fourth semiconductor region and electrically connected to the third semiconductor region and the fourth semiconductor region. The fourth semiconductor region is parallel to the third semiconductor region in a direction intersecting the first direction. The fourth semiconductor region has an impurity concentration higher than that of the second semiconductor region.
    Type: Grant
    Filed: March 3, 2017
    Date of Patent: October 22, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kenya Kobayashi, Kenji Maeyama, Koji Matsuo, Yusuke Kawaguchi
  • Publication number: 20190288102
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor element and a control device. The semiconductor element includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a conductive portion, and a gate electrode. In a first operation, the control device changes a potential of the conductive portion from a first potential to a second potential. In a second operation, the control device changes a potential of the gate electrode from a third potential to a fourth potential. In a third operation, the control device changes the potential of the gate electrode from the fourth potential to the third potential. In a fourth operation, the control device changes the potential of the conductive portion from the second potential to the first potential after the third operation.
    Type: Application
    Filed: August 30, 2018
    Publication date: September 19, 2019
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Kenya KOBAYASHI
  • Publication number: 20190252541
    Abstract: According to one embodiment, a semiconductor device includes first and second electrodes, first, second, and third semiconductor regions, a gate electrode, first, and second conductive parts. The first semiconductor region includes a first region and a second region. The second semiconductor region is provided on the first region. The third semiconductor region is provided on the second semiconductor region. The second electrode is provided on the third semiconductor region. The gate electrode opposes the second semiconductor region in a second direction. The first conductive part is provided on the second region and is provided in a plurality in a third direction. The first conductive parts are arranged with the gate electrode in the second direction. The second conductive part is provided on the second region, and arranged with the gate electrode and the first conductive parts in the third direction.
    Type: Application
    Filed: July 12, 2018
    Publication date: August 15, 2019
    Inventors: Saya Shimomura, Kenya Kobayashi
  • Patent number: 10340346
    Abstract: A semiconductor device includes a drain layer, a drift layer, a base region, a source region, trenches, base contact region, gate regions, and field plate electrodes. The drain layer extends in a first and a second direction. The drift layer is on the drain layer. The base region is on the drift layer. The source region is on the base region. The trenches are in an array and each trench reaches the drift layer from the source region. The base contact region is along the second direction in a region in which the trenches do not contiguously exist along the second direction and electrically connects the source region to the base region. Each gate regions is along an inner wall of the trenches. Each field plate electrodes is in an inside of the gate regions and is longer than the gate regions in the third direction.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: July 2, 2019
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Hiroaki Katou, Kenya Kobayashi
  • Patent number: 10319850
    Abstract: According to one embodiment, a semiconductor device comprising a drain layer, a base region, a source region, a field plate electrode, and a gate region. The drift layer is formed on the drain layer. The base region is formed on the drift layer. The source region is formed on the base region. The field plate electrode is formed inside a trench reaching the drift layer through the base region from the source region. The gate region is formed inside the trench, wherein the gate region has a U-shape including a recess on the gate region in a direction along the trench and is formed such that, on upper surfaces of respective both ends of the U-shape, a position of an inner end on a side of the recess is higher than a position of an outer end on a side of the second insulating film.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: June 11, 2019
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Saya Shimomura, Toshifumi Nishiguchi, Hiroaki Katou, Kenya Kobayashi, Takahiro Kawano, Tetsuya Ohno
  • Publication number: 20190088776
    Abstract: According to one embodiment, a semiconductor device comprising a drain layer, a base region, a source region, a field plate electrode, and a gate region. The drift layer is formed on the drain layer. The base region is formed on the drift layer. The source region is formed on the base region. The field plate electrode is formed inside a trench reaching the drift layer through the base region from the source region. The gate region is formed inside the trench, wherein the gate region has a U-shape including a recess on the gate region in a direction along the trench and is formed such that, on upper surfaces of respective both ends of the U-shape, a position of an inner end on a side of the recess is higher than a position of an outer end on a side of the second insulating film.
    Type: Application
    Filed: March 9, 2018
    Publication date: March 21, 2019
    Inventors: Saya Shimomura, Toshifumi Nishiguchi, Hiroaki Katou, Kenya Kobayashi, Takahiro Kawano, Tetsuya Ohno
  • Publication number: 20190088750
    Abstract: A semiconductor device includes a drain layer, a drift layer, a base region, a source region, trenches, base contact region, gate regions, and field plate electrodes. The drain layer extends in a first and a second direction. The drift layer is on the drain layer. The base region is on the drift layer. The source region is on the base region. The trenches are in an array and each trench reaches the drift layer from the source region. The base contact region is along the second direction in a region in which the trenches do not contiguously exist along the second direction and electrically connects the source region to the base region. Each gate regions is along an inner wall of the trenches. Each field plate electrodes is in an inside of the gate regions and is longer than the gate regions in the third direction.
    Type: Application
    Filed: March 12, 2018
    Publication date: March 21, 2019
    Inventors: Hiroaki Katou, Kenya Kobayashi
  • Publication number: 20180226473
    Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type provided on the first semiconductor region, a third semiconductor region of the first conductivity type provided on the second semiconductor region, a first insulating part provided in the first semiconductor region, a first electrode provided in the first semiconductor region, the first insulating part disposed between the first electrode and the first semiconductor region, a second insulating part provided on the first electrode, a gate electrode provided on the second insulating part, a gate insulating part provided between the gate electrode and the second semiconductor region, and a second electrode provided on the second semiconductor region and on the third semiconductor region, and is electrically connected to the second semiconductor region, the third semiconductor region, and the first electrode.
    Type: Application
    Filed: April 2, 2018
    Publication date: August 9, 2018
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kenya KOBAYASHI, Tetsuo MATSUDA, Yosuke HIMORI, Toshifumi NISHIGUCHI
  • Patent number: 9954055
    Abstract: A semiconductor device includes a layer having first and second surfaces and a first type first region, a second type second region in the layer between the first region and first surface, a first type third region in the layer between the second region and first surface, first and second gate electrodes, wherein the second region is between the first and second gate electrodes, a first field plate electrode between the second surface and first gate electrode, a second field plate electrode between the second surface and second gate electrode, a first film, at least a portion between the first field plate electrode and first region, a second film at least a portion between the second field plate electrode and first region, and a second type fourth region in the first region between the first and second films. A portion of the first region is between second and fourth regions.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: April 24, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kenya Kobayashi, Masatoshi Arai
  • Patent number: 9947751
    Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type provided on the first semiconductor region, a third semiconductor region of the first conductivity type provided on the second semiconductor region, a first insulating part provided in the first semiconductor region, a first electrode provided in the first semiconductor region, the first insulating part disposed between the first electrode and the first semiconductor region, a second insulating part provided on the first electrode, a gate electrode provided on the second insulating part, a gate insulating part provided between the gate electrode and the second semiconductor region, and a second electrode provided on the second semiconductor region and on the third semiconductor region, and is electrically connected to the second semiconductor region, the third semiconductor region, and the first electrode.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: April 17, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kenya Kobayashi, Tetsuo Matsuda, Yosuke Himori, Toshifumi Nishiguchi
  • Publication number: 20180083137
    Abstract: A semiconductor device includes a first semiconductor region, a second semiconductor region between a first gate electrode and a second gate electrode that is disposed apart from the first gate electrode in a first direction, third and fourth semiconductor regions provided on respective portions of the second semiconductor region, an insulating region provided between the third semiconductor region and the fourth semiconductor region, and an electrode provided on the third semiconductor region and the fourth semiconductor region and electrically connected to the third semiconductor region and the fourth semiconductor region. The fourth semiconductor region is parallel to the third semiconductor region in a direction intersecting the first direction. The fourth semiconductor region has an impurity concentration higher than that of the second semiconductor region.
    Type: Application
    Filed: March 3, 2017
    Publication date: March 22, 2018
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kenya KOBAYASHI, Kenji MAEYAMA, Koji MATSUO, Yusuke KAWAGUCHI
  • Publication number: 20180083110
    Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type provided on the first semiconductor region, a third semiconductor region of the first conductivity type provided on the second semiconductor region, a first insulating part provided in the first semiconductor region, a first electrode provided in the first semiconductor region, the first insulating part disposed between the first electrode and the first semiconductor region, a second insulating part provided on the first electrode, a gate electrode provided on the second insulating part, a gate insulating part provided between the gate electrode and the second semiconductor region, and a second electrode provided on the second semiconductor region and on the third semiconductor region, and is electrically connected to the second semiconductor region, the third semiconductor region, and the first electrode.
    Type: Application
    Filed: March 2, 2017
    Publication date: March 22, 2018
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kenya KOBAYASHI, Tetsuo MATSUDA, Yosuke HIMORI, Toshifumi NISHIGUCHI
  • Publication number: 20180076307
    Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, first and second electrodes, second and third insulating units, and gate electrodes provided in the first semiconductor region and the second semiconductor region via a first insulating unit and extending in a first direction. The first electrode is provided on and electrically connected to the third semiconductor region. The second insulating unit is spaced apart from the gate electrodes in the first semiconductor region and extends in a second direction. The third insulating unit includes an insulating portion extending in the first direction and positioned between the gate electrodes and the second insulating unit in the second direction. The second electrode is electrically connected to the gate electrodes and provided on the second and third insulating units.
    Type: Application
    Filed: March 1, 2017
    Publication date: March 15, 2018
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Saya SHIMOMURA, Hiroaki KATOU, Kenya KOBAYASHI